From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752397AbbCYW45 (ORCPT ); Wed, 25 Mar 2015 18:56:57 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:58389 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752210AbbCYW4z (ORCPT ); Wed, 25 Mar 2015 18:56:55 -0400 Message-ID: <55133D18.9030802@ti.com> Date: Wed, 25 Mar 2015 17:56:24 -0500 From: Nishanth Menon User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: Russell King , Tony Lindgren CC: , , , Subject: Re: [PATCH] ARM: DRA7: Enable Cortex A15 errata 798181 References: <1427321544-5150-1-git-send-email-nm@ti.com> In-Reply-To: <1427321544-5150-1-git-send-email-nm@ti.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/25/2015 05:12 PM, Nishanth Menon wrote: > ARM errata 798181 is applicable for DRA7 based devices. So enable > the same in the build. Errata extract and workaround information > is as below. > > On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not > adequately shooting down all use of the old entries. The > ARM_ERRATA_798181 option enables the Linux kernel workaround > for this erratum which sends an IPI to the CPUs that are running > the same ASID as the one being invalidated. > > Reported-by: Praneeth Kumar Bajjuri > Signed-off-by: Nishanth Menon > --- > arch/arm/mach-omap2/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig > index 2b8e47788062..1f78709adb05 100644 > --- a/arch/arm/mach-omap2/Kconfig > +++ b/arch/arm/mach-omap2/Kconfig > @@ -69,6 +69,7 @@ config SOC_DRA7XX > select ARM_GIC > select HAVE_ARM_ARCH_TIMER > select IRQ_CROSSBAR > + select ARM_ERRATA_798181 if SMP > > config ARCH_OMAP2PLUS > bool > I need to drop this patch - sorry for the noise, I had missed an internal patch on the same topic.. :( -- Regards, Nishanth Menon From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nishanth Menon Subject: Re: [PATCH] ARM: DRA7: Enable Cortex A15 errata 798181 Date: Wed, 25 Mar 2015 17:56:24 -0500 Message-ID: <55133D18.9030802@ti.com> References: <1427321544-5150-1-git-send-email-nm@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1427321544-5150-1-git-send-email-nm@ti.com> Sender: linux-kernel-owner@vger.kernel.org To: Russell King , Tony Lindgren Cc: praneeth@ti.com, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: linux-omap@vger.kernel.org On 03/25/2015 05:12 PM, Nishanth Menon wrote: > ARM errata 798181 is applicable for DRA7 based devices. So enable > the same in the build. Errata extract and workaround information > is as below. > > On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not > adequately shooting down all use of the old entries. The > ARM_ERRATA_798181 option enables the Linux kernel workaround > for this erratum which sends an IPI to the CPUs that are running > the same ASID as the one being invalidated. > > Reported-by: Praneeth Kumar Bajjuri > Signed-off-by: Nishanth Menon > --- > arch/arm/mach-omap2/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig > index 2b8e47788062..1f78709adb05 100644 > --- a/arch/arm/mach-omap2/Kconfig > +++ b/arch/arm/mach-omap2/Kconfig > @@ -69,6 +69,7 @@ config SOC_DRA7XX > select ARM_GIC > select HAVE_ARM_ARCH_TIMER > select IRQ_CROSSBAR > + select ARM_ERRATA_798181 if SMP > > config ARCH_OMAP2PLUS > bool > I need to drop this patch - sorry for the noise, I had missed an internal patch on the same topic.. :( -- Regards, Nishanth Menon From mboxrd@z Thu Jan 1 00:00:00 1970 From: nm@ti.com (Nishanth Menon) Date: Wed, 25 Mar 2015 17:56:24 -0500 Subject: [PATCH] ARM: DRA7: Enable Cortex A15 errata 798181 In-Reply-To: <1427321544-5150-1-git-send-email-nm@ti.com> References: <1427321544-5150-1-git-send-email-nm@ti.com> Message-ID: <55133D18.9030802@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 03/25/2015 05:12 PM, Nishanth Menon wrote: > ARM errata 798181 is applicable for DRA7 based devices. So enable > the same in the build. Errata extract and workaround information > is as below. > > On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not > adequately shooting down all use of the old entries. The > ARM_ERRATA_798181 option enables the Linux kernel workaround > for this erratum which sends an IPI to the CPUs that are running > the same ASID as the one being invalidated. > > Reported-by: Praneeth Kumar Bajjuri > Signed-off-by: Nishanth Menon > --- > arch/arm/mach-omap2/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig > index 2b8e47788062..1f78709adb05 100644 > --- a/arch/arm/mach-omap2/Kconfig > +++ b/arch/arm/mach-omap2/Kconfig > @@ -69,6 +69,7 @@ config SOC_DRA7XX > select ARM_GIC > select HAVE_ARM_ARCH_TIMER > select IRQ_CROSSBAR > + select ARM_ERRATA_798181 if SMP > > config ARCH_OMAP2PLUS > bool > I need to drop this patch - sorry for the noise, I had missed an internal patch on the same topic.. :( -- Regards, Nishanth Menon