[PATCH 00/59] Remove the outstanding_lazy_request

[PATCH 00/59] Remove the outstanding_lazy_request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The driver tracks GPU work using request structures. Unfortunately, this
tracking is not currently explicit but is done by means of a catch-all request
that floats around in the background hoovering up work until it gets submitted.
This background request (ring->outstanding_lazy_request or OLR) is created at
the point of actually writing to the ring rather than when a particular piece of
GPU work is started. This scheme sort of hangs together but causes a number of
issues. It can mean that multiple pieces of independent work are lumped together
in the same request or that work is not officially submitted until much later
than it was created.

This patch series completely removes the OLR and explicitly tracks each piece of
work with it's own personal request structure from start to submission.

The patch set seems to fix the "'gem_ringfill --r render' + ctrl-c straight
after boot" issue logged as BZ:88865. I haven't done any analysis of that
particular issue but the descriptions I've seen appear to blame an inconsistent
or mangled OLR.

Note also that by the end of this series, a number of differences between the
legacy and execlist code paths have been removed. For example add_request() and
emit_request() now have the same signature thus could be merged back to a single
function pointer. Merging some of these together would also allow the removal of
a bunch of 'if(execlists)' tests where the difference is simply to call the
legacy function or the execlist one.

v2: Rebased to newer nightly tree, fixed up a few minor issues, added two extra
patches - one to move the LRC ring begin around in the vein of other recent
reshuffles, the other to clean up some issues with i915_add_request().

v3: Large re-work due to feedback from code review. Some patches have been
removed, extra ones have been added and others have been changed significantly.
It is recommended that all patches are reviewed from scratch rather than
assuming only certain ones have changed and need re-inspecting. The exceptions
are where the 'reviewed-by' tag has been kept because that patch was not
significantly affected.

[Patches against drm-intel-nightly tree fetched 18/03/2015]

John Harrison (59):
  drm/i915: Rename 'do_execbuf' to 'execbuf_submit'
  drm/i915: Make intel_logical_ring_begin() static
  drm/i915: Move common request allocation code into a common function
  drm/i915: Fix for ringbuf space wait in LRC mode
  drm/i915: Reserve ring buffer space for i915_add_request() commands
  drm/i915: i915_add_request must not fail
  drm/i915: Early alloc request in execbuff
  drm/i915: Set context in request from creation even in legacy mode
  drm/i915: Merged the many do_execbuf() parameters into a structure
  drm/i915: Simplify i915_gem_execbuffer_retire_commands() parameters
  drm/i915: Update alloc_request to return the allocated request
  drm/i915: Add request to execbuf params and add explicit cleanup
  drm/i915: Update the dispatch tracepoint to use params->request
  drm/i915: Update move_to_gpu() to take a request structure
  drm/i915: Update execbuffer_move_to_active() to take a request structure
  drm/i915: Add flag to i915_add_request() to skip the cache flush
  drm/i915: Update i915_gpu_idle() to manage its own request
  drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring
  drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()
  drm/i915: Don't tag kernel batches as user batches
  drm/i915: Add explicit request management to i915_gem_init_hw()
  drm/i915: Update ppgtt_init_ring() & context_enable() to take requests
  drm/i915: Update i915_switch_context() to take a request structure
  drm/i915: Update do_switch() to take a request structure
  drm/i915: Update deferred context creation to do explicit request management
  drm/i915: Update init_context() to take a request structure
  drm/i915: Update render_state_init() to take a request structure
  drm/i915: Update i915_gem_object_sync() to take a request structure
  drm/i915: Update overlay code to do explicit request management
  drm/i915: Update queue_flip() to take a request structure
  drm/i915: Update add_request() to take a request structure
  drm/i915: Update [vma|object]_move_to_active() to take request structures
  drm/i915: Update l3_remap to take a request structure
  drm/i915: Update mi_set_context() to take a request structure
  drm/i915: Update a bunch of execbuffer helpers to take request structures
  drm/i915: Update workarounds_emit() to take request structures
  drm/i915: Update flush_all_caches() to take request structures
  drm/i915: Update switch_mm() to take a request structure
  drm/i915: Update ring->flush() to take a requests structure
  drm/i915: Update some flush helpers to take request structures
  drm/i915: Update ring->emit_flush() to take a request structure
  drm/i915: Update ring->add_request() to take a request structure
  drm/i915: Update ring->emit_request() to take a request structure
  drm/i915: Update ring->dispatch_execbuffer() to take a request structure
  drm/i915: Update ring->emit_bb_start() to take a request structure
  drm/i915: Update ring->sync_to() to take a request structure
  drm/i915: Update ring->signal() to take a request structure
  drm/i915: Update cacheline_align() to take a request structure
  drm/i915: Update intel_ring_begin() to take a request structure
  drm/i915: Update intel_logical_ring_begin() to take a request structure
  drm/i915: Add *_ring_begin() to request allocation
  drm/i915: Remove the now obsolete intel_ring_get_request()
  drm/i915: Remove the now obsolete 'outstanding_lazy_request'
  drm/i915: Move the request/file and request/pid association to creation time
  drm/i915: Remove fallback poll for ring buffer space
  drm/i915: Remove 'faked' request from LRC submission
  drm/i915: Update a bunch of LRC functions to take requests
  drm/i915: Remove the now obsolete 'i915_gem_check_olr()'
  drm/i915: Remove the almost obsolete i915_gem_object_flush_active()

 drivers/gpu/drm/i915/i915_drv.h              |   78 ++--
 drivers/gpu/drm/i915/i915_gem.c              |  388 ++++++++++-------
 drivers/gpu/drm/i915/i915_gem_context.c      |   76 ++--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |  126 ++++--
 drivers/gpu/drm/i915/i915_gem_gtt.c          |   61 +--
 drivers/gpu/drm/i915/i915_gem_gtt.h          |    3 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |   15 +-
 drivers/gpu/drm/i915/i915_gem_render_state.h |    2 +-
 drivers/gpu/drm/i915/i915_trace.h            |   28 +-
 drivers/gpu/drm/i915/intel_display.c         |   62 +--
 drivers/gpu/drm/i915/intel_drv.h             |    3 +-
 drivers/gpu/drm/i915/intel_fbdev.c           |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |  585 +++++++++++---------------
 drivers/gpu/drm/i915/intel_lrc.h             |   17 +-
 drivers/gpu/drm/i915/intel_overlay.c         |   64 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.c      |  374 ++++++++--------
 drivers/gpu/drm/i915/intel_ringbuffer.h      |   54 ++-
 17 files changed, 1005 insertions(+), 933 deletions(-)

-- 
1.7.9.5

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[PATCH 01/59] drm/i915: Rename 'do_execbuf' to 'execbuf_submit'

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The submission portion of the execbuffer code path was abstracted into a
function pointer indirection as part of the legacy vs execlist work. The two
implementation functions are called 'i915_gem_ringbuffer_submission' and
'intel_execlists_submission' but the pointer was called 'do_execbuf'. There is
already a 'i915_gem_do_execbuffer' function (which is what calls the pointer
indirection). The name of the pointer is therefore considered to be backwards
and should be changed.

This patch renames it to 'execbuf_submit' which is hopefully a bit clearer.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |   14 +++++++-------
 drivers/gpu/drm/i915/i915_gem.c            |    4 ++--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    6 +++---
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eb38cd1..1a23445 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1812,13 +1812,13 @@ struct drm_i915_private {
 
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
-		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
-				  struct intel_engine_cs *ring,
-				  struct intel_context *ctx,
-				  struct drm_i915_gem_execbuffer2 *args,
-				  struct list_head *vmas,
-				  struct drm_i915_gem_object *batch_obj,
-				  u64 exec_start, u32 flags);
+		int (*execbuf_submit)(struct drm_device *dev, struct drm_file *file,
+				      struct intel_engine_cs *ring,
+				      struct intel_context *ctx,
+				      struct drm_i915_gem_execbuffer2 *args,
+				      struct list_head *vmas,
+				      struct drm_i915_gem_object *batch_obj,
+				      u64 exec_start, u32 flags);
 		int (*init_rings)(struct drm_device *dev);
 		void (*cleanup_ring)(struct intel_engine_cs *ring);
 		void (*stop_ring)(struct intel_engine_cs *ring);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 092f25c..51cdfb7 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4837,12 +4837,12 @@ int i915_gem_init(struct drm_device *dev)
 	}
 
 	if (!i915.enable_execlists) {
-		dev_priv->gt.do_execbuf = i915_gem_ringbuffer_submission;
+		dev_priv->gt.execbuf_submit = i915_gem_ringbuffer_submission;
 		dev_priv->gt.init_rings = i915_gem_init_rings;
 		dev_priv->gt.cleanup_ring = intel_cleanup_ring_buffer;
 		dev_priv->gt.stop_ring = intel_stop_ring_buffer;
 	} else {
-		dev_priv->gt.do_execbuf = intel_execlists_submission;
+		dev_priv->gt.execbuf_submit = intel_execlists_submission;
 		dev_priv->gt.init_rings = intel_logical_rings_init;
 		dev_priv->gt.cleanup_ring = intel_logical_ring_cleanup;
 		dev_priv->gt.stop_ring = intel_logical_ring_stop;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 9838d11..38e2178 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1594,9 +1594,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	} else
 		exec_start += i915_gem_obj_offset(batch_obj, vm);
 
-	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
-				      &eb->vmas, batch_obj, exec_start,
-				      dispatch_flags);
+	ret = dev_priv->gt.execbuf_submit(dev, file, ring, ctx, args,
+					  &eb->vmas, batch_obj, exec_start,
+					  dispatch_flags);
 
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
-- 
1.7.9.5

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[PATCH 02/59] drm/i915: Make intel_logical_ring_begin() static

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The only usage of intel_logical_ring_begin() is within intel_lrc.c so it can be
made static. To avoid a forward declaration at the top of the file, it and bunch
of other functions have been shuffled upwards.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |  474 +++++++++++++++++++-------------------
 drivers/gpu/drm/i915/intel_lrc.h |    3 -
 2 files changed, 237 insertions(+), 240 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index fcb074b..cad4300 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -611,6 +611,243 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
 	return logical_ring_invalidate_all_caches(ringbuf, ctx);
 }
 
+static int logical_ring_alloc_request(struct intel_engine_cs *ring,
+				      struct intel_context *ctx)
+{
+	struct drm_i915_gem_request *request;
+	struct drm_i915_private *dev_private = ring->dev->dev_private;
+	int ret;
+
+	if (ring->outstanding_lazy_request)
+		return 0;
+
+	request = kzalloc(sizeof(*request), GFP_KERNEL);
+	if (request == NULL)
+		return -ENOMEM;
+
+	if (ctx != ring->default_context) {
+		ret = intel_lr_context_pin(ring, ctx);
+		if (ret) {
+			kfree(request);
+			return ret;
+		}
+	}
+
+	kref_init(&request->ref);
+	request->ring = ring;
+	request->uniq = dev_private->request_uniq++;
+
+	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
+	if (ret) {
+		intel_lr_context_unpin(ring, ctx);
+		kfree(request);
+		return ret;
+	}
+
+	request->ctx = ctx;
+	i915_gem_context_reference(request->ctx);
+	request->ringbuf = ctx->engine[ring->id].ringbuf;
+
+	ring->outstanding_lazy_request = request;
+	return 0;
+}
+
+static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
+				     int bytes)
+{
+	struct intel_engine_cs *ring = ringbuf->ring;
+	struct drm_i915_gem_request *request;
+	int ret;
+
+	if (intel_ring_space(ringbuf) >= bytes)
+		return 0;
+
+	list_for_each_entry(request, &ring->request_list, list) {
+		/*
+		 * The request queue is per-engine, so can contain requests
+		 * from multiple ringbuffers. Here, we must ignore any that
+		 * aren't from the ringbuffer we're considering.
+		 */
+		struct intel_context *ctx = request->ctx;
+		if (ctx->engine[ring->id].ringbuf != ringbuf)
+			continue;
+
+		/* Would completion of this request free enough space? */
+		if (__intel_ring_space(request->tail, ringbuf->tail,
+				       ringbuf->size) >= bytes) {
+			break;
+		}
+	}
+
+	if (&request->list == &ring->request_list)
+		return -ENOSPC;
+
+	ret = i915_wait_request(request);
+	if (ret)
+		return ret;
+
+	i915_gem_retire_requests_ring(ring);
+
+	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
+}
+
+/*
+ * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
+ * @ringbuf: Logical Ringbuffer to advance.
+ *
+ * The tail is updated in our logical ringbuffer struct, not in the actual context. What
+ * really happens during submission is that the context and current tail will be placed
+ * on a queue waiting for the ELSP to be ready to accept a new context submission. At that
+ * point, the tail *inside* the context is updated and the ELSP written to.
+ */
+static void
+intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
+				      struct intel_context *ctx,
+				      struct drm_i915_gem_request *request)
+{
+	struct intel_engine_cs *ring = ringbuf->ring;
+
+	intel_logical_ring_advance(ringbuf);
+
+	if (intel_ring_stopped(ring))
+		return;
+
+	execlists_context_queue(ring, ctx, ringbuf->tail, request);
+}
+
+static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
+				       struct intel_context *ctx,
+				       int bytes)
+{
+	struct intel_engine_cs *ring = ringbuf->ring;
+	struct drm_device *dev = ring->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	unsigned long end;
+	int ret;
+
+	ret = logical_ring_wait_request(ringbuf, bytes);
+	if (ret != -ENOSPC)
+		return ret;
+
+	/* Force the context submission in case we have been skipping it */
+	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
+
+	/* With GEM the hangcheck timer should kick us out of the loop,
+	 * leaving it early runs the risk of corrupting GEM state (due
+	 * to running on almost untested codepaths). But on resume
+	 * timers don't work yet, so prevent a complete hang in that
+	 * case by choosing an insanely large timeout. */
+	end = jiffies + 60 * HZ;
+
+	ret = 0;
+	do {
+		if (intel_ring_space(ringbuf) >= bytes)
+			break;
+
+		msleep(1);
+
+		if (dev_priv->mm.interruptible && signal_pending(current)) {
+			ret = -ERESTARTSYS;
+			break;
+		}
+
+		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
+					   dev_priv->mm.interruptible);
+		if (ret)
+			break;
+
+		if (time_after(jiffies, end)) {
+			ret = -EBUSY;
+			break;
+		}
+	} while (1);
+
+	return ret;
+}
+
+static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
+				    struct intel_context *ctx)
+{
+	uint32_t __iomem *virt;
+	int rem = ringbuf->size - ringbuf->tail;
+
+	if (ringbuf->space < rem) {
+		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
+
+		if (ret)
+			return ret;
+	}
+
+	virt = ringbuf->virtual_start + ringbuf->tail;
+	rem /= 4;
+	while (rem--)
+		iowrite32(MI_NOOP, virt++);
+
+	ringbuf->tail = 0;
+	intel_ring_update_space(ringbuf);
+
+	return 0;
+}
+
+static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
+				struct intel_context *ctx, int bytes)
+{
+	int ret;
+
+	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
+		ret = logical_ring_wrap_buffer(ringbuf, ctx);
+		if (unlikely(ret))
+			return ret;
+	}
+
+	if (unlikely(ringbuf->space < bytes)) {
+		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
+		if (unlikely(ret))
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
+ *
+ * @ringbuf: Logical ringbuffer.
+ * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
+ *
+ * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
+ * be wrapped, or wait a bit for the tail to be updated). This function takes care of that
+ * and also preallocates a request (every workload submission is still mediated through
+ * requests, same as it did with legacy ringbuffer submission).
+ *
+ * Return: non-zero if the ringbuffer is not ready to be written to.
+ */
+static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
+				    struct intel_context *ctx, int num_dwords)
+{
+	struct intel_engine_cs *ring = ringbuf->ring;
+	struct drm_device *dev = ring->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	int ret;
+
+	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
+				   dev_priv->mm.interruptible);
+	if (ret)
+		return ret;
+
+	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
+	if (ret)
+		return ret;
+
+	/* Preallocate the olr before touching the ring */
+	ret = logical_ring_alloc_request(ring, ctx);
+	if (ret)
+		return ret;
+
+	ringbuf->space -= num_dwords * sizeof(uint32_t);
+	return 0;
+}
+
 /**
  * execlists_submission() - submit a batchbuffer for execution, Execlists style
  * @dev: DRM device.
@@ -787,30 +1024,6 @@ int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-/*
- * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
- * @ringbuf: Logical Ringbuffer to advance.
- *
- * The tail is updated in our logical ringbuffer struct, not in the actual context. What
- * really happens during submission is that the context and current tail will be placed
- * on a queue waiting for the ELSP to be ready to accept a new context submission. At that
- * point, the tail *inside* the context is updated and the ELSP written to.
- */
-static void
-intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
-				      struct intel_context *ctx,
-				      struct drm_i915_gem_request *request)
-{
-	struct intel_engine_cs *ring = ringbuf->ring;
-
-	intel_logical_ring_advance(ringbuf);
-
-	if (intel_ring_stopped(ring))
-		return;
-
-	execlists_context_queue(ring, ctx, ringbuf->tail, request);
-}
-
 static int intel_lr_context_pin(struct intel_engine_cs *ring,
 		struct intel_context *ctx)
 {
@@ -855,219 +1068,6 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
 	}
 }
 
-static int logical_ring_alloc_request(struct intel_engine_cs *ring,
-				      struct intel_context *ctx)
-{
-	struct drm_i915_gem_request *request;
-	struct drm_i915_private *dev_private = ring->dev->dev_private;
-	int ret;
-
-	if (ring->outstanding_lazy_request)
-		return 0;
-
-	request = kzalloc(sizeof(*request), GFP_KERNEL);
-	if (request == NULL)
-		return -ENOMEM;
-
-	if (ctx != ring->default_context) {
-		ret = intel_lr_context_pin(ring, ctx);
-		if (ret) {
-			kfree(request);
-			return ret;
-		}
-	}
-
-	kref_init(&request->ref);
-	request->ring = ring;
-	request->uniq = dev_private->request_uniq++;
-
-	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
-	if (ret) {
-		intel_lr_context_unpin(ring, ctx);
-		kfree(request);
-		return ret;
-	}
-
-	request->ctx = ctx;
-	i915_gem_context_reference(request->ctx);
-	request->ringbuf = ctx->engine[ring->id].ringbuf;
-
-	ring->outstanding_lazy_request = request;
-	return 0;
-}
-
-static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
-				     int bytes)
-{
-	struct intel_engine_cs *ring = ringbuf->ring;
-	struct drm_i915_gem_request *request;
-	int ret;
-
-	if (intel_ring_space(ringbuf) >= bytes)
-		return 0;
-
-	list_for_each_entry(request, &ring->request_list, list) {
-		/*
-		 * The request queue is per-engine, so can contain requests
-		 * from multiple ringbuffers. Here, we must ignore any that
-		 * aren't from the ringbuffer we're considering.
-		 */
-		struct intel_context *ctx = request->ctx;
-		if (ctx->engine[ring->id].ringbuf != ringbuf)
-			continue;
-
-		/* Would completion of this request free enough space? */
-		if (__intel_ring_space(request->tail, ringbuf->tail,
-				       ringbuf->size) >= bytes) {
-			break;
-		}
-	}
-
-	if (&request->list == &ring->request_list)
-		return -ENOSPC;
-
-	ret = i915_wait_request(request);
-	if (ret)
-		return ret;
-
-	i915_gem_retire_requests_ring(ring);
-
-	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
-}
-
-static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
-				       struct intel_context *ctx,
-				       int bytes)
-{
-	struct intel_engine_cs *ring = ringbuf->ring;
-	struct drm_device *dev = ring->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	unsigned long end;
-	int ret;
-
-	ret = logical_ring_wait_request(ringbuf, bytes);
-	if (ret != -ENOSPC)
-		return ret;
-
-	/* Force the context submission in case we have been skipping it */
-	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
-
-	/* With GEM the hangcheck timer should kick us out of the loop,
-	 * leaving it early runs the risk of corrupting GEM state (due
-	 * to running on almost untested codepaths). But on resume
-	 * timers don't work yet, so prevent a complete hang in that
-	 * case by choosing an insanely large timeout. */
-	end = jiffies + 60 * HZ;
-
-	ret = 0;
-	do {
-		if (intel_ring_space(ringbuf) >= bytes)
-			break;
-
-		msleep(1);
-
-		if (dev_priv->mm.interruptible && signal_pending(current)) {
-			ret = -ERESTARTSYS;
-			break;
-		}
-
-		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
-					   dev_priv->mm.interruptible);
-		if (ret)
-			break;
-
-		if (time_after(jiffies, end)) {
-			ret = -EBUSY;
-			break;
-		}
-	} while (1);
-
-	return ret;
-}
-
-static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
-				    struct intel_context *ctx)
-{
-	uint32_t __iomem *virt;
-	int rem = ringbuf->size - ringbuf->tail;
-
-	if (ringbuf->space < rem) {
-		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
-
-		if (ret)
-			return ret;
-	}
-
-	virt = ringbuf->virtual_start + ringbuf->tail;
-	rem /= 4;
-	while (rem--)
-		iowrite32(MI_NOOP, virt++);
-
-	ringbuf->tail = 0;
-	intel_ring_update_space(ringbuf);
-
-	return 0;
-}
-
-static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
-				struct intel_context *ctx, int bytes)
-{
-	int ret;
-
-	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
-		ret = logical_ring_wrap_buffer(ringbuf, ctx);
-		if (unlikely(ret))
-			return ret;
-	}
-
-	if (unlikely(ringbuf->space < bytes)) {
-		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
-		if (unlikely(ret))
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
- *
- * @ringbuf: Logical ringbuffer.
- * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
- *
- * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
- * be wrapped, or wait a bit for the tail to be updated). This function takes care of that
- * and also preallocates a request (every workload submission is still mediated through
- * requests, same as it did with legacy ringbuffer submission).
- *
- * Return: non-zero if the ringbuffer is not ready to be written to.
- */
-int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
-			     struct intel_context *ctx, int num_dwords)
-{
-	struct intel_engine_cs *ring = ringbuf->ring;
-	struct drm_device *dev = ring->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	int ret;
-
-	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
-				   dev_priv->mm.interruptible);
-	if (ret)
-		return ret;
-
-	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
-	if (ret)
-		return ret;
-
-	/* Preallocate the olr before touching the ring */
-	ret = logical_ring_alloc_request(ring, ctx);
-	if (ret)
-		return ret;
-
-	ringbuf->space -= num_dwords * sizeof(uint32_t);
-	return 0;
-}
-
 static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
 					       struct intel_context *ctx)
 {
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index adb731e4..ac8f81a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -63,9 +63,6 @@ static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
 	iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
 	ringbuf->tail += 4;
 }
-int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
-			     struct intel_context *ctx,
-			     int num_dwords);
 
 /* Logical Ring Contexts */
 void intel_lr_context_free(struct intel_context *ctx);
-- 
1.7.9.5

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[PATCH 03/59] drm/i915: Move common request allocation code into a common function

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The request allocation code is largely duplicated between legacy mode and
execlist mode. The actual difference between the two versions of the code is
pretty minimal.

This patch moves the common code out into a separate function. This is then
called by the execution specific version prior to setting up the one different
value.

For: VIZ-5190
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 ++
 drivers/gpu/drm/i915/i915_gem.c         |   37 +++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_lrc.c        |   39 +++++++------------------------
 drivers/gpu/drm/i915/intel_lrc.h        |    2 ++
 drivers/gpu/drm/i915/intel_ringbuffer.c |   28 +++-------------------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 ++
 6 files changed, 54 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1a23445..4ebd421 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2113,6 +2113,8 @@ struct drm_i915_gem_request {
 
 };
 
+int i915_gem_request_alloc(struct intel_engine_cs *ring,
+			   struct intel_context *ctx);
 void i915_gem_request_free(struct kref *req_ref);
 
 static inline uint32_t
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 51cdfb7..4824adf 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2518,6 +2518,43 @@ void i915_gem_request_free(struct kref *req_ref)
 	kfree(req);
 }
 
+int i915_gem_request_alloc(struct intel_engine_cs *ring,
+			   struct intel_context *ctx)
+{
+	int ret;
+	struct drm_i915_gem_request *request;
+	struct drm_i915_private *dev_private = ring->dev->dev_private;
+
+	if (ring->outstanding_lazy_request)
+		return 0;
+
+	request = kzalloc(sizeof(*request), GFP_KERNEL);
+	if (request == NULL)
+		return -ENOMEM;
+
+	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
+	if (ret) {
+		kfree(request);
+		return ret;
+	}
+
+	kref_init(&request->ref);
+	request->ring = ring;
+	request->uniq = dev_private->request_uniq++;
+
+	if (i915.enable_execlists)
+		ret = intel_logical_ring_alloc_request_extras(request, ctx);
+	else
+		ret = intel_ring_alloc_request_extras(request);
+	if (ret) {
+		kfree(request);
+		return ret;
+	}
+
+	ring->outstanding_lazy_request = request;
+	return 0;
+}
+
 struct drm_i915_gem_request *
 i915_gem_find_active_request(struct intel_engine_cs *ring)
 {
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index cad4300..6504689 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -611,44 +611,21 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
 	return logical_ring_invalidate_all_caches(ringbuf, ctx);
 }
 
-static int logical_ring_alloc_request(struct intel_engine_cs *ring,
-				      struct intel_context *ctx)
+int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request,
+					    struct intel_context *ctx)
 {
-	struct drm_i915_gem_request *request;
-	struct drm_i915_private *dev_private = ring->dev->dev_private;
 	int ret;
 
-	if (ring->outstanding_lazy_request)
-		return 0;
-
-	request = kzalloc(sizeof(*request), GFP_KERNEL);
-	if (request == NULL)
-		return -ENOMEM;
-
-	if (ctx != ring->default_context) {
-		ret = intel_lr_context_pin(ring, ctx);
-		if (ret) {
-			kfree(request);
+	if (ctx != request->ring->default_context) {
+		ret = intel_lr_context_pin(request->ring, ctx);
+		if (ret)
 			return ret;
-		}
-	}
-
-	kref_init(&request->ref);
-	request->ring = ring;
-	request->uniq = dev_private->request_uniq++;
-
-	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
-	if (ret) {
-		intel_lr_context_unpin(ring, ctx);
-		kfree(request);
-		return ret;
 	}
 
-	request->ctx = ctx;
+	request->ringbuf = ctx->engine[request->ring->id].ringbuf;
+	request->ctx     = ctx;
 	i915_gem_context_reference(request->ctx);
-	request->ringbuf = ctx->engine[ring->id].ringbuf;
 
-	ring->outstanding_lazy_request = request;
 	return 0;
 }
 
@@ -840,7 +817,7 @@ static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = logical_ring_alloc_request(ring, ctx);
+	ret = i915_gem_request_alloc(ring, ctx);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index ac8f81a..04d3a6d 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -36,6 +36,8 @@
 #define RING_CONTEXT_STATUS_PTR(ring)	((ring)->mmio_base+0x3a0)
 
 /* Logical Rings */
+int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request,
+					    struct intel_context *ctx);
 void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 441e250..99fb2f0 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2181,32 +2181,10 @@ int intel_ring_idle(struct intel_engine_cs *ring)
 	return i915_wait_request(req);
 }
 
-static int
-intel_ring_alloc_request(struct intel_engine_cs *ring)
+int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
 {
-	int ret;
-	struct drm_i915_gem_request *request;
-	struct drm_i915_private *dev_private = ring->dev->dev_private;
-
-	if (ring->outstanding_lazy_request)
-		return 0;
-
-	request = kzalloc(sizeof(*request), GFP_KERNEL);
-	if (request == NULL)
-		return -ENOMEM;
-
-	kref_init(&request->ref);
-	request->ring = ring;
-	request->ringbuf = ring->buffer;
-	request->uniq = dev_private->request_uniq++;
-
-	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
-	if (ret) {
-		kfree(request);
-		return ret;
-	}
+	request->ringbuf = request->ring->buffer;
 
-	ring->outstanding_lazy_request = request;
 	return 0;
 }
 
@@ -2247,7 +2225,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = intel_ring_alloc_request(ring);
+	ret = i915_gem_request_alloc(ring, ring->default_context);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index c761fe0..6566dd4 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -390,6 +390,8 @@ int intel_alloc_ringbuffer_obj(struct drm_device *dev,
 void intel_stop_ring_buffer(struct intel_engine_cs *ring);
 void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 
+int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request);
+
 int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
 int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
 static inline void intel_ring_emit(struct intel_engine_cs *ring,
-- 
1.7.9.5

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[PATCH 04/59] drm/i915: Fix for ringbuf space wait in LRC mode

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The legacy and LRC code paths have an almost identical procedure for waiting for
space in the ring buffer. They both search for a request in the free list that
will advance the tail to a point where sufficient space is available. They then
wait for that request, retire it and recalculate the free space value.

Unfortunately, a bug in the LRC side meant that the resulting free space might
not be as large as expected and indeed, might not be sufficient. This is because
it was testing against the value of request->tail not request->postfix. Whereas,
when a request is retired, ringbuf->tail is updated to req->postfix not
req->tail.

Another significant difference between the two is that the LRC one did not trust
the wait for request to work! It redid the is there enough space available test
and would fail the call if insufficient. Whereas, the legacy version just said
'return 0' - it assumed the preceeding code works. This difference meant that
the LRC version still worked even with the bug - it just fell back to the
polling wait path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   10 ++++++----
 drivers/gpu/drm/i915/intel_ringbuffer.c |   10 ++++++----
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 6504689..1c3834fc 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -634,7 +634,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
 {
 	struct intel_engine_cs *ring = ringbuf->ring;
 	struct drm_i915_gem_request *request;
-	int ret;
+	int ret, new_space;
 
 	if (intel_ring_space(ringbuf) >= bytes)
 		return 0;
@@ -650,10 +650,10 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
 			continue;
 
 		/* Would completion of this request free enough space? */
-		if (__intel_ring_space(request->tail, ringbuf->tail,
-				       ringbuf->size) >= bytes) {
+		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
+				       ringbuf->size);
+		if (new_space >= bytes)
 			break;
-		}
 	}
 
 	if (&request->list == &ring->request_list)
@@ -665,6 +665,8 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
 
 	i915_gem_retire_requests_ring(ring);
 
+	WARN_ON(intel_ring_space(ringbuf) < new_space);
+
 	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 99fb2f0..a26bdf8 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2059,16 +2059,16 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
 {
 	struct intel_ringbuffer *ringbuf = ring->buffer;
 	struct drm_i915_gem_request *request;
-	int ret;
+	int ret, new_space;
 
 	if (intel_ring_space(ringbuf) >= n)
 		return 0;
 
 	list_for_each_entry(request, &ring->request_list, list) {
-		if (__intel_ring_space(request->postfix, ringbuf->tail,
-				       ringbuf->size) >= n) {
+		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
+				       ringbuf->size);
+		if (new_space >= n)
 			break;
-		}
 	}
 
 	if (&request->list == &ring->request_list)
@@ -2080,6 +2080,8 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
 
 	i915_gem_retire_requests_ring(ring);
 
+	WARN_ON(intel_ring_space(ringbuf) < new_space);
+
 	return 0;
 }
 
-- 
1.7.9.5

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[PATCH 05/59] drm/i915: Reserve ring buffer space for i915_add_request() commands

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

It is a bad idea for i915_add_request() to fail. The work will already have been
send to the ring and will be processed, but there will not be any tracking or
management of that work.

The only way the add request call can fail is if it can't write its epilogue
commands to the ring (cache flushing, seqno updates, interrupt signalling). The
reasons for that are mostly down to running out of ring buffer space and the
problems associated with trying to get some more. This patch prevents that
situation from happening in the first place.

When a request is created, it marks sufficient space as reserved for the
epilogue commands. Thus guaranteeing that by the time the epilogue is written,
there will be plenty of space for it. Note that a ring_begin() call is required
to actually reserve the space (and do any potential waiting). However, that is
not currently done at request creation time. This is because the ring_begin()
code can allocate a request. Hence calling begin() from the request allocation
code would lead to infinite recursion! Later patches in this series remove the
need for begin() to do the allocate. At that point, it becomes safe for the
allocate to call begin() and really reserve the space.

Until then, there is a potential for insufficient space to be available at the
point of calling i915_add_request(). However, that would only be in the case
where the request was created and immediately submitted without ever calling
ring_begin() and adding any work to that request. Which should never happen. And
even if it does, and if that request happens to fall down the tiny window of
opportunity for failing due to being out of ring space then does it really
matter because the request wasn't doing anything in the first place?

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    1 +
 drivers/gpu/drm/i915/i915_gem.c         |   47 +++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_lrc.c        |   12 ++++++++
 drivers/gpu/drm/i915/intel_ringbuffer.c |   50 +++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_ringbuffer.h |    9 ++++++
 5 files changed, 117 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4ebd421..fe6446d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2115,6 +2115,7 @@ struct drm_i915_gem_request {
 
 int i915_gem_request_alloc(struct intel_engine_cs *ring,
 			   struct intel_context *ctx);
+void i915_gem_request_cancel(struct drm_i915_gem_request *req);
 void i915_gem_request_free(struct kref *req_ref);
 
 static inline uint32_t
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4824adf..fc383fc 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2344,6 +2344,13 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	} else
 		ringbuf = ring->buffer;
 
+	/*
+	 * To ensure that this call will not fail, space for it's emissions
+	 * should already have been reserved in the ring buffer. Let the ring
+	 * know that it is time to use that space up.
+	 */
+	intel_ring_reserved_space_use(ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
+
 	request_start = intel_ring_get_tail(ringbuf);
 	/*
 	 * Emit any outstanding flushes - execbuf can fail to emit the flush
@@ -2426,6 +2433,9 @@ int __i915_add_request(struct intel_engine_cs *ring,
 			   round_jiffies_up_relative(HZ));
 	intel_mark_busy(dev_priv->dev);
 
+	/* Sanity check that the reserved size was large enough. */
+	intel_ring_reserved_space_end(ringbuf);
+
 	return 0;
 }
 
@@ -2551,10 +2561,47 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
 		return ret;
 	}
 
+	/*
+	 * Reserve space in the ring buffer for all the commands required to
+	 * eventually emit this request. This is to guarantee that the
+	 * i915_add_request() call can't fail. Note that the reserve may need
+	 * to be redone if the request is not actually submitted straight
+	 * away, e.g. because a GPU scheduler has deferred it.
+	 *
+	 * Note further that this call merely notes the reserve request. A
+	 * subsequent call to *_ring_begin() is required to actually ensure
+	 * that the reservation is available. Without the begin, if the
+	 * request creator immediately submitted the request without adding
+	 * any commands to it then there might not actually be sufficient
+	 * room for the submission commands. Unfortunately, the current
+	 * *_ring_begin() implementations potentially call back here to
+	 * i915_gem_request_alloc(). Thus calling _begin() here would lead to
+	 * infinite recursion! Until that back call path is removed, it is
+	 * necessary to do a manual _begin() outside.
+	 */
+	ret = intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
+	if (ret) {
+		/*
+		 * At this point, the request is fully allocated even if not
+		 * fully prepared. Thus it can be cleaned up using the proper
+		 * free code.
+		 */
+		i915_gem_request_cancel(request);
+		return ret;
+	}
+
 	ring->outstanding_lazy_request = request;
 	return 0;
 }
 
+void i915_gem_request_cancel(struct drm_i915_gem_request *req)
+{
+	intel_ring_reserved_space_use(req->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
+	intel_ring_reserved_space_end(req->ringbuf);
+
+	i915_gem_request_unreference(req);
+}
+
 struct drm_i915_gem_request *
 i915_gem_find_active_request(struct intel_engine_cs *ring)
 {
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 1c3834fc..bdbdcae 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -636,6 +636,9 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
 	struct drm_i915_gem_request *request;
 	int ret, new_space;
 
+	/* The whole point of reserving space is to not wait! */
+	WARN_ON(ringbuf->reserved_in_use);
+
 	if (intel_ring_space(ringbuf) >= bytes)
 		return 0;
 
@@ -704,6 +707,9 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 	unsigned long end;
 	int ret;
 
+	/* The whole point of reserving space is to not wait! */
+	WARN_ON(ringbuf->reserved_in_use);
+
 	ret = logical_ring_wait_request(ringbuf, bytes);
 	if (ret != -ENOSPC)
 		return ret;
@@ -750,6 +756,9 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
 	uint32_t __iomem *virt;
 	int rem = ringbuf->size - ringbuf->tail;
 
+	/* Can't wrap if space has already been reserved! */
+	WARN_ON(ringbuf->reserved_in_use);
+
 	if (ringbuf->space < rem) {
 		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
 
@@ -773,6 +782,9 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
 {
 	int ret;
 
+	if (!ringbuf->reserved_in_use)
+		bytes += ringbuf->reserved_size;
+
 	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
 		ret = logical_ring_wrap_buffer(ringbuf, ctx);
 		if (unlikely(ret))
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index a26bdf8..9075008 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2061,6 +2061,9 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
 	struct drm_i915_gem_request *request;
 	int ret, new_space;
 
+	/* The whole point of reserving space is to not wait! */
+	WARN_ON(ringbuf->reserved_in_use);
+
 	if (intel_ring_space(ringbuf) >= n)
 		return 0;
 
@@ -2093,6 +2096,9 @@ static int ring_wait_for_space(struct intel_engine_cs *ring, int n)
 	unsigned long end;
 	int ret;
 
+	/* The whole point of reserving space is to not wait! */
+	WARN_ON(ringbuf->reserved_in_use);
+
 	ret = intel_ring_wait_request(ring, n);
 	if (ret != -ENOSPC)
 		return ret;
@@ -2143,6 +2149,9 @@ static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
 	struct intel_ringbuffer *ringbuf = ring->buffer;
 	int rem = ringbuf->size - ringbuf->tail;
 
+	/* Can't wrap if space has already been reserved! */
+	WARN_ON(ringbuf->reserved_in_use);
+
 	if (ringbuf->space < rem) {
 		int ret = ring_wait_for_space(ring, rem);
 		if (ret)
@@ -2190,12 +2199,49 @@ int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
 	return 0;
 }
 
-static int __intel_ring_prepare(struct intel_engine_cs *ring,
-				int bytes)
+int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
+{
+	/* NB: Until request management is fully tidied up and the OLR is
+	 * removed, there are too many ways for get false hits on this
+	 * anti-recursion check! */
+	/*WARN_ON(ringbuf->reserved_size);*/
+	WARN_ON(ringbuf->reserved_in_use);
+
+	ringbuf->reserved_size = size;
+
+	/*
+	 * Really need to call _begin() here but that currently leads to
+	 * recursion problems! So just return zero and hope for the best...
+	 */
+	return 0;
+}
+
+void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size)
+{
+	WARN_ON(size > ringbuf->reserved_size);
+	WARN_ON(ringbuf->reserved_in_use);
+
+	ringbuf->reserved_in_use = true;
+	ringbuf->reserved_tail   = ringbuf->tail;
+}
+
+void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
+{
+	WARN_ON(!ringbuf->reserved_in_use);
+	WARN_ON(ringbuf->tail > ringbuf->reserved_tail + ringbuf->reserved_size);
+
+	ringbuf->reserved_size   = 0;
+	ringbuf->reserved_in_use = false;
+}
+
+static int __intel_ring_prepare(struct intel_engine_cs *ring, int bytes)
 {
 	struct intel_ringbuffer *ringbuf = ring->buffer;
 	int ret;
 
+	if (!ringbuf->reserved_in_use)
+		bytes += ringbuf->reserved_size;
+
 	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
 		ret = intel_wrap_ring_buffer(ring);
 		if (unlikely(ret))
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 6566dd4..b334459 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -104,6 +104,9 @@ struct intel_ringbuffer {
 	int space;
 	int size;
 	int effective_size;
+	int reserved_size;
+	int reserved_tail;
+	bool reserved_in_use;
 
 	/** We track the position of the requests in the ring buffer, and
 	 * when each is retired we increment last_retired_head as the GPU
@@ -442,4 +445,10 @@ intel_ring_get_request(struct intel_engine_cs *ring)
 	return ring->outstanding_lazy_request;
 }
 
+#define MIN_SPACE_FOR_ADD_REQUEST	128
+
+int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size);
+void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size);
+void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf);
+
 #endif /* _INTEL_RINGBUFFER_H_ */
-- 
1.7.9.5

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[PATCH 06/59] drm/i915: i915_add_request must not fail

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The i915_add_request() function is called to keep track of work that has been
written to the ring buffer. It adds epilogue commands to track progress (seqno
updates and such), moves the request structure onto the right list and other
such house keeping tasks. However, the work itself has already been written to
the ring and will get executed whether or not the add request call succeeds. So
no matter what goes wrong, there isn't a whole lot of point in failing the call.

At the moment, this is fine(ish). If the add request does bail early on and not
do the housekeeping, the request will still float around in the
ring->outstanding_lazy_request field and be picked up next time. It means
multiple pieces of work will be tagged as the same request and driver can't
actually wait for the first piece of work until something else has been
submitted. But it all sort of hangs together.

This patch series is all about removing the OLR and guaranteeing that each piece
of work gets its own personal request. That means that there is no more
'hoovering up of forgotten requests'. If the request does not get tracked then
it will be leaked. Thus the add request call _must_ not fail. The previous patch
should have already ensured that it _will_ not fail by removing the potential
for running out of ring space. This patch enforces the rule by actually removing
the early exit paths and the return code.

Note that if something does manage to fail and the epilogue commands don't get
written to the ring, the driver will still hang together. The request will be
added to the tracking lists. And as in the old case, any subsequent work will
generate a new seqno which will suffice for marking the old one as complete.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    6 ++--
 drivers/gpu/drm/i915/i915_gem.c              |   44 +++++++++++---------------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    2 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
 drivers/gpu/drm/i915/intel_overlay.c         |   10 +++---
 drivers/gpu/drm/i915/intel_ringbuffer.c      |    8 ++---
 7 files changed, 32 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fe6446d..7b36d4a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2748,9 +2748,9 @@ void i915_gem_init_swizzling(struct drm_device *dev);
 void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
 int __must_check i915_gem_suspend(struct drm_device *dev);
-int __i915_add_request(struct intel_engine_cs *ring,
-		       struct drm_file *file,
-		       struct drm_i915_gem_object *batch_obj);
+void __i915_add_request(struct intel_engine_cs *ring,
+			struct drm_file *file,
+			struct drm_i915_gem_object *batch_obj);
 #define i915_add_request(ring) \
 	__i915_add_request(ring, NULL, NULL)
 int __i915_wait_request(struct drm_i915_gem_request *req,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fc383fc..cdf1c9d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1159,15 +1159,12 @@ i915_gem_check_wedge(struct i915_gpu_error *error,
 int
 i915_gem_check_olr(struct drm_i915_gem_request *req)
 {
-	int ret;
-
 	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
 
-	ret = 0;
 	if (req == req->ring->outstanding_lazy_request)
-		ret = i915_add_request(req->ring);
+		i915_add_request(req->ring);
 
-	return ret;
+	return 0;
 }
 
 static void fake_irq(unsigned long data)
@@ -2325,9 +2322,14 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
 	return 0;
 }
 
-int __i915_add_request(struct intel_engine_cs *ring,
-		       struct drm_file *file,
-		       struct drm_i915_gem_object *obj)
+/*
+ * NB: This function is not allowed to fail. Doing so would mean the the
+ * request is not being tracked for completion but the work itself is
+ * going to happen on the hardware. This would be a Bad Thing(tm).
+ */
+void __i915_add_request(struct intel_engine_cs *ring,
+			struct drm_file *file,
+			struct drm_i915_gem_object *obj)
 {
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	struct drm_i915_gem_request *request;
@@ -2337,7 +2339,7 @@ int __i915_add_request(struct intel_engine_cs *ring,
 
 	request = ring->outstanding_lazy_request;
 	if (WARN_ON(request == NULL))
-		return -ENOMEM;
+		return;
 
 	if (i915.enable_execlists) {
 		ringbuf = request->ctx->engine[ring->id].ringbuf;
@@ -2359,15 +2361,12 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	 * is that the flush _must_ happen before the next request, no matter
 	 * what.
 	 */
-	if (i915.enable_execlists) {
+	if (i915.enable_execlists)
 		ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
-		if (ret)
-			return ret;
-	} else {
+	else
 		ret = intel_ring_flush_all_caches(ring);
-		if (ret)
-			return ret;
-	}
+	/* Not allowed to fail! */
+	WARN_ON(ret);
 
 	/* Record the position of the start of the request so that
 	 * should we detect the updated seqno part-way through the
@@ -2376,15 +2375,12 @@ int __i915_add_request(struct intel_engine_cs *ring,
 	 */
 	request->postfix = intel_ring_get_tail(ringbuf);
 
-	if (i915.enable_execlists) {
+	if (i915.enable_execlists)
 		ret = ring->emit_request(ringbuf, request);
-		if (ret)
-			return ret;
-	} else {
+	else
 		ret = ring->add_request(ring);
-		if (ret)
-			return ret;
-	}
+	/* Not allowed to fail! */
+	WARN_ON(ret);
 
 	request->head = request_start;
 	request->tail = intel_ring_get_tail(ringbuf);
@@ -2435,8 +2431,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
 
 	/* Sanity check that the reserved size was large enough. */
 	intel_ring_reserved_space_end(ringbuf);
-
-	return 0;
 }
 
 static inline void
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 38e2178..1bb237c 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1063,7 +1063,7 @@ i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 	ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	(void)__i915_add_request(ring, file, obj);
+	__i915_add_request(ring, file, obj);
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 521548a..ce4788f 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -173,7 +173,7 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, NULL, so.obj);
+	__i915_add_request(ring, NULL, so.obj);
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index bdbdcae..8d48761 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1352,7 +1352,7 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	ret = __i915_add_request(ring, file, so.obj);
+	__i915_add_request(ring, file, so.obj);
 	/* intel_logical_ring_add_request moves object to inactive if it
 	 * fails */
 out:
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 823d1d9..6af2581 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -219,17 +219,15 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
 	BUG_ON(overlay->last_flip_req);
 	i915_gem_request_assign(&overlay->last_flip_req,
 					     ring->outstanding_lazy_request);
-	ret = i915_add_request(ring);
-	if (ret)
-		return ret;
+	i915_add_request(ring);
 
 	overlay->flip_tail = tail;
 	ret = i915_wait_request(overlay->last_flip_req);
 	if (ret)
 		return ret;
 	i915_gem_retire_requests(dev);
-
 	i915_gem_request_assign(&overlay->last_flip_req, NULL);
+
 	return 0;
 }
 
@@ -291,7 +289,9 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	WARN_ON(overlay->last_flip_req);
 	i915_gem_request_assign(&overlay->last_flip_req,
 					     ring->outstanding_lazy_request);
-	return i915_add_request(ring);
+	i915_add_request(ring);
+
+	return 0;
 }
 
 static void intel_overlay_release_old_vid_tail(struct intel_overlay *overlay)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 9075008..1a7ed8b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2172,14 +2172,10 @@ static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
 int intel_ring_idle(struct intel_engine_cs *ring)
 {
 	struct drm_i915_gem_request *req;
-	int ret;
 
 	/* We need to add any requests required to flush the objects and ring */
-	if (ring->outstanding_lazy_request) {
-		ret = i915_add_request(ring);
-		if (ret)
-			return ret;
-	}
+	if (ring->outstanding_lazy_request)
+		i915_add_request(ring);
 
 	/* Wait upon the last request to be completed */
 	if (list_empty(&ring->request_list))
-- 
1.7.9.5

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[PATCH 07/59] drm/i915: Early alloc request in execbuff

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Start of explicit request management in the execbuffer code path. This patch
adds a call to allocate a request structure before all the actual hardware work
is done. Thus guaranteeing that all that work is tagged by a known request. At
present, nothing further is done with the request, the rest comes later in the
series.

The only noticable change is that failure to get a request (e.g. due to lack of
memory) will be caught earlier in the sequence. It now occurs right at the start
before any un-undoable work has been done.

v2: Simplified the error handling path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1bb237c..2504cfd 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1594,10 +1594,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	} else
 		exec_start += i915_gem_obj_offset(batch_obj, vm);
 
+	/* Allocate a request for this batch buffer nice and early. */
+	ret = i915_gem_request_alloc(ring, ctx);
+	if (ret)
+		goto err_batch_unpin;
+
 	ret = dev_priv->gt.execbuf_submit(dev, file, ring, ctx, args,
 					  &eb->vmas, batch_obj, exec_start,
 					  dispatch_flags);
 
+err_batch_unpin:
 	/*
 	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
 	 * batch vma for correctness. For less ugly and less fragility this
@@ -1606,6 +1612,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	 */
 	if (dispatch_flags & I915_DISPATCH_SECURE)
 		i915_gem_object_ggtt_unpin(batch_obj);
+
 err:
 	/* the request owns the ref now */
 	i915_gem_context_unreference(ctx);
-- 
1.7.9.5

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[PATCH 08/59] drm/i915: Set context in request from creation even in legacy mode

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In execlist mode, the context object pointer is written in to the request
structure (and reference counted) at the point of request creation. In legacy
mode, this only happens inside i915_add_request().

This patch updates the legacy code path to match the execlist version. This
allows all the intermediate code between request creation and request submission
to get at the context object given only a request structure. Thus negating the
need to pass context pointers here, there and everywhere.

v2: Moved the context reference so it does not need to be undone if the
get_seqno() fails.

v3: Fixed execlist mode always hitting a warning about invalid last_contexts
(which don't exist in execlist mode).

v4: Updated for new i915_gem_request_alloc() scheme.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c  |   14 +++++---------
 drivers/gpu/drm/i915/intel_lrc.c |   11 ++++-------
 drivers/gpu/drm/i915/intel_lrc.h |    3 +--
 3 files changed, 10 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index cdf1c9d..f35ac7f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2393,14 +2393,7 @@ void __i915_add_request(struct intel_engine_cs *ring,
 	 */
 	request->batch_obj = obj;
 
-	if (!i915.enable_execlists) {
-		/* Hold a reference to the current context so that we can inspect
-		 * it later in case a hangcheck error event fires.
-		 */
-		request->ctx = ring->last_context;
-		if (request->ctx)
-			i915_gem_context_reference(request->ctx);
-	}
+	WARN_ON(!i915.enable_execlists && (request->ctx != ring->last_context));
 
 	request->emitted_jiffies = jiffies;
 	list_add_tail(&request->list, &ring->request_list);
@@ -2545,12 +2538,15 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
 	kref_init(&request->ref);
 	request->ring = ring;
 	request->uniq = dev_private->request_uniq++;
+	request->ctx  = ctx;
+	i915_gem_context_reference(request->ctx);
 
 	if (i915.enable_execlists)
-		ret = intel_logical_ring_alloc_request_extras(request, ctx);
+		ret = intel_logical_ring_alloc_request_extras(request);
 	else
 		ret = intel_ring_alloc_request_extras(request);
 	if (ret) {
+		i915_gem_context_unreference(request->ctx);
 		kfree(request);
 		return ret;
 	}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 8d48761..a0ce65b 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -611,20 +611,17 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
 	return logical_ring_invalidate_all_caches(ringbuf, ctx);
 }
 
-int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request,
-					    struct intel_context *ctx)
+int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request)
 {
 	int ret;
 
-	if (ctx != request->ring->default_context) {
-		ret = intel_lr_context_pin(request->ring, ctx);
+	if (request->ctx != request->ring->default_context) {
+		ret = intel_lr_context_pin(request->ring, request->ctx);
 		if (ret)
 			return ret;
 	}
 
-	request->ringbuf = ctx->engine[request->ring->id].ringbuf;
-	request->ctx     = ctx;
-	i915_gem_context_reference(request->ctx);
+	request->ringbuf = request->ctx->engine[request->ring->id].ringbuf;
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 04d3a6d..4148de0 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -36,8 +36,7 @@
 #define RING_CONTEXT_STATUS_PTR(ring)	((ring)->mmio_base+0x3a0)
 
 /* Logical Rings */
-int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request,
-					    struct intel_context *ctx);
+int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request);
 void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
-- 
1.7.9.5

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[PATCH 09/59] drm/i915: Merged the many do_execbuf() parameters into a structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The do_execbuf() function takes quite a few parameters. The actual set of
parameters is going to change with the conversion to passing requests around.
Further, it is due to grow massively with the arrival of the GPU scheduler.

This patch simplifies the prototype by passing a parameter structure instead.
Changing the parameter set in the future is then simply a matter of
adding/removing items to the structure.

Note that the structure does not contain absolutely everything that is passed
in. This is because the intention is to use this structure more extensively
later in this patch series and more especially in the GPU scheduler that is
coming soon. The latter requires hanging on to the structure as the final
hardware submission can be delayed until long after the execbuf IOCTL has
returned to user land. Thus it is unsafe to put anything in the structure that
is local to the IOCTL call itself - such as the 'args' parameter. All entries
must be copies of data or pointers to structures that are reference counted in
some way and guaranteed to exist for the duration of the batch buffer's life.

v2: Rebased to newer tree and updated for changes to the command parser.
Specifically, a code shuffle has required saving the batch start address in the
params structure.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |   28 +++++++------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   61 ++++++++++++++++++----------
 drivers/gpu/drm/i915/intel_lrc.c           |   26 ++++++------
 drivers/gpu/drm/i915/intel_lrc.h           |    9 ++--
 4 files changed, 71 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7b36d4a..6ae99ce 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1558,6 +1558,17 @@ struct i915_virtual_gpu {
 	bool active;
 };
 
+struct i915_execbuffer_params {
+	struct drm_device               *dev;
+	struct drm_file                 *file;
+	uint32_t                        dispatch_flags;
+	uint32_t                        args_batch_start_offset;
+	uint32_t                        batch_obj_vm_offset;
+	struct intel_engine_cs          *ring;
+	struct drm_i915_gem_object      *batch_obj;
+	struct intel_context            *ctx;
+};
+
 struct drm_i915_private {
 	struct drm_device *dev;
 	struct kmem_cache *slab;
@@ -1812,13 +1823,9 @@ struct drm_i915_private {
 
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
-		int (*execbuf_submit)(struct drm_device *dev, struct drm_file *file,
-				      struct intel_engine_cs *ring,
-				      struct intel_context *ctx,
+		int (*execbuf_submit)(struct i915_execbuffer_params *params,
 				      struct drm_i915_gem_execbuffer2 *args,
-				      struct list_head *vmas,
-				      struct drm_i915_gem_object *batch_obj,
-				      u64 exec_start, u32 flags);
+				      struct list_head *vmas);
 		int (*init_rings)(struct drm_device *dev);
 		void (*cleanup_ring)(struct intel_engine_cs *ring);
 		void (*stop_ring)(struct intel_engine_cs *ring);
@@ -2569,14 +2576,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 					 struct drm_file *file,
 					 struct intel_engine_cs *ring,
 					 struct drm_i915_gem_object *obj);
-int i915_gem_ringbuffer_submission(struct drm_device *dev,
-				   struct drm_file *file,
-				   struct intel_engine_cs *ring,
-				   struct intel_context *ctx,
+int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
-				   struct list_head *vmas,
-				   struct drm_i915_gem_object *batch_obj,
-				   u64 exec_start, u32 flags);
+				   struct list_head *vmas);
 int i915_gem_execbuffer(struct drm_device *dev, void *data,
 			struct drm_file *file_priv);
 int i915_gem_execbuffer2(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 2504cfd..2fffd99 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1185,17 +1185,15 @@ err:
 }
 
 int
-i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags)
+			       struct list_head *vmas)
 {
 	struct drm_clip_rect *cliprects = NULL;
+	struct drm_device *dev = params->dev;
+	struct intel_engine_cs *ring = params->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	u64 exec_len;
+	u64 exec_start, exec_len;
 	int instp_mode;
 	u32 instp_mask;
 	int i, ret = 0;
@@ -1247,7 +1245,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 	if (ret)
 		goto error;
 
-	ret = i915_switch_context(ring, ctx);
+	ret = i915_switch_context(ring, params->ctx);
 	if (ret)
 		goto error;
 
@@ -1304,12 +1302,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 	}
 
 	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
-		ret = i915_reset_gen7_sol_offsets(dev, ring);
+		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
 		if (ret)
 			goto error;
 	}
 
-	exec_len = args->batch_len;
+	exec_len   = args->batch_len;
+	exec_start = params->batch_obj_vm_offset +
+		     params->args_batch_start_offset;
+
 	if (cliprects) {
 		for (i = 0; i < args->num_cliprects; i++) {
 			ret = i915_emit_box(ring, &cliprects[i],
@@ -1319,22 +1320,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
 
 			ret = ring->dispatch_execbuffer(ring,
 							exec_start, exec_len,
-							dispatch_flags);
+							params->dispatch_flags);
 			if (ret)
 				goto error;
 		}
 	} else {
 		ret = ring->dispatch_execbuffer(ring,
 						exec_start, exec_len,
-						dispatch_flags);
+						params->dispatch_flags);
 		if (ret)
 			return ret;
 	}
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
+					    params->batch_obj);
 
 error:
 	kfree(cliprects);
@@ -1404,8 +1406,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct intel_engine_cs *ring;
 	struct intel_context *ctx;
 	struct i915_address_space *vm;
+	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
+	struct i915_execbuffer_params *params = &params_master;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
-	u64 exec_start = args->batch_start_offset;
 	u32 dispatch_flags;
 	int ret;
 	bool need_relocs;
@@ -1498,6 +1501,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	else
 		vm = &dev_priv->gtt.base;
 
+	memset(&params_master, 0x00, sizeof(params_master));
+
 	eb = eb_create(args);
 	if (eb == NULL) {
 		i915_gem_context_unreference(ctx);
@@ -1567,8 +1572,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		if (USES_FULL_PPGTT(dev))
 			dispatch_flags |= I915_DISPATCH_SECURE;
 
-		exec_start = 0;
-	}
+		params->args_batch_start_offset = 0;
+	} else
+		params->args_batch_start_offset = args->batch_start_offset;
 
 	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
 
@@ -1590,18 +1596,29 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		if (ret)
 			goto err;
 
-		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
+		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
 	} else
-		exec_start += i915_gem_obj_offset(batch_obj, vm);
+		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
 	/* Allocate a request for this batch buffer nice and early. */
 	ret = i915_gem_request_alloc(ring, ctx);
 	if (ret)
 		goto err_batch_unpin;
 
-	ret = dev_priv->gt.execbuf_submit(dev, file, ring, ctx, args,
-					  &eb->vmas, batch_obj, exec_start,
-					  dispatch_flags);
+	/*
+	 * Save assorted stuff away to pass through to *_submission().
+	 * NB: This data should be 'persistent' and not local as it will
+	 * kept around beyond the duration of the IOCTL once the GPU
+	 * scheduler arrives.
+	 */
+	params->dev                     = dev;
+	params->file                    = file;
+	params->ring                    = ring;
+	params->dispatch_flags          = dispatch_flags;
+	params->batch_obj               = batch_obj;
+	params->ctx                     = ctx;
+
+	ret = dev_priv->gt.execbuf_submit(params, args, &eb->vmas);
 
 err_batch_unpin:
 	/*
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index a0ce65b..c0d97e97 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -853,16 +853,15 @@ static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
  *
  * Return: non-zero if the submission fails.
  */
-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+int intel_execlists_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags)
+			       struct list_head *vmas)
 {
+	struct drm_device       *dev = params->dev;
+	struct intel_engine_cs  *ring = params->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
+	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
+	u64 exec_start;
 	int instp_mode;
 	u32 instp_mask;
 	int ret;
@@ -913,13 +912,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		return -EINVAL;
 	}
 
-	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
+	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
 	if (ret)
 		return ret;
 
 	if (ring == &dev_priv->ring[RCS] &&
 	    instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
 		if (ret)
 			return ret;
 
@@ -932,14 +931,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
 		dev_priv->relative_constants_mode = instp_mode;
 	}
 
-	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
+	exec_start = params->batch_obj_vm_offset +
+		     args->batch_start_offset;
+
+	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
+	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
+	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 4148de0..bf137c4 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -76,13 +76,10 @@ void intel_lr_context_reset(struct drm_device *dev,
 
 /* Execlists */
 int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
-int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
-			       struct intel_engine_cs *ring,
-			       struct intel_context *ctx,
+struct i915_execbuffer_params;
+int intel_execlists_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
-			       struct list_head *vmas,
-			       struct drm_i915_gem_object *batch_obj,
-			       u64 exec_start, u32 dispatch_flags);
+			       struct list_head *vmas);
 u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
 
 void intel_lrc_irq_handler(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 10/59] drm/i915: Simplify i915_gem_execbuffer_retire_commands() parameters

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Shrunk the parameter list of i915_gem_execbuffer_retire_commands() to a single
structure as everything it requires is available in the execbuff_params object.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    5 +----
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   12 ++++--------
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 3 files changed, 6 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6ae99ce..e2d5790 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2572,10 +2572,7 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
 			     struct drm_file *file_priv);
 void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 					struct intel_engine_cs *ring);
-void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
-					 struct drm_file *file,
-					 struct intel_engine_cs *ring,
-					 struct drm_i915_gem_object *obj);
+void i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
 int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
 				   struct list_head *vmas);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 2fffd99..f9da0ad 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1054,16 +1054,13 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 }
 
 void
-i915_gem_execbuffer_retire_commands(struct drm_device *dev,
-				    struct drm_file *file,
-				    struct intel_engine_cs *ring,
-				    struct drm_i915_gem_object *obj)
+i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 {
 	/* Unconditionally force add_request to emit a full flush. */
-	ring->gpu_caches_dirty = true;
+	params->ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	__i915_add_request(ring, file, obj);
+	__i915_add_request(params->ring, params->file, params->batch_obj);
 }
 
 static int
@@ -1335,8 +1332,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
-					    params->batch_obj);
+	i915_gem_execbuffer_retire_commands(params);
 
 error:
 	kfree(cliprects);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c0d97e97..21af5d6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -941,7 +941,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
-	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
+	i915_gem_execbuffer_retire_commands(params);
 
 	return 0;
 }
-- 
1.7.9.5

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[PATCH 11/59] drm/i915: Update alloc_request to return the allocated request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The alloc_request() function does not actually return the newly allocated
request. Instead, it must be pulled from ring->outstanding_lazy_request. This
patch fixes this so that code can create a request and start using it knowing
exactly which request it actually owns.

v2: Updated for new i915_gem_request_alloc() scheme.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
 drivers/gpu/drm/i915/i915_gem.c            |   10 +++++++---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
 drivers/gpu/drm/i915/intel_lrc.c           |    3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
 5 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e2d5790..2c2c8a9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2121,7 +2121,8 @@ struct drm_i915_gem_request {
 };
 
 int i915_gem_request_alloc(struct intel_engine_cs *ring,
-			   struct intel_context *ctx);
+			   struct intel_context *ctx,
+			   struct drm_i915_gem_request **req_out);
 void i915_gem_request_cancel(struct drm_i915_gem_request *req);
 void i915_gem_request_free(struct kref *req_ref);
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f35ac7f..9a335d5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2516,13 +2516,17 @@ void i915_gem_request_free(struct kref *req_ref)
 }
 
 int i915_gem_request_alloc(struct intel_engine_cs *ring,
-			   struct intel_context *ctx)
+			   struct intel_context *ctx,
+			   struct drm_i915_gem_request **req_out)
 {
 	int ret;
 	struct drm_i915_gem_request *request;
 	struct drm_i915_private *dev_private = ring->dev->dev_private;
 
-	if (ring->outstanding_lazy_request)
+	if (!req_out)
+		return -EINVAL;
+
+	if ((*req_out = ring->outstanding_lazy_request) != NULL)
 		return 0;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
@@ -2580,7 +2584,7 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
 		return ret;
 	}
 
-	ring->outstanding_lazy_request = request;
+	*req_out = ring->outstanding_lazy_request = request;
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index f9da0ad..38f6c76 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1404,6 +1404,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct i915_address_space *vm;
 	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
 	struct i915_execbuffer_params *params = &params_master;
+	struct drm_i915_gem_request *request;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u32 dispatch_flags;
 	int ret;
@@ -1597,7 +1598,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
 	/* Allocate a request for this batch buffer nice and early. */
-	ret = i915_gem_request_alloc(ring, ctx);
+	ret = i915_gem_request_alloc(ring, ctx, &request);
 	if (ret)
 		goto err_batch_unpin;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 21af5d6..ecd293a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -813,6 +813,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
 static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 				    struct intel_context *ctx, int num_dwords)
 {
+	struct drm_i915_gem_request *req;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -828,7 +829,7 @@ static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = i915_gem_request_alloc(ring, ctx);
+	ret = i915_gem_request_alloc(ring, ctx, &req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 1a7ed8b..958da01 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2256,6 +2256,7 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring, int bytes)
 int intel_ring_begin(struct intel_engine_cs *ring,
 		     int num_dwords)
 {
+	struct drm_i915_gem_request *req;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	int ret;
 
@@ -2269,7 +2270,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 		return ret;
 
 	/* Preallocate the olr before touching the ring */
-	ret = i915_gem_request_alloc(ring, ring->default_context);
+	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
-- 
1.7.9.5

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[PATCH 12/59] drm/i915: Add request to execbuf params and add explicit cleanup

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Rather than just having a local request variable in the execbuff code, the
request pointer is now stored in the execbuff params structure. Also added
explicit cleanup of the request (plus wiping the OLR to match) in the error
case. This means that the execbuff code is no longer dependent upon the OLR
keeping track of the request so as to not leak it when things do go wrong. Note
that in the success case, the i915_add_request() at the end of the submission
function will tidy up the request and clear the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    1 +
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   13 +++++++++++--
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2c2c8a9..d9e9693 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1567,6 +1567,7 @@ struct i915_execbuffer_params {
 	struct intel_engine_cs          *ring;
 	struct drm_i915_gem_object      *batch_obj;
 	struct intel_context            *ctx;
+	struct drm_i915_gem_request     *request;
 };
 
 struct drm_i915_private {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 38f6c76..f14bd69 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1404,7 +1404,6 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	struct i915_address_space *vm;
 	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
 	struct i915_execbuffer_params *params = &params_master;
-	struct drm_i915_gem_request *request;
 	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 	u32 dispatch_flags;
 	int ret;
@@ -1598,7 +1597,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
 
 	/* Allocate a request for this batch buffer nice and early. */
-	ret = i915_gem_request_alloc(ring, ctx, &request);
+	ret = i915_gem_request_alloc(ring, ctx, &params->request);
 	if (ret)
 		goto err_batch_unpin;
 
@@ -1632,6 +1631,16 @@ err:
 	i915_gem_context_unreference(ctx);
 	eb_destroy(eb);
 
+	/*
+	 * If the request was created but not successfully submitted then it
+	 * must be freed again. If it was submitted then it is being tracked
+	 * on the active request list and no clean up is required here.
+	 */
+	if (ret && params->request) {
+		i915_gem_request_cancel(params->request);
+		ring->outstanding_lazy_request = NULL;
+	}
+
 	mutex_unlock(&dev->struct_mutex);
 
 pre_mutex_err:
-- 
1.7.9.5

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[PATCH 13/59] drm/i915: Update the dispatch tracepoint to use params->request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated a couple of trace points to use the now cached request pointer rather
than extracting it from the ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index f14bd69..0b705cb 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1329,7 +1329,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			return ret;
 	}
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
+	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 	i915_gem_execbuffer_retire_commands(params);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ecd293a..4c72c11b 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -939,7 +939,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
+	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
 	i915_gem_execbuffer_move_to_active(vmas, ring);
 	i915_gem_execbuffer_retire_commands(params);
-- 
1.7.9.5

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[PATCH 14/59] drm/i915: Update move_to_gpu() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the move_to_gpu() code paths.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   10 +++++-----
 drivers/gpu/drm/i915/intel_lrc.c           |   10 ++++------
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 0b705cb..7c7ec0c 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -892,7 +892,7 @@ err:
 }
 
 static int
-i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
+i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
 				struct list_head *vmas)
 {
 	struct i915_vma *vma;
@@ -902,7 +902,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
 
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
-		ret = i915_gem_object_sync(obj, ring);
+		ret = i915_gem_object_sync(obj, req->ring);
 		if (ret)
 			return ret;
 
@@ -913,7 +913,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
 	}
 
 	if (flush_chipset)
-		i915_gem_chipset_flush(ring->dev);
+		i915_gem_chipset_flush(req->ring->dev);
 
 	if (flush_domains & I915_GEM_DOMAIN_GTT)
 		wmb();
@@ -921,7 +921,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_engine_cs *ring,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return intel_ring_invalidate_all_caches(ring);
+	return intel_ring_invalidate_all_caches(req->ring);
 }
 
 static bool
@@ -1238,7 +1238,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 		}
 	}
 
-	ret = i915_gem_execbuffer_move_to_gpu(ring, vmas);
+	ret = i915_gem_execbuffer_move_to_gpu(params->request, vmas);
 	if (ret)
 		goto error;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4c72c11b..4ed3621 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -579,11 +579,9 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
-				 struct intel_context *ctx,
+static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 				 struct list_head *vmas)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
 	struct i915_vma *vma;
 	uint32_t flush_domains = 0;
 	bool flush_chipset = false;
@@ -592,7 +590,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
 
-		ret = i915_gem_object_sync(obj, ring);
+		ret = i915_gem_object_sync(obj, req->ring);
 		if (ret)
 			return ret;
 
@@ -608,7 +606,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return logical_ring_invalidate_all_caches(ringbuf, ctx);
+	return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx);
 }
 
 int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request)
@@ -913,7 +911,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 		return -EINVAL;
 	}
 
-	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
+	ret = execlists_move_to_gpu(params->request, vmas);
 	if (ret)
 		return ret;
 
-- 
1.7.9.5

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[PATCH 15/59] drm/i915: Update execbuffer_move_to_active() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the
execbuffer_move_to_active() code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    6 +++---
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d9e9693..d3b718e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2573,7 +2573,7 @@ int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
 int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
 			     struct drm_file *file_priv);
 void i915_gem_execbuffer_move_to_active(struct list_head *vmas,
-					struct intel_engine_cs *ring);
+					struct drm_i915_gem_request *req);
 void i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params);
 int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 				   struct drm_i915_gem_execbuffer2 *args,
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 7c7ec0c..3173550 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1014,9 +1014,9 @@ i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
 
 void
 i915_gem_execbuffer_move_to_active(struct list_head *vmas,
-				   struct intel_engine_cs *ring)
+				   struct drm_i915_gem_request *req)
 {
-	struct drm_i915_gem_request *req = intel_ring_get_request(ring);
+	struct intel_engine_cs *ring = i915_gem_request_get_ring(req);
 	struct i915_vma *vma;
 
 	list_for_each_entry(vma, vmas, exec_list) {
@@ -1331,7 +1331,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
-	i915_gem_execbuffer_move_to_active(vmas, ring);
+	i915_gem_execbuffer_move_to_active(vmas, params->request);
 	i915_gem_execbuffer_retire_commands(params);
 
 error:
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4ed3621..8c69f88 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -939,7 +939,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 
 	trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags);
 
-	i915_gem_execbuffer_move_to_active(vmas, ring);
+	i915_gem_execbuffer_move_to_active(vmas, params->request);
 	i915_gem_execbuffer_retire_commands(params);
 
 	return 0;
-- 
1.7.9.5

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[PATCH 16/59] drm/i915: Add flag to i915_add_request() to skip the cache flush

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In order to explcitly track all GPU work (and completely remove the outstanding
lazy request), it is necessary to add extra i915_add_request() calls to various
places. Some of these do not need the implicit cache flush done as part of the
standard batch buffer submission process.

This patch adds a flag to _add_request() to specify whether the flush is
required or not.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    7 +++++--
 drivers/gpu/drm/i915/i915_gem.c              |   17 ++++++++++-------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    2 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
 5 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d3b718e..4bcb43f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2751,9 +2751,12 @@ int __must_check i915_gpu_idle(struct drm_device *dev);
 int __must_check i915_gem_suspend(struct drm_device *dev);
 void __i915_add_request(struct intel_engine_cs *ring,
 			struct drm_file *file,
-			struct drm_i915_gem_object *batch_obj);
+			struct drm_i915_gem_object *batch_obj,
+			bool flush_caches);
 #define i915_add_request(ring) \
-	__i915_add_request(ring, NULL, NULL)
+	__i915_add_request(ring, NULL, NULL, true)
+#define i915_add_request_no_flush(ring) \
+	__i915_add_request(ring, NULL, NULL, false)
 int __i915_wait_request(struct drm_i915_gem_request *req,
 			unsigned reset_counter,
 			bool interruptible,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9a335d5..f143d15 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2329,7 +2329,8 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
  */
 void __i915_add_request(struct intel_engine_cs *ring,
 			struct drm_file *file,
-			struct drm_i915_gem_object *obj)
+			struct drm_i915_gem_object *obj,
+			bool flush_caches)
 {
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	struct drm_i915_gem_request *request;
@@ -2361,12 +2362,14 @@ void __i915_add_request(struct intel_engine_cs *ring,
 	 * is that the flush _must_ happen before the next request, no matter
 	 * what.
 	 */
-	if (i915.enable_execlists)
-		ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
-	else
-		ret = intel_ring_flush_all_caches(ring);
-	/* Not allowed to fail! */
-	WARN_ON(ret);
+	if (flush_caches) {
+		if (i915.enable_execlists)
+			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
+		else
+			ret = intel_ring_flush_all_caches(ring);
+		/* Not allowed to fail! */
+		WARN_ON(ret);
+	}
 
 	/* Record the position of the start of the request so that
 	 * should we detect the updated seqno part-way through the
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 3173550..c0be7d7 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1060,7 +1060,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 	params->ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	__i915_add_request(params->ring, params->file, params->batch_obj);
+	__i915_add_request(params->ring, params->file, params->batch_obj, true);
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index ce4788f..4418616 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -173,7 +173,7 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	__i915_add_request(ring, NULL, so.obj);
+	__i915_add_request(ring, NULL, so.obj, true);
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 8c69f88..4922725 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1350,7 +1350,7 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	__i915_add_request(ring, file, so.obj);
+	__i915_add_request(ring, file, so.obj, true);
 	/* intel_logical_ring_add_request moves object to inactive if it
 	 * fails */
 out:
-- 
1.7.9.5

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[PATCH 17/59] drm/i915: Update i915_gpu_idle() to manage its own request

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Added explicit request creation and submission to the GPU idle code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c |   14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f143d15..8677293 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3115,11 +3115,23 @@ int i915_gpu_idle(struct drm_device *dev)
 	/* Flush everything onto the inactive list. */
 	for_each_ring(ring, dev_priv, i) {
 		if (!i915.enable_execlists) {
-			ret = i915_switch_context(ring, ring->default_context);
+			struct drm_i915_gem_request *req;
+
+			ret = i915_gem_request_alloc(ring, ring->default_context, &req);
 			if (ret)
 				return ret;
+
+			ret = i915_switch_context(req->ring, ring->default_context);
+			if (ret) {
+				i915_gem_request_cancel(req);
+				return ret;
+			}
+
+			i915_add_request_no_flush(req->ring);
 		}
 
+		WARN_ON(ring->outstanding_lazy_request);
+
 		ret = intel_ring_idle(ring);
 		if (ret)
 			return ret;
-- 
1.7.9.5

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[PATCH 18/59] drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The i915_gem_init_hw() function calls a bunch of smaller initialisation
functions. Multiple of which have generic sections and per ring sections. This
means multiple passes are done over the rings. Each pass writes data to the ring
which floats around in that ring's OLR until some random point in the future
when an add_request() is done by some random other piece of code.

This patch breaks i915_ppgtt_init_hw() in two with the per ring initialisation
now being done in i915_ppgtt_init_ring(). The ring looping is now done at the
top level in i915_gem_init_hw().

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c     |   25 +++++++++++++++++++------
 drivers/gpu/drm/i915/i915_gem_gtt.c |   28 +++++++++++++++-------------
 drivers/gpu/drm/i915/i915_gem_gtt.h |    1 +
 3 files changed, 35 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8677293..683fc80 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4883,19 +4883,32 @@ i915_gem_init_hw(struct drm_device *dev)
 	 */
 	init_unused_rings(dev);
 
+	ret = i915_ppgtt_init_hw(dev);
+	if (ret) {
+		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
+		goto out;
+	}
+
+	/* Need to do basic initialisation of all rings first: */
 	for_each_ring(ring, dev_priv, i) {
 		ret = ring->init_hw(ring);
 		if (ret)
 			goto out;
 	}
 
-	for (i = 0; i < NUM_L3_SLICES(dev); i++)
-		i915_gem_l3_remap(&dev_priv->ring[RCS], i);
+	/* Now it is safe to go back round and do everything else: */
+	for_each_ring(ring, dev_priv, i) {
+		if (ring->id == RCS) {
+			for (i = 0; i < NUM_L3_SLICES(dev); i++)
+				i915_gem_l3_remap(ring, i);
+		}
 
-	ret = i915_ppgtt_init_hw(dev);
-	if (ret && ret != -EIO) {
-		DRM_ERROR("PPGTT enable failed %d\n", ret);
-		i915_gem_cleanup_ringbuffer(dev);
+		ret = i915_ppgtt_init_ring(ring);
+		if (ret && ret != -EIO) {
+			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
+			i915_gem_cleanup_ringbuffer(dev);
+			goto out;
+		}
 	}
 
 	ret = i915_gem_context_enable(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index d8ff1a8..83076d7 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1280,11 +1280,6 @@ int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
 
 int i915_ppgtt_init_hw(struct drm_device *dev)
 {
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_engine_cs *ring;
-	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
-	int i, ret = 0;
-
 	/* In the case of execlists, PPGTT is enabled by the context descriptor
 	 * and the PDPs are contained within the context itself.  We don't
 	 * need to do anything here. */
@@ -1303,16 +1298,23 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
 	else
 		MISSING_CASE(INTEL_INFO(dev)->gen);
 
-	if (ppgtt) {
-		for_each_ring(ring, dev_priv, i) {
-			ret = ppgtt->switch_mm(ppgtt, ring);
-			if (ret != 0)
-				return ret;
-		}
-	}
+	return 0;
+}
 
-	return ret;
+int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
+{
+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
+	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
+
+	if (i915.enable_execlists)
+		return 0;
+
+	if (!ppgtt)
+		return 0;
+
+	return ppgtt->switch_mm(ppgtt, ring);
 }
+
 struct i915_hw_ppgtt *
 i915_ppgtt_create(struct drm_device *dev, struct drm_i915_file_private *fpriv)
 {
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index c9e93f5..2941fbb 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -311,6 +311,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
 
 int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
 int i915_ppgtt_init_hw(struct drm_device *dev);
+int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
 void i915_ppgtt_release(struct kref *kref);
 struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
 					struct drm_i915_file_private *fpriv);
-- 
1.7.9.5

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[PATCH 19/59] drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The start of day context initialisation code in i915_gem_context_enable() loops
over each ring and calls the legacy switch context or the execlist init context
code as appropriate.

This patch moves the ring looping out of that function in to the top level
caller i915_gem_init_hw(). This means the a single pass can be made over all
rings doing the PPGTT, L3 remap and context initialisation of each ring
altogether.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/i915_gem.c         |   17 +++++++++-------
 drivers/gpu/drm/i915/i915_gem_context.c |   32 +++++++++++--------------------
 3 files changed, 22 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4bcb43f..cc957d5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2889,7 +2889,7 @@ int __must_check i915_gem_context_init(struct drm_device *dev);
 void i915_gem_context_fini(struct drm_device *dev);
 void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
-int i915_gem_context_enable(struct drm_i915_private *dev_priv);
+int i915_gem_context_enable(struct intel_engine_cs *ring);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
 int i915_switch_context(struct intel_engine_cs *ring,
 			struct intel_context *to);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 683fc80..29568c4 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4883,6 +4883,8 @@ i915_gem_init_hw(struct drm_device *dev)
 	 */
 	init_unused_rings(dev);
 
+	BUG_ON(!dev_priv->ring[RCS].default_context);
+
 	ret = i915_ppgtt_init_hw(dev);
 	if (ret) {
 		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
@@ -4898,6 +4900,8 @@ i915_gem_init_hw(struct drm_device *dev)
 
 	/* Now it is safe to go back round and do everything else: */
 	for_each_ring(ring, dev_priv, i) {
+		WARN_ON(!ring->default_context);
+
 		if (ring->id == RCS) {
 			for (i = 0; i < NUM_L3_SLICES(dev); i++)
 				i915_gem_l3_remap(ring, i);
@@ -4909,14 +4913,13 @@ i915_gem_init_hw(struct drm_device *dev)
 			i915_gem_cleanup_ringbuffer(dev);
 			goto out;
 		}
-	}
 
-	ret = i915_gem_context_enable(dev_priv);
-	if (ret && ret != -EIO) {
-		DRM_ERROR("Context enable failed %d\n", ret);
-		i915_gem_cleanup_ringbuffer(dev);
-
-		goto out;
+		ret = i915_gem_context_enable(ring);
+		if (ret && ret != -EIO) {
+			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
+			i915_gem_cleanup_ringbuffer(dev);
+			goto out;
+		}
 	}
 
 out:
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 70346b0..f51faad 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -407,32 +407,22 @@ void i915_gem_context_fini(struct drm_device *dev)
 	i915_gem_context_unreference(dctx);
 }
 
-int i915_gem_context_enable(struct drm_i915_private *dev_priv)
+int i915_gem_context_enable(struct intel_engine_cs *ring)
 {
-	struct intel_engine_cs *ring;
-	int ret, i;
-
-	BUG_ON(!dev_priv->ring[RCS].default_context);
+	int ret;
 
 	if (i915.enable_execlists) {
-		for_each_ring(ring, dev_priv, i) {
-			if (ring->init_context) {
-				ret = ring->init_context(ring,
-						ring->default_context);
-				if (ret) {
-					DRM_ERROR("ring init context: %d\n",
-							ret);
-					return ret;
-				}
-			}
-		}
+		if (ring->init_context == NULL)
+			return 0;
 
+		ret = ring->init_context(ring, ring->default_context);
 	} else
-		for_each_ring(ring, dev_priv, i) {
-			ret = i915_switch_context(ring, ring->default_context);
-			if (ret)
-				return ret;
-		}
+		ret = i915_switch_context(ring, ring->default_context);
+
+	if (ret) {
+		DRM_ERROR("ring init context: %d\n", ret);
+		return ret;
+	}
 
 	return 0;
 }
-- 
1.7.9.5

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[PATCH 20/59] drm/i915: Don't tag kernel batches as user batches

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The render state initialisation code does an explicit i915_add_request() call to
commit the init commands. It was passing in the initialisation batch buffer to
add_request() as the batch object parameter. However, the batch object entry in
the request structure (which is all that parameter is used for) is meant for
keeping track of user generated batch buffers for blame tagging during GPU
hangs.

This patch clears the batch object parameter so that kernel generated batch
buffers are not tagged as being user generated.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 4418616..a32a4b9 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -173,7 +173,7 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	__i915_add_request(ring, NULL, so.obj, true);
+	__i915_add_request(ring, NULL, NULL, true);
 	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4922725..f24ab0c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1350,7 +1350,7 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	__i915_add_request(ring, file, so.obj, true);
+	__i915_add_request(ring, file, NULL, true);
 	/* intel_logical_ring_add_request moves object to inactive if it
 	 * fails */
 out:
-- 
1.7.9.5

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[PATCH 21/59] drm/i915: Add explicit request management to i915_gem_init_hw()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that a single per ring loop is being done for all the different
intialisation steps in i915_gem_init_hw(), it is possible to add proper request
management as well. The last remaining issue is that the context enable call
eventually ends up within *_render_state_init() and this does it's own private
_i915_add_request() call.

This patch adds explicit request creation and submission to the top level loop
and removes the add_request() from deep within the sub-functions. Note that the
old add_request() call was being passed a batch object. This is now explicitly
written to the request object instead. A warning has also been added to
i915_add_request() to ensure that there is never an attempt to add two batch
objects to a single request - e.g. because render_state_init() was called during
execbuffer processing.

v2: Updated for removal of batch_obj from add_request call in previous patch
(which is new to series).

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    3 ++-
 drivers/gpu/drm/i915/i915_gem.c              |   12 ++++++++++++
 drivers/gpu/drm/i915/i915_gem_render_state.c |    2 --
 drivers/gpu/drm/i915/intel_lrc.c             |    5 -----
 4 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cc957d5..aa0695b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2082,7 +2082,8 @@ struct drm_i915_gem_request {
 	struct intel_context *ctx;
 	struct intel_ringbuffer *ringbuf;
 
-	/** Batch buffer related to this request if any */
+	/** Batch buffer related to this request if any (used for
+	    error state dump only) */
 	struct drm_i915_gem_object *batch_obj;
 
 	/** Time at which this request was emitted, in jiffies. */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 29568c4..4452618 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4900,8 +4900,16 @@ i915_gem_init_hw(struct drm_device *dev)
 
 	/* Now it is safe to go back round and do everything else: */
 	for_each_ring(ring, dev_priv, i) {
+		struct drm_i915_gem_request *req;
+
 		WARN_ON(!ring->default_context);
 
+		ret = i915_gem_request_alloc(ring, ring->default_context, &req);
+		if (ret) {
+			i915_gem_cleanup_ringbuffer(dev);
+			goto out;
+		}
+
 		if (ring->id == RCS) {
 			for (i = 0; i < NUM_L3_SLICES(dev); i++)
 				i915_gem_l3_remap(ring, i);
@@ -4910,6 +4918,7 @@ i915_gem_init_hw(struct drm_device *dev)
 		ret = i915_ppgtt_init_ring(ring);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
+			i915_gem_request_cancel(req);
 			i915_gem_cleanup_ringbuffer(dev);
 			goto out;
 		}
@@ -4917,9 +4926,12 @@ i915_gem_init_hw(struct drm_device *dev)
 		ret = i915_gem_context_enable(ring);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
+			i915_gem_request_cancel(req);
 			i915_gem_cleanup_ringbuffer(dev);
 			goto out;
 		}
+
+		i915_add_request_no_flush(ring);
 	}
 
 out:
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index a32a4b9..a07b4ee 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -173,8 +173,6 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	__i915_add_request(ring, NULL, NULL, true);
-	/* __i915_add_request moves object to inactive if it fails */
 out:
 	i915_gem_render_state_fini(&so);
 	return ret;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f24ab0c..b430e51 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1330,8 +1330,6 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 {
 	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
 	struct render_state so;
-	struct drm_i915_file_private *file_priv = ctx->file_priv;
-	struct drm_file *file = file_priv ? file_priv->file : NULL;
 	int ret;
 
 	ret = i915_gem_render_state_prepare(ring, &so);
@@ -1350,9 +1348,6 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
 
 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
 
-	__i915_add_request(ring, file, NULL, true);
-	/* intel_logical_ring_add_request moves object to inactive if it
-	 * fails */
 out:
 	i915_gem_render_state_fini(&so);
 	return ret;
-- 
1.7.9.5

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[PATCH 22/59] drm/i915: Update ppgtt_init_ring() & context_enable() to take requests

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The final step in removing the OLR from i915_gem_init_hw() is to pass the newly
allocated request structure in to each step rather than passing a ring
structure. This patch updates both i915_ppgtt_init_ring() and
i915_gem_context_enable() to take request pointers.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
 drivers/gpu/drm/i915/i915_gem_context.c |    3 ++-
 drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
 drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
 5 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index aa0695b..e139f0e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2890,7 +2890,7 @@ int __must_check i915_gem_context_init(struct drm_device *dev);
 void i915_gem_context_fini(struct drm_device *dev);
 void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
-int i915_gem_context_enable(struct intel_engine_cs *ring);
+int i915_gem_context_enable(struct drm_i915_gem_request *req);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
 int i915_switch_context(struct intel_engine_cs *ring,
 			struct intel_context *to);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4452618..9d776a5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4915,7 +4915,7 @@ i915_gem_init_hw(struct drm_device *dev)
 				i915_gem_l3_remap(ring, i);
 		}
 
-		ret = i915_ppgtt_init_ring(ring);
+		ret = i915_ppgtt_init_ring(req);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
 			i915_gem_request_cancel(req);
@@ -4923,7 +4923,7 @@ i915_gem_init_hw(struct drm_device *dev)
 			goto out;
 		}
 
-		ret = i915_gem_context_enable(ring);
+		ret = i915_gem_context_enable(req);
 		if (ret && ret != -EIO) {
 			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
 			i915_gem_request_cancel(req);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index f51faad..647b48d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -407,8 +407,9 @@ void i915_gem_context_fini(struct drm_device *dev)
 	i915_gem_context_unreference(dctx);
 }
 
-int i915_gem_context_enable(struct intel_engine_cs *ring)
+int i915_gem_context_enable(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (i915.enable_execlists) {
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 83076d7..ac63572 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1301,9 +1301,9 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
 	return 0;
 }
 
-int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
+int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
 {
-	struct drm_i915_private *dev_priv = ring->dev->dev_private;
+	struct drm_i915_private *dev_priv = req->ring->dev->dev_private;
 	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
 
 	if (i915.enable_execlists)
@@ -1312,7 +1312,7 @@ int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
 	if (!ppgtt)
 		return 0;
 
-	return ppgtt->switch_mm(ppgtt, ring);
+	return ppgtt->switch_mm(ppgtt, req->ring);
 }
 
 struct i915_hw_ppgtt *
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 2941fbb..d4c7184 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -311,7 +311,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
 
 int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
 int i915_ppgtt_init_hw(struct drm_device *dev);
-int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
+int i915_ppgtt_init_ring(struct drm_i915_gem_request *req);
 void i915_ppgtt_release(struct kref *kref);
 struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
 					struct drm_i915_file_private *fpriv);
-- 
1.7.9.5

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[PATCH 23/59] drm/i915: Update i915_switch_context() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that the request is guaranteed to specify the context, it is possible to
update the context switch code to use requests rather than ring and context
pairs. This patch updates i915_switch_context() accordingly.

Also removed the warning that the request's context must match the last context
switch's context. As the context switch now gets the context object from the
request structure, there is no longer any scope for the two to become out of
step.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    3 +--
 drivers/gpu/drm/i915/i915_gem.c            |    4 +---
 drivers/gpu/drm/i915/i915_gem_context.c    |   19 +++++++++----------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 4 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e139f0e..ca070d3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2892,8 +2892,7 @@ void i915_gem_context_reset(struct drm_device *dev);
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
 int i915_gem_context_enable(struct drm_i915_gem_request *req);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
-int i915_switch_context(struct intel_engine_cs *ring,
-			struct intel_context *to);
+int i915_switch_context(struct drm_i915_gem_request *req);
 struct intel_context *
 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
 void i915_gem_context_free(struct kref *ctx_ref);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9d776a5..0a25461 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2396,8 +2396,6 @@ void __i915_add_request(struct intel_engine_cs *ring,
 	 */
 	request->batch_obj = obj;
 
-	WARN_ON(!i915.enable_execlists && (request->ctx != ring->last_context));
-
 	request->emitted_jiffies = jiffies;
 	list_add_tail(&request->list, &ring->request_list);
 	request->file_priv = NULL;
@@ -3121,7 +3119,7 @@ int i915_gpu_idle(struct drm_device *dev)
 			if (ret)
 				return ret;
 
-			ret = i915_switch_context(req->ring, ring->default_context);
+			ret = i915_switch_context(req);
 			if (ret) {
 				i915_gem_request_cancel(req);
 				return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 647b48d..26d5816 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -418,7 +418,7 @@ int i915_gem_context_enable(struct drm_i915_gem_request *req)
 
 		ret = ring->init_context(ring, ring->default_context);
 	} else
-		ret = i915_switch_context(ring, ring->default_context);
+		ret = i915_switch_context(req);
 
 	if (ret) {
 		DRM_ERROR("ring init context: %d\n", ret);
@@ -697,8 +697,7 @@ unpin_out:
 
 /**
  * i915_switch_context() - perform a GPU context switch.
- * @ring: ring for which we'll execute the context switch
- * @to: the context to switch to
+ * @req: request for which we'll execute the context switch
  *
  * The context life cycle is simple. The context refcount is incremented and
  * decremented by 1 and create and destroy. If the context is in use by the GPU,
@@ -709,25 +708,25 @@ unpin_out:
  * switched by writing to the ELSP and requests keep a reference to their
  * context.
  */
-int i915_switch_context(struct intel_engine_cs *ring,
-			struct intel_context *to)
+int i915_switch_context(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 
 	WARN_ON(i915.enable_execlists);
 	WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
-	if (to->legacy_hw_ctx.rcs_state == NULL) { /* We have the fake context */
-		if (to != ring->last_context) {
-			i915_gem_context_reference(to);
+	if (req->ctx->legacy_hw_ctx.rcs_state == NULL) { /* We have the fake context */
+		if (req->ctx != ring->last_context) {
+			i915_gem_context_reference(req->ctx);
 			if (ring->last_context)
 				i915_gem_context_unreference(ring->last_context);
-			ring->last_context = to;
+			ring->last_context = req->ctx;
 		}
 		return 0;
 	}
 
-	return do_switch(ring, to);
+	return do_switch(req->ring, req->ctx);
 }
 
 static bool contexts_enabled(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index c0be7d7..eca88a6 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1242,7 +1242,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 	if (ret)
 		goto error;
 
-	ret = i915_switch_context(ring, params->ctx);
+	ret = i915_switch_context(params->request);
 	if (ret)
 		goto error;
 
-- 
1.7.9.5

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[PATCH 24/59] drm/i915: Update do_switch() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated do_switch() to take a request pointer instead of a ring/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>

v2: Removed some overzealous req-> dereferencing.
---
 drivers/gpu/drm/i915/i915_gem_context.c |    7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 26d5816..78e9c9c 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -560,9 +560,10 @@ mi_set_context(struct intel_engine_cs *ring,
 	return ret;
 }
 
-static int do_switch(struct intel_engine_cs *ring,
-		     struct intel_context *to)
+static int do_switch(struct drm_i915_gem_request *req)
 {
+	struct intel_context *to = req->ctx;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	struct intel_context *from = ring->last_context;
 	u32 hw_flags = 0;
@@ -726,7 +727,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
 		return 0;
 	}
 
-	return do_switch(req->ring, req->ctx);
+	return do_switch(req);
 }
 
 static bool contexts_enabled(struct drm_device *dev)
-- 
1.7.9.5

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[PATCH 25/59] drm/i915: Update deferred context creation to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In execlist mode, context initialisation is deferred until first use of the
given context. This is because execlist mode has many more contexts than legacy
mode and many are never actually used. Previously, the initialisation commands
were written to the ring and tagged with some random request structure via the
OLR. This seemed to be causing a null pointer deference bug under certain
circumstances (BZ:88865).

This patch adds explicit request creation and submission to the deferred
initialisation code path. Thus removing any reliance on or randomness caused by
the OLR.

Note that it should be possible to move the deferred context creation until even
later - when the context is actually switched to rather than when it is merely
validated. This would allow the initialisation to be done within the request of
the work that is wanting to use the context. Hence, the extra request that is
created, used and retired just for the context init could be removed completely.
However, this is left for a follow up patch.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index b430e51..c77a74b 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1949,13 +1949,22 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
 		lrc_setup_hardware_status_page(ring, ctx_obj);
 	else if (ring->id == RCS && !ctx->rcs_initialized) {
 		if (ring->init_context) {
-			ret = ring->init_context(ring, ctx);
+			struct drm_i915_gem_request *req;
+
+			ret = i915_gem_request_alloc(ring, ctx, &req);
+			if (ret)
+				return ret;
+
+			ret = ring->init_context(req->ring, ctx);
 			if (ret) {
 				DRM_ERROR("ring init context: %d\n", ret);
+				i915_gem_request_cancel(req);
 				ctx->engine[ring->id].ringbuf = NULL;
 				ctx->engine[ring->id].state = NULL;
 				goto error;
 			}
+
+			i915_add_request_no_flush(req->ring);
 		}
 
 		ctx->rcs_initialized = true;
-- 
1.7.9.5

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[PATCH 26/59] drm/i915: Update init_context() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use requests, it is possible to
update init_context() to take a request pointer instead of a ring/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    4 ++--
 drivers/gpu/drm/i915/intel_lrc.c        |    9 ++++-----
 drivers/gpu/drm/i915/intel_ringbuffer.c |    7 +++----
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 4 files changed, 10 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 78e9c9c..75b9d78 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -416,7 +416,7 @@ int i915_gem_context_enable(struct drm_i915_gem_request *req)
 		if (ring->init_context == NULL)
 			return 0;
 
-		ret = ring->init_context(ring, ring->default_context);
+		ret = ring->init_context(req);
 	} else
 		ret = i915_switch_context(req);
 
@@ -682,7 +682,7 @@ done:
 
 	if (uninitialized) {
 		if (ring->init_context) {
-			ret = ring->init_context(ring, to);
+			ret = ring->init_context(req);
 			if (ret)
 				DRM_ERROR("ring init context: %d\n", ret);
 		}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c77a74b..46df37c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1353,16 +1353,15 @@ out:
 	return ret;
 }
 
-static int gen8_init_rcs_context(struct intel_engine_cs *ring,
-		       struct intel_context *ctx)
+static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_logical_ring_workarounds_emit(ring, ctx);
+	ret = intel_logical_ring_workarounds_emit(req->ring, req->ctx);
 	if (ret)
 		return ret;
 
-	return intel_lr_context_render_state_init(ring, ctx);
+	return intel_lr_context_render_state_init(req->ring, req->ctx);
 }
 
 /**
@@ -1955,7 +1954,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
 			if (ret)
 				return ret;
 
-			ret = ring->init_context(req->ring, ctx);
+			ret = ring->init_context(req);
 			if (ret) {
 				DRM_ERROR("ring init context: %d\n", ret);
 				i915_gem_request_cancel(req);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 958da01..f36d00d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -742,16 +742,15 @@ static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
 	return 0;
 }
 
-static int intel_rcs_ctx_init(struct intel_engine_cs *ring,
-			      struct intel_context *ctx)
+static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_ring_workarounds_emit(ring, ctx);
+	ret = intel_ring_workarounds_emit(req->ring, req->ctx);
 	if (ret != 0)
 		return ret;
 
-	ret = i915_gem_render_state_init(ring);
+	ret = i915_gem_render_state_init(req->ring);
 	if (ret)
 		DRM_ERROR("init render state: %d\n", ret);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index b334459..2dc111c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -146,8 +146,7 @@ struct  intel_engine_cs {
 
 	int		(*init_hw)(struct intel_engine_cs *ring);
 
-	int		(*init_context)(struct intel_engine_cs *ring,
-					struct intel_context *ctx);
+	int		(*init_context)(struct drm_i915_gem_request *req);
 
 	void		(*write_tail)(struct intel_engine_cs *ring,
 				      u32 value);
-- 
1.7.9.5

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[PATCH 27/59] drm/i915: Update render_state_init() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the two render_state_init() functions to take a request pointer instead
of a ring. This removes their reliance on the OLR.

v2: Rebased to newer tree.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_render_state.c |   14 +++++++-------
 drivers/gpu/drm/i915/i915_gem_render_state.h |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |   18 ++++++++----------
 drivers/gpu/drm/i915/intel_ringbuffer.c      |    2 +-
 4 files changed, 17 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index a07b4ee..6598f9b 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -152,26 +152,26 @@ int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
 	return 0;
 }
 
-int i915_gem_render_state_init(struct intel_engine_cs *ring)
+int i915_gem_render_state_init(struct drm_i915_gem_request *req)
 {
 	struct render_state so;
 	int ret;
 
-	ret = i915_gem_render_state_prepare(ring, &so);
+	ret = i915_gem_render_state_prepare(req->ring, &so);
 	if (ret)
 		return ret;
 
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = ring->dispatch_execbuffer(ring,
-					so.ggtt_offset,
-					so.rodata->batch_items * 4,
-					I915_DISPATCH_SECURE);
+	ret = req->ring->dispatch_execbuffer(req->ring,
+					     so.ggtt_offset,
+					     so.rodata->batch_items * 4,
+					     I915_DISPATCH_SECURE);
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
 
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.h b/drivers/gpu/drm/i915/i915_gem_render_state.h
index c44961e..7aa7372 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.h
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.h
@@ -39,7 +39,7 @@ struct render_state {
 	int gen;
 };
 
-int i915_gem_render_state_init(struct intel_engine_cs *ring);
+int i915_gem_render_state_init(struct drm_i915_gem_request *req);
 void i915_gem_render_state_fini(struct render_state *so);
 int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
 				  struct render_state *so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 46df37c..0480ad4 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1325,28 +1325,26 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
-					      struct intel_context *ctx)
+static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
 {
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
 	struct render_state so;
 	int ret;
 
-	ret = i915_gem_render_state_prepare(ring, &so);
+	ret = i915_gem_render_state_prepare(req->ring, &so);
 	if (ret)
 		return ret;
 
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = ring->emit_bb_start(ringbuf,
-			ctx,
-			so.ggtt_offset,
-			I915_DISPATCH_SECURE);
+	ret = req->ring->emit_bb_start(req->ringbuf,
+				       req->ctx,
+				       so.ggtt_offset,
+				       I915_DISPATCH_SECURE);
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
 
 out:
 	i915_gem_render_state_fini(&so);
@@ -1361,7 +1359,7 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	return intel_lr_context_render_state_init(req->ring, req->ctx);
+	return intel_lr_context_render_state_init(req);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f36d00d..291920e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -750,7 +750,7 @@ static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
 	if (ret != 0)
 		return ret;
 
-	ret = i915_gem_render_state_init(req->ring);
+	ret = i915_gem_render_state_init(req);
 	if (ret)
 		DRM_ERROR("init render state: %d\n", ret);
 
-- 
1.7.9.5

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[PATCH 28/59] drm/i915: Update i915_gem_object_sync() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the i915_gem_object_sync()
code path.

v2: Much more complex patch to share a single request between the sync and the
page flip. The _sync() function now supports lazy allocation of the request
structure. That is, if one is passed in then that will be used. If one is not,
then a request will be allocated and passed back out. Note that the _sync() code
does not necessarily require a request. Thus one will only be created until
certain situations. The reason the lazy allocation must be done within the
_sync() code itself is because the decision to need one or not is not really
something that code above can second guess (except in the case where one is
definitely not required because no ring is passed in).

The call chains above _sync() now support passing a request through which most
callers passing in NULL and assuming that no request will be required (because
they also pass in NULL for the ring and therefore can't be generating any ring
code).

The exeception is intel_crtc_page_flip() which now supports having a request
returned from _sync(). If one is, then that request is shared by the page flip
(if the page flip is of a type to need a request). If _sync() does not generate
a request but the page flip does need one, then the page flip path will create
it's own request.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    6 ++++--
 drivers/gpu/drm/i915/i915_gem.c            |   19 ++++++++++++++++---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_display.c       |   17 ++++++++++++-----
 drivers/gpu/drm/i915/intel_drv.h           |    3 ++-
 drivers/gpu/drm/i915/intel_fbdev.c         |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 drivers/gpu/drm/i915/intel_overlay.c       |    2 +-
 8 files changed, 38 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ca070d3..55d82a7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2665,7 +2665,8 @@ static inline void i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
 
 int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
 int i915_gem_object_sync(struct drm_i915_gem_object *obj,
-			 struct intel_engine_cs *to);
+			 struct intel_engine_cs *to,
+			 struct drm_i915_gem_request **to_req);
 void i915_vma_move_to_active(struct i915_vma *vma,
 			     struct intel_engine_cs *ring);
 int i915_gem_dumb_create(struct drm_file *file_priv,
@@ -2773,7 +2774,8 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write);
 int __must_check
 i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
 				     u32 alignment,
-				     struct intel_engine_cs *pipelined);
+				     struct intel_engine_cs *pipelined,
+				     struct drm_i915_gem_request **pipelined_request);
 void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj);
 int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj,
 				int align);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0a25461..9114071 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2957,6 +2957,9 @@ out:
  *
  * @obj: object which may be in use on another ring.
  * @to: ring we wish to use the object on. May be NULL.
+ * @to_req: request we wish to use the object for. May be NULL.
+ *          This will be allocated and returned if a request is
+ *          required but not passed in.
  *
  * This code is meant to abstract object synchronization with the GPU.
  * Calling with NULL implies synchronizing the object with the CPU
@@ -2966,7 +2969,8 @@ out:
  */
 int
 i915_gem_object_sync(struct drm_i915_gem_object *obj,
-		     struct intel_engine_cs *to)
+		     struct intel_engine_cs *to,
+		     struct drm_i915_gem_request **to_req)
 {
 	struct intel_engine_cs *from;
 	u32 seqno;
@@ -2980,6 +2984,8 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
 	if (to == NULL || !i915_semaphore_is_enabled(obj->base.dev))
 		return i915_gem_object_wait_rendering(obj, false);
 
+	WARN_ON(!to_req);
+
 	idx = intel_ring_sync_index(from, to);
 
 	seqno = i915_gem_request_get_seqno(obj->last_read_req);
@@ -2988,6 +2994,12 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
 	if (seqno <= from->semaphore.sync_seqno[idx])
 		return 0;
 
+	if (*to_req == NULL) {
+		ret = i915_gem_request_alloc(to, to->default_context, to_req);
+		if (ret)
+			return ret;
+	}
+
 	ret = i915_gem_check_olr(obj->last_read_req);
 	if (ret)
 		return ret;
@@ -3953,14 +3965,15 @@ static bool is_pin_display(struct drm_i915_gem_object *obj)
 int
 i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
 				     u32 alignment,
-				     struct intel_engine_cs *pipelined)
+				     struct intel_engine_cs *pipelined,
+				     struct drm_i915_gem_request **pipelined_request)
 {
 	u32 old_read_domains, old_write_domain;
 	bool was_pin_display;
 	int ret;
 
 	if (pipelined != i915_gem_request_get_ring(obj->last_read_req)) {
-		ret = i915_gem_object_sync(obj, pipelined);
+		ret = i915_gem_object_sync(obj, pipelined, pipelined_request);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index eca88a6..1978f9c 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -902,7 +902,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
 
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
-		ret = i915_gem_object_sync(obj, req->ring);
+		ret = i915_gem_object_sync(obj, req->ring, &req);
 		if (ret)
 			return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f1c0295..c71c523 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2245,7 +2245,8 @@ intel_fb_align_height(struct drm_device *dev, int height,
 int
 intel_pin_and_fence_fb_obj(struct drm_plane *plane,
 			   struct drm_framebuffer *fb,
-			   struct intel_engine_cs *pipelined)
+			   struct intel_engine_cs *pipelined,
+			   struct drm_i915_gem_request **pipelined_request)
 {
 	struct drm_device *dev = fb->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -2304,7 +2305,7 @@ intel_pin_and_fence_fb_obj(struct drm_plane *plane,
 	intel_runtime_pm_get(dev_priv);
 
 	dev_priv->mm.interruptible = false;
-	ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined);
+	ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined, pipelined_request);
 	if (ret)
 		goto err_interruptible;
 
@@ -9882,6 +9883,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 	enum pipe pipe = intel_crtc->pipe;
 	struct intel_unpin_work *work;
 	struct intel_engine_cs *ring;
+	struct drm_i915_gem_request *request = NULL;
 	int ret;
 
 	/*
@@ -9979,7 +9981,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 		ring = &dev_priv->ring[RCS];
 	}
 
-	ret = intel_pin_and_fence_fb_obj(crtc->primary, fb, ring);
+	ret = intel_pin_and_fence_fb_obj(crtc->primary, fb, ring, &request);
 	if (ret)
 		goto cleanup_pending;
 
@@ -10004,6 +10006,9 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 					intel_ring_get_request(ring));
 	}
 
+	if (request)
+		i915_add_request_no_flush(request->ring);
+
 	work->flip_queued_vblank = drm_crtc_vblank_count(crtc);
 	work->enable_stall_check = true;
 
@@ -10021,6 +10026,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 cleanup_unpin:
 	intel_unpin_fb_obj(obj);
 cleanup_pending:
+	if (request)
+		i915_gem_request_cancel(request);
 	atomic_dec(&intel_crtc->unpin_work_count);
 	mutex_unlock(&dev->struct_mutex);
 cleanup:
@@ -11975,7 +11982,7 @@ intel_prepare_plane_fb(struct drm_plane *plane,
 		if (ret)
 			DRM_DEBUG_KMS("failed to attach phys object\n");
 	} else {
-		ret = intel_pin_and_fence_fb_obj(plane, fb, NULL);
+		ret = intel_pin_and_fence_fb_obj(plane, fb, NULL, NULL);
 	}
 
 	if (ret == 0)
@@ -13900,7 +13907,7 @@ void intel_modeset_gem_init(struct drm_device *dev)
 
 		if (intel_pin_and_fence_fb_obj(c->primary,
 					       c->primary->fb,
-					       NULL)) {
+					       NULL, NULL)) {
 			DRM_ERROR("failed to pin boot fb on pipe %d\n",
 				  to_intel_crtc(c)->pipe);
 			drm_framebuffer_unreference(c->primary->fb);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8bb18e5..6ad2823 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -961,7 +961,8 @@ void intel_release_load_detect_pipe(struct drm_connector *connector,
 				    struct intel_load_detect_pipe *old);
 int intel_pin_and_fence_fb_obj(struct drm_plane *plane,
 			       struct drm_framebuffer *fb,
-			       struct intel_engine_cs *pipelined);
+			       struct intel_engine_cs *pipelined,
+			       struct drm_i915_gem_request **pipelined_request);
 struct drm_framebuffer *
 __intel_framebuffer_create(struct drm_device *dev,
 			   struct drm_mode_fb_cmd2 *mode_cmd,
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index 757c0d2..4e7e7da 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -151,7 +151,7 @@ static int intelfb_alloc(struct drm_fb_helper *helper,
 	}
 
 	/* Flush everything out, we'll be doing GTT only from now on */
-	ret = intel_pin_and_fence_fb_obj(NULL, fb, NULL);
+	ret = intel_pin_and_fence_fb_obj(NULL, fb, NULL, NULL);
 	if (ret) {
 		DRM_ERROR("failed to pin obj: %d\n", ret);
 		goto out_fb;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0480ad4..93faf11 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -590,7 +590,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 	list_for_each_entry(vma, vmas, exec_list) {
 		struct drm_i915_gem_object *obj = vma->obj;
 
-		ret = i915_gem_object_sync(obj, req->ring);
+		ret = i915_gem_object_sync(obj, req->ring, &req);
 		if (ret)
 			return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 6af2581..ce7797c 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -720,7 +720,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
 	if (ret != 0)
 		return ret;
 
-	ret = i915_gem_object_pin_to_display_plane(new_bo, 0, NULL);
+	ret = i915_gem_object_pin_to_display_plane(new_bo, 0, NULL, NULL);
 	if (ret != 0)
 		return ret;
 
-- 
1.7.9.5

_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 29/59] drm/i915: Update overlay code to do explicit request management

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The overlay update code path to do explicit request creation and submission
rather than relying on the OLR to do the right thing.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_overlay.c |   56 +++++++++++++++++++++++++---------
 1 file changed, 41 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index ce7797c..090fedd 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -209,17 +209,15 @@ static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
 }
 
 static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
+					 struct drm_i915_gem_request *req,
 					 void (*tail)(struct intel_overlay *))
 {
 	struct drm_device *dev = overlay->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
 	int ret;
 
 	BUG_ON(overlay->last_flip_req);
-	i915_gem_request_assign(&overlay->last_flip_req,
-					     ring->outstanding_lazy_request);
-	i915_add_request(ring);
+	i915_gem_request_assign(&overlay->last_flip_req, req);
+	i915_add_request(req->ring);
 
 	overlay->flip_tail = tail;
 	ret = i915_wait_request(overlay->last_flip_req);
@@ -237,6 +235,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 	struct drm_device *dev = overlay->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req;
 	int ret;
 
 	BUG_ON(overlay->active);
@@ -244,17 +243,23 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 
 	WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
 
-	ret = intel_ring_begin(ring, 4);
+	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
+	ret = intel_ring_begin(ring, 4);
+	if (ret) {
+		i915_gem_request_cancel(req);
+		return ret;
+	}
+
 	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_ON);
 	intel_ring_emit(ring, overlay->flip_addr | OFC_UPDATE);
 	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
 
-	return intel_overlay_do_wait_request(overlay, NULL);
+	return intel_overlay_do_wait_request(overlay, req, NULL);
 }
 
 /* overlay needs to be enabled in OCMD reg */
@@ -264,6 +269,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	struct drm_device *dev = overlay->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req;
 	u32 flip_addr = overlay->flip_addr;
 	u32 tmp;
 	int ret;
@@ -278,18 +284,23 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	if (tmp & (1 << 17))
 		DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp);
 
-	ret = intel_ring_begin(ring, 2);
+	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
+	ret = intel_ring_begin(ring, 2);
+	if (ret) {
+		i915_gem_request_cancel(req);
+		return ret;
+	}
+
 	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
 	intel_ring_emit(ring, flip_addr);
 	intel_ring_advance(ring);
 
 	WARN_ON(overlay->last_flip_req);
-	i915_gem_request_assign(&overlay->last_flip_req,
-					     ring->outstanding_lazy_request);
-	i915_add_request(ring);
+	i915_gem_request_assign(&overlay->last_flip_req, req);
+	i915_add_request(req->ring);
 
 	return 0;
 }
@@ -326,6 +337,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	struct drm_device *dev = overlay->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
+	struct drm_i915_gem_request *req;
 	u32 flip_addr = overlay->flip_addr;
 	int ret;
 
@@ -337,10 +349,16 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	 * of the hw. Do it in both cases */
 	flip_addr |= OFC_UPDATE;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
 	if (ret)
 		return ret;
 
+	ret = intel_ring_begin(ring, 6);
+	if (ret) {
+		i915_gem_request_cancel(req);
+		return ret;
+	}
+
 	/* wait for overlay to go idle */
 	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
 	intel_ring_emit(ring, flip_addr);
@@ -359,7 +377,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	}
 	intel_ring_advance(ring);
 
-	return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail);
+	return intel_overlay_do_wait_request(overlay, req, intel_overlay_off_tail);
 }
 
 /* recover from an interruption due to a signal
@@ -404,15 +422,23 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
 
 	if (I915_READ(ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT) {
 		/* synchronous slowpath */
-		ret = intel_ring_begin(ring, 2);
+		struct drm_i915_gem_request *req;
+
+		ret = i915_gem_request_alloc(ring, ring->default_context, &req);
 		if (ret)
 			return ret;
 
+		ret = intel_ring_begin(ring, 2);
+		if (ret) {
+			i915_gem_request_cancel(req);
+			return ret;
+		}
+
 		intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 		intel_ring_emit(ring, MI_NOOP);
 		intel_ring_advance(ring);
 
-		ret = intel_overlay_do_wait_request(overlay,
+		ret = intel_overlay_do_wait_request(overlay, req,
 						    intel_overlay_release_old_vid_tail);
 		if (ret)
 			return ret;
-- 
1.7.9.5

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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 30/59] drm/i915: Update queue_flip() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the display page flip code to do explicit request creation and
submission rather than relying on the OLR and just hoping that the request
actually gets submitted at some random point.

The sequence is now to create a request, queue the work to the ring, assign the
known request to the flip queue work item then actually submit the work and post
the request.

Note that every single flip function used to finish with
'__intel_ring_advance(ring);'. However, immediately after they return there is
now an add request call which will do the advance anyway. Thus the many
duplicate advance calls have been removed.

v2: Updated commit message with comment about advance removal.

v3: The request can now be allocated by the _sync() code earlier on. Thus the
page flip path does not necessarily need to allocate a new request, it may be
able to re-use one.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/intel_display.c    |   33 ++++++++++++++++++-------------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.h |    1 -
 4 files changed, 21 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 55d82a7..1fd59bc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -574,7 +574,7 @@ struct drm_i915_display_funcs {
 	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
 			  struct drm_framebuffer *fb,
 			  struct drm_i915_gem_object *obj,
-			  struct intel_engine_cs *ring,
+			  struct drm_i915_gem_request *req,
 			  uint32_t flags);
 	void (*update_primary_plane)(struct drm_crtc *crtc,
 				     struct drm_framebuffer *fb,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c71c523..c39cd34 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9418,9 +9418,10 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	u32 flip_mask;
 	int ret;
@@ -9445,7 +9446,6 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, 0); /* aux display base address, unused */
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9453,9 +9453,10 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	u32 flip_mask;
 	int ret;
@@ -9477,7 +9478,6 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, MI_NOOP);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9485,9 +9485,10 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t pf, pipesrc;
@@ -9516,7 +9517,6 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, pf | pipesrc);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9524,9 +9524,10 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t pf, pipesrc;
@@ -9552,7 +9553,6 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, pf | pipesrc);
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9560,9 +9560,10 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 				 struct drm_crtc *crtc,
 				 struct drm_framebuffer *fb,
 				 struct drm_i915_gem_object *obj,
-				 struct intel_engine_cs *ring,
+				 struct drm_i915_gem_request *req,
 				 uint32_t flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	uint32_t plane_bit = 0;
 	int len, ret;
@@ -9647,7 +9648,6 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 	intel_ring_emit(ring, (MI_NOOP));
 
 	intel_mark_page_flip_active(intel_crtc);
-	__intel_ring_advance(ring);
 	return 0;
 }
 
@@ -9803,7 +9803,7 @@ static int intel_default_queue_flip(struct drm_device *dev,
 				    struct drm_crtc *crtc,
 				    struct drm_framebuffer *fb,
 				    struct drm_i915_gem_object *obj,
-				    struct intel_engine_cs *ring,
+				    struct drm_i915_gem_request *req,
 				    uint32_t flags)
 {
 	return -ENODEV;
@@ -9997,13 +9997,18 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 		i915_gem_request_assign(&work->flip_queued_req,
 					obj->last_write_req);
 	} else {
-		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, ring,
+		if (!request) {
+			ret = i915_gem_request_alloc(ring, ring->default_context, &request);
+			if (ret)
+				goto cleanup_unpin;
+		}
+
+		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, request,
 						   page_flip_flags);
 		if (ret)
 			goto cleanup_unpin;
 
-		i915_gem_request_assign(&work->flip_queued_req,
-					intel_ring_get_request(ring));
+		i915_gem_request_assign(&work->flip_queued_req, request);
 	}
 
 	if (request)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 291920e..8a55032 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -81,7 +81,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring)
 	return dev_priv->gpu_error.stop_rings & intel_ring_flag(ring);
 }
 
-void __intel_ring_advance(struct intel_engine_cs *ring)
+static void __intel_ring_advance(struct intel_engine_cs *ring)
 {
 	struct intel_ringbuffer *ringbuf = ring->buffer;
 	ringbuf->tail &= ringbuf->size - 1;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 2dc111c..5fac101 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -412,7 +412,6 @@ int __intel_ring_space(int head, int tail, int size);
 void intel_ring_update_space(struct intel_ringbuffer *ringbuf);
 int intel_ring_space(struct intel_ringbuffer *ringbuf);
 bool intel_ring_stopped(struct intel_engine_cs *ring);
-void __intel_ring_advance(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_idle(struct intel_engine_cs *ring);
 void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
-- 
1.7.9.5

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[PATCH 31/59] drm/i915: Update add_request() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that all callers of i915_add_request() have a request pointer to hand, it is
possible to update the add request function to take a request pointer rather
than pulling it out of the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |   10 +++++-----
 drivers/gpu/drm/i915/i915_gem.c            |   22 +++++++++++-----------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
 drivers/gpu/drm/i915/intel_display.c       |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
 drivers/gpu/drm/i915/intel_overlay.c       |    4 ++--
 drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
 7 files changed, 23 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1fd59bc..7e0a095 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2751,14 +2751,14 @@ void i915_gem_init_swizzling(struct drm_device *dev);
 void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
 int __must_check i915_gem_suspend(struct drm_device *dev);
-void __i915_add_request(struct intel_engine_cs *ring,
+void __i915_add_request(struct drm_i915_gem_request *req,
 			struct drm_file *file,
 			struct drm_i915_gem_object *batch_obj,
 			bool flush_caches);
-#define i915_add_request(ring) \
-	__i915_add_request(ring, NULL, NULL, true)
-#define i915_add_request_no_flush(ring) \
-	__i915_add_request(ring, NULL, NULL, false)
+#define i915_add_request(req) \
+	__i915_add_request(req, NULL, NULL, true)
+#define i915_add_request_no_flush(req) \
+	__i915_add_request(req, NULL, NULL, false)
 int __i915_wait_request(struct drm_i915_gem_request *req,
 			unsigned reset_counter,
 			bool interruptible,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9114071..9f615bf 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1162,7 +1162,7 @@ i915_gem_check_olr(struct drm_i915_gem_request *req)
 	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
 
 	if (req == req->ring->outstanding_lazy_request)
-		i915_add_request(req->ring);
+		i915_add_request(req);
 
 	return 0;
 }
@@ -2327,25 +2327,25 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
  * request is not being tracked for completion but the work itself is
  * going to happen on the hardware. This would be a Bad Thing(tm).
  */
-void __i915_add_request(struct intel_engine_cs *ring,
+void __i915_add_request(struct drm_i915_gem_request *request,
 			struct drm_file *file,
 			struct drm_i915_gem_object *obj,
 			bool flush_caches)
 {
-	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-	struct drm_i915_gem_request *request;
+	struct intel_engine_cs *ring;
+	struct drm_i915_private *dev_priv;
 	struct intel_ringbuffer *ringbuf;
 	u32 request_start;
 	int ret;
 
-	request = ring->outstanding_lazy_request;
 	if (WARN_ON(request == NULL))
 		return;
 
-	if (i915.enable_execlists) {
-		ringbuf = request->ctx->engine[ring->id].ringbuf;
-	} else
-		ringbuf = ring->buffer;
+	ring = request->ring;
+	dev_priv = ring->dev->dev_private;
+	ringbuf = request->ringbuf;
+
+	WARN_ON(request != ring->outstanding_lazy_request);
 
 	/*
 	 * To ensure that this call will not fail, space for it's emissions
@@ -3137,7 +3137,7 @@ int i915_gpu_idle(struct drm_device *dev)
 				return ret;
 			}
 
-			i915_add_request_no_flush(req->ring);
+			i915_add_request_no_flush(req);
 		}
 
 		WARN_ON(ring->outstanding_lazy_request);
@@ -4942,7 +4942,7 @@ i915_gem_init_hw(struct drm_device *dev)
 			goto out;
 		}
 
-		i915_add_request_no_flush(ring);
+		i915_add_request_no_flush(req);
 	}
 
 out:
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1978f9c..af4718d 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1060,7 +1060,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 	params->ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	__i915_add_request(params->ring, params->file, params->batch_obj, true);
+	__i915_add_request(params->request, params->file, params->batch_obj, true);
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c39cd34..5236e59 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10012,7 +10012,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
 	}
 
 	if (request)
-		i915_add_request_no_flush(request->ring);
+		i915_add_request_no_flush(request);
 
 	work->flip_queued_vblank = drm_crtc_vblank_count(crtc);
 	work->enable_stall_check = true;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 93faf11..c7c760d 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1961,7 +1961,7 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
 				goto error;
 			}
 
-			i915_add_request_no_flush(req->ring);
+			i915_add_request_no_flush(req);
 		}
 
 		ctx->rcs_initialized = true;
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 090fedd..9eea308 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -217,7 +217,7 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
 
 	BUG_ON(overlay->last_flip_req);
 	i915_gem_request_assign(&overlay->last_flip_req, req);
-	i915_add_request(req->ring);
+	i915_add_request(req);
 
 	overlay->flip_tail = tail;
 	ret = i915_wait_request(overlay->last_flip_req);
@@ -300,7 +300,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 
 	WARN_ON(overlay->last_flip_req);
 	i915_gem_request_assign(&overlay->last_flip_req, req);
-	i915_add_request(req->ring);
+	i915_add_request(req);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 8a55032..dba1d88 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2173,8 +2173,9 @@ int intel_ring_idle(struct intel_engine_cs *ring)
 	struct drm_i915_gem_request *req;
 
 	/* We need to add any requests required to flush the objects and ring */
+	WARN_ON(ring->outstanding_lazy_request);
 	if (ring->outstanding_lazy_request)
-		i915_add_request(ring);
+		i915_add_request(ring->outstanding_lazy_request);
 
 	/* Wait upon the last request to be completed */
 	if (list_empty(&ring->request_list))
-- 
1.7.9.5

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[PATCH 32/59] drm/i915: Update [vma|object]_move_to_active() to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use request structures, it is
possible to update the lower level move_to_active() functions to be request
based as well.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |    2 +-
 drivers/gpu/drm/i915/i915_gem.c              |   17 ++++++++---------
 drivers/gpu/drm/i915/i915_gem_context.c      |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    2 +-
 drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
 6 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7e0a095..3d50f41 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2668,7 +2668,7 @@ int i915_gem_object_sync(struct drm_i915_gem_object *obj,
 			 struct intel_engine_cs *to,
 			 struct drm_i915_gem_request **to_req);
 void i915_vma_move_to_active(struct i915_vma *vma,
-			     struct intel_engine_cs *ring);
+			     struct drm_i915_gem_request *req);
 int i915_gem_dumb_create(struct drm_file *file_priv,
 			 struct drm_device *dev,
 			 struct drm_mode_create_dumb *args);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9f615bf..d8f4f3d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2180,17 +2180,16 @@ i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
 
 static void
 i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
-			       struct intel_engine_cs *ring)
+			       struct drm_i915_gem_request *req)
 {
-	struct drm_i915_gem_request *req;
-	struct intel_engine_cs *old_ring;
+	struct intel_engine_cs *new_ring, *old_ring;
 
-	BUG_ON(ring == NULL);
+	BUG_ON(req == NULL);
 
-	req = intel_ring_get_request(ring);
+	new_ring = i915_gem_request_get_ring(req);
 	old_ring = i915_gem_request_get_ring(obj->last_read_req);
 
-	if (old_ring != ring && obj->last_write_req) {
+	if (old_ring != new_ring && obj->last_write_req) {
 		/* Keep the request relative to the current ring */
 		i915_gem_request_assign(&obj->last_write_req, req);
 	}
@@ -2201,16 +2200,16 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
 		obj->active = 1;
 	}
 
-	list_move_tail(&obj->ring_list, &ring->active_list);
+	list_move_tail(&obj->ring_list, &new_ring->active_list);
 
 	i915_gem_request_assign(&obj->last_read_req, req);
 }
 
 void i915_vma_move_to_active(struct i915_vma *vma,
-			     struct intel_engine_cs *ring)
+			     struct drm_i915_gem_request *req)
 {
 	list_move_tail(&vma->mm_list, &vma->vm->active_list);
-	return i915_gem_object_move_to_active(vma->obj, ring);
+	return i915_gem_object_move_to_active(vma->obj, req);
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 75b9d78..815b691 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -656,7 +656,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 	 */
 	if (from != NULL) {
 		from->legacy_hw_ctx.rcs_state->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
-		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), ring);
+		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req);
 		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
 		 * whole damn pipeline, we don't need to explicitly mark the
 		 * object dirty. The only exception is that the context must be
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index af4718d..fac5966 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1030,7 +1030,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 			obj->base.pending_read_domains |= obj->base.read_domains;
 		obj->base.read_domains = obj->base.pending_read_domains;
 
-		i915_vma_move_to_active(vma, ring);
+		i915_vma_move_to_active(vma, req);
 		if (obj->base.write_domain) {
 			obj->dirty = 1;
 			i915_gem_request_assign(&obj->last_write_req, req);
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 6598f9b..e04cda4 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -171,7 +171,7 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
 
 out:
 	i915_gem_render_state_fini(&so);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c7c760d..5481514 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1344,7 +1344,7 @@ static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
 	if (ret)
 		goto out;
 
-	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req->ring);
+	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
 
 out:
 	i915_gem_render_state_fini(&so);
-- 
1.7.9.5

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[PATCH 33/59] drm/i915: Update l3_remap to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Converted i915_gem_l3_remap() to take a request structure instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |    2 +-
 drivers/gpu/drm/i915/i915_gem.c         |    5 +++--
 drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3d50f41..839c185 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2746,7 +2746,7 @@ int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
 int __must_check i915_gem_init(struct drm_device *dev);
 int i915_gem_init_rings(struct drm_device *dev);
 int __must_check i915_gem_init_hw(struct drm_device *dev);
-int i915_gem_l3_remap(struct intel_engine_cs *ring, int slice);
+int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice);
 void i915_gem_init_swizzling(struct drm_device *dev);
 void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d8f4f3d..0e56658 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4699,8 +4699,9 @@ err:
 	return ret;
 }
 
-int i915_gem_l3_remap(struct intel_engine_cs *ring, int slice)
+int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 reg_base = GEN7_L3LOG_BASE + (slice * 0x200);
@@ -4922,7 +4923,7 @@ i915_gem_init_hw(struct drm_device *dev)
 
 		if (ring->id == RCS) {
 			for (i = 0; i < NUM_L3_SLICES(dev); i++)
-				i915_gem_l3_remap(ring, i);
+				i915_gem_l3_remap(req, i);
 		}
 
 		ret = i915_ppgtt_init_ring(req);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 815b691..4ae3a3d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -640,7 +640,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 		if (!(to->remap_slice & (1<<i)))
 			continue;
 
-		ret = i915_gem_l3_remap(ring, i);
+		ret = i915_gem_l3_remap(req, i);
 		/* If it failed, try again next round */
 		if (ret)
 			DRM_DEBUG_DRIVER("L3 remapping failed\n");
-- 
1.7.9.5

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[PATCH 34/59] drm/i915: Update mi_set_context() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated mi_set_context() to take a request structure instead of a ring and
context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 4ae3a3d..f615fca 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -476,10 +476,9 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
 }
 
 static inline int
-mi_set_context(struct intel_engine_cs *ring,
-	       struct intel_context *new_context,
-	       u32 hw_flags)
+mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = hw_flags | MI_MM_SPACE_GTT;
 	const int num_rings =
 		/* Use an extended w/a on ivb+ if signalling from other rings */
@@ -531,7 +530,7 @@ mi_set_context(struct intel_engine_cs *ring,
 
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_emit(ring, MI_SET_CONTEXT);
-	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->legacy_hw_ctx.rcs_state) |
+	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(req->ctx->legacy_hw_ctx.rcs_state) |
 			flags);
 	/*
 	 * w/a: MI_SET_CONTEXT must always be followed by MI_NOOP
@@ -632,7 +631,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 	if (!to->legacy_hw_ctx.initialized || i915_gem_context_is_default(to))
 		hw_flags |= MI_RESTORE_INHIBIT;
 
-	ret = mi_set_context(ring, to, hw_flags);
+	ret = mi_set_context(req, hw_flags);
 	if (ret)
 		goto unpin_out;
 
-- 
1.7.9.5

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[PATCH 35/59] drm/i915: Update a bunch of execbuffer helpers to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated *_ring_invalidate_all_caches(), i915_reset_gen7_sol_offsets() and
i915_emit_box() to take request structures instead of ring or ringbuf/context
pairs.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   12 +++++++-----
 drivers/gpu/drm/i915/intel_lrc.c           |    9 ++++-----
 drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
 4 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index fac5966..e58e88b 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -921,7 +921,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return intel_ring_invalidate_all_caches(req->ring);
+	return intel_ring_invalidate_all_caches(req);
 }
 
 static bool
@@ -1065,8 +1065,9 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 
 static int
 i915_reset_gen7_sol_offsets(struct drm_device *dev,
-			    struct intel_engine_cs *ring)
+			    struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret, i;
 
@@ -1091,10 +1092,11 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
 }
 
 static int
-i915_emit_box(struct intel_engine_cs *ring,
+i915_emit_box(struct drm_i915_gem_request *req,
 	      struct drm_clip_rect *box,
 	      int DR1, int DR4)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (box->y2 <= box->y1 || box->x2 <= box->x1 ||
@@ -1299,7 +1301,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 	}
 
 	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
-		ret = i915_reset_gen7_sol_offsets(params->dev, ring);
+		ret = i915_reset_gen7_sol_offsets(params->dev, params->request);
 		if (ret)
 			goto error;
 	}
@@ -1310,7 +1312,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	if (cliprects) {
 		for (i = 0; i < args->num_cliprects; i++) {
-			ret = i915_emit_box(ring, &cliprects[i],
+			ret = i915_emit_box(params->request, &cliprects[i],
 					    args->DR1, args->DR4);
 			if (ret)
 				goto error;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 5481514..917a76c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -559,10 +559,9 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
 	return 0;
 }
 
-static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
-					      struct intel_context *ctx)
+static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = req->ring;
 	uint32_t flush_domains;
 	int ret;
 
@@ -570,7 +569,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
 	if (ring->gpu_caches_dirty)
 		flush_domains = I915_GEM_GPU_DOMAINS;
 
-	ret = ring->emit_flush(ringbuf, ctx,
+	ret = ring->emit_flush(req->ringbuf, req->ctx,
 			       I915_GEM_GPU_DOMAINS, flush_domains);
 	if (ret)
 		return ret;
@@ -606,7 +605,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
 	/* Unconditionally invalidate gpu caches and ensure that we do flush
 	 * any residual writes from the previous batch.
 	 */
-	return logical_ring_invalidate_all_caches(req->ringbuf, req->ctx);
+	return logical_ring_invalidate_all_caches(req);
 }
 
 int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index dba1d88..84885f2 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2889,8 +2889,9 @@ intel_ring_flush_all_caches(struct intel_engine_cs *ring)
 }
 
 int
-intel_ring_invalidate_all_caches(struct intel_engine_cs *ring)
+intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	uint32_t flush_domains;
 	int ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 5fac101..bc79aa3 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -416,7 +416,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring);
 int __must_check intel_ring_idle(struct intel_engine_cs *ring);
 void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
 int intel_ring_flush_all_caches(struct intel_engine_cs *ring);
-int intel_ring_invalidate_all_caches(struct intel_engine_cs *ring);
+int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);
 
 void intel_fini_pipe_control(struct intel_engine_cs *ring);
 int intel_init_pipe_control(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 36/59] drm/i915: Update workarounds_emit() to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the *_ring_workarounds_emit() functions to take requests instead of
ring/context pairs.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   14 +++++++-------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    6 +++---
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 917a76c..b2f03b9 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1056,11 +1056,11 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
 	}
 }
 
-static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
-					       struct intel_context *ctx)
+static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 {
 	int ret, i;
-	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
+	struct intel_engine_cs *ring = req->ring;
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct i915_workarounds *w = &dev_priv->workarounds;
@@ -1069,11 +1069,11 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
 		return 0;
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, ctx);
+	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
 	if (ret)
 		return ret;
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, w->count * 2 + 2);
+	ret = intel_logical_ring_begin(ringbuf, req->ctx, w->count * 2 + 2);
 	if (ret)
 		return ret;
 
@@ -1087,7 +1087,7 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
 	intel_logical_ring_advance(ringbuf);
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, ctx);
+	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
 	if (ret)
 		return ret;
 
@@ -1354,7 +1354,7 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_logical_ring_workarounds_emit(req->ring, req->ctx);
+	ret = intel_logical_ring_workarounds_emit(req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 84885f2..2c4f45c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -703,10 +703,10 @@ err:
 	return ret;
 }
 
-static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
-				       struct intel_context *ctx)
+static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 {
 	int ret, i;
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct i915_workarounds *w = &dev_priv->workarounds;
@@ -746,7 +746,7 @@ static int intel_rcs_ctx_init(struct drm_i915_gem_request *req)
 {
 	int ret;
 
-	ret = intel_ring_workarounds_emit(req->ring, req->ctx);
+	ret = intel_ring_workarounds_emit(req);
 	if (ret != 0)
 		return ret;
 
-- 
1.7.9.5

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[PATCH 37/59] drm/i915: Update flush_all_caches() to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the *_ring_flush_all_caches() functions to take requests instead of
rings or ringbuf/context pairs.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
 drivers/gpu/drm/i915/intel_lrc.c        |   11 +++++------
 drivers/gpu/drm/i915/intel_lrc.h        |    3 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c |    7 ++++---
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 5 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0e56658..95ed3a8 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2363,9 +2363,9 @@ void __i915_add_request(struct drm_i915_gem_request *request,
 	 */
 	if (flush_caches) {
 		if (i915.enable_execlists)
-			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
+			ret = logical_ring_flush_all_caches(request);
 		else
-			ret = intel_ring_flush_all_caches(ring);
+			ret = intel_ring_flush_all_caches(request);
 		/* Not allowed to fail! */
 		WARN_ON(ret);
 	}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index b2f03b9..fd80af5 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -995,16 +995,15 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring)
 	I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));
 }
 
-int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
-				  struct intel_context *ctx)
+int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (!ring->gpu_caches_dirty)
 		return 0;
 
-	ret = ring->emit_flush(ringbuf, ctx, 0, I915_GEM_GPU_DOMAINS);
+	ret = ring->emit_flush(req->ringbuf, req->ctx, 0, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -1069,7 +1068,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 		return 0;
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
+	ret = logical_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
@@ -1087,7 +1086,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	intel_logical_ring_advance(ringbuf);
 
 	ring->gpu_caches_dirty = true;
-	ret = logical_ring_flush_all_caches(ringbuf, req->ctx);
+	ret = logical_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index bf137c4..044c0e5 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -41,8 +41,7 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
 
-int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
-				  struct intel_context *ctx);
+int logical_ring_flush_all_caches(struct drm_i915_gem_request *req);
 /**
  * intel_logical_ring_advance() - advance the ringbuffer tail
  * @ringbuf: Ringbuffer to advance.
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2c4f45c..b7646b7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -715,7 +715,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 		return 0;
 
 	ring->gpu_caches_dirty = true;
-	ret = intel_ring_flush_all_caches(ring);
+	ret = intel_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
@@ -733,7 +733,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	intel_ring_advance(ring);
 
 	ring->gpu_caches_dirty = true;
-	ret = intel_ring_flush_all_caches(ring);
+	ret = intel_ring_flush_all_caches(req);
 	if (ret)
 		return ret;
 
@@ -2871,8 +2871,9 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
 }
 
 int
-intel_ring_flush_all_caches(struct intel_engine_cs *ring)
+intel_ring_flush_all_caches(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (!ring->gpu_caches_dirty)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index bc79aa3..2d059d1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -415,7 +415,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring);
 
 int __must_check intel_ring_idle(struct intel_engine_cs *ring);
 void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
-int intel_ring_flush_all_caches(struct intel_engine_cs *ring);
+int intel_ring_flush_all_caches(struct drm_i915_gem_request *req);
 int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);
 
 void intel_fini_pipe_control(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 38/59] drm/i915: Update switch_mm() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the switch_mm() code paths to take a request instead of a ring. This
includes the myriad *_mm_switch functions themselves and a bunch of PDP related
helper functions.

v2: Rebased to newer tree.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c     |   23 ++++++++++++++---------
 drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
 3 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index f615fca..35116d3 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -595,7 +595,7 @@ static int do_switch(struct drm_i915_gem_request *req)
 
 	if (to->ppgtt) {
 		trace_switch_mm(ring, to);
-		ret = to->ppgtt->switch_mm(to->ppgtt, ring);
+		ret = to->ppgtt->switch_mm(to->ppgtt, req);
 		if (ret)
 			goto unpin_out;
 	}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ac63572..96fd8e0 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -374,9 +374,10 @@ static struct i915_page_directory_entry *alloc_pd_single(void)
 }
 
 /* Broadwell Page Directory Pointer Descriptors */
-static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
-			   uint64_t val)
+static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
+			  uint64_t val)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	BUG_ON(entry >= 4);
@@ -397,7 +398,7 @@ static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
 }
 
 static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
 	int i, ret;
 
@@ -406,7 +407,7 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
 
 	for (i = used_pd - 1; i >= 0; i--) {
 		dma_addr_t addr = ppgtt->pdp.page_directory[i]->daddr;
-		ret = gen8_write_pdp(ring, i, addr);
+		ret = gen8_write_pdp(req, i, addr);
 		if (ret)
 			return ret;
 	}
@@ -878,8 +879,9 @@ static uint32_t get_pd_offset(struct i915_hw_ppgtt *ppgtt)
 }
 
 static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			 struct intel_engine_cs *ring)
+			 struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
@@ -903,8 +905,9 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 }
 
 static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev);
 
 	I915_WRITE(RING_PP_DIR_DCLV(ring), PP_DIR_DCLV_2G);
@@ -913,8 +916,9 @@ static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
 }
 
 static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
@@ -945,8 +949,9 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 }
 
 static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
-			  struct intel_engine_cs *ring)
+			  struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ppgtt->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
@@ -1312,7 +1317,7 @@ int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
 	if (!ppgtt)
 		return 0;
 
-	return ppgtt->switch_mm(ppgtt, req->ring);
+	return ppgtt->switch_mm(ppgtt, req);
 }
 
 struct i915_hw_ppgtt *
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index d4c7184..8490ff5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -300,7 +300,7 @@ struct i915_hw_ppgtt {
 
 	int (*enable)(struct i915_hw_ppgtt *ppgtt);
 	int (*switch_mm)(struct i915_hw_ppgtt *ppgtt,
-			 struct intel_engine_cs *ring);
+			 struct drm_i915_gem_request *req);
 	void (*debug_dump)(struct i915_hw_ppgtt *ppgtt, struct seq_file *m);
 };
 
-- 
1.7.9.5

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[PATCH 39/59] drm/i915: Update ring->flush() to take a requests structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Udpated the various ring->flush() functions to take a request instead of a ring.
Also updated the tracer to include the request id.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
 drivers/gpu/drm/i915/i915_trace.h       |   14 +++++++------
 drivers/gpu/drm/i915/intel_ringbuffer.c |   34 +++++++++++++++++++------------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 5 files changed, 34 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 35116d3..2c94c88 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -493,7 +493,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 	 * itlb_before_ctx_switch.
 	 */
 	if (IS_GEN6(ring->dev)) {
-		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
+		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, 0);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 96fd8e0..5822429 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -885,7 +885,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
-	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -922,7 +922,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	int ret;
 
 	/* NB: TLBs must be flushed and invalidated before a switch */
-	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -940,7 +940,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 
 	/* XXX: RCS is the only one to auto invalidate the TLBs? */
 	if (ring->id != RCS) {
-		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
+		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
 		if (ret)
 			return ret;
 	}
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index f004d3d..f044e29 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -377,25 +377,27 @@ TRACE_EVENT(i915_gem_ring_dispatch,
 );
 
 TRACE_EVENT(i915_gem_ring_flush,
-	    TP_PROTO(struct intel_engine_cs *ring, u32 invalidate, u32 flush),
-	    TP_ARGS(ring, invalidate, flush),
+	    TP_PROTO(struct drm_i915_gem_request *req, u32 invalidate, u32 flush),
+	    TP_ARGS(req, invalidate, flush),
 
 	    TP_STRUCT__entry(
 			     __field(u32, dev)
 			     __field(u32, ring)
+			     __field(u32, uniq)
 			     __field(u32, invalidate)
 			     __field(u32, flush)
 			     ),
 
 	    TP_fast_assign(
-			   __entry->dev = ring->dev->primary->index;
-			   __entry->ring = ring->id;
+			   __entry->dev = req->ring->dev->primary->index;
+			   __entry->ring = req->ring->id;
+			   __entry->uniq = req->uniq;
 			   __entry->invalidate = invalidate;
 			   __entry->flush = flush;
 			   ),
 
-	    TP_printk("dev=%u, ring=%x, invalidate=%04x, flush=%04x",
-		      __entry->dev, __entry->ring,
+	    TP_printk("dev=%u, ring=%x, request=%u, invalidate=%04x, flush=%04x",
+		      __entry->dev, __entry->ring, __entry->uniq,
 		      __entry->invalidate, __entry->flush)
 );
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index b7646b7..a29fa40 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -91,10 +91,11 @@ static void __intel_ring_advance(struct intel_engine_cs *ring)
 }
 
 static int
-gen2_render_ring_flush(struct intel_engine_cs *ring,
+gen2_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32	invalidate_domains,
 		       u32	flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 cmd;
 	int ret;
 
@@ -117,10 +118,11 @@ gen2_render_ring_flush(struct intel_engine_cs *ring,
 }
 
 static int
-gen4_render_ring_flush(struct intel_engine_cs *ring,
+gen4_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32	invalidate_domains,
 		       u32	flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	u32 cmd;
 	int ret;
@@ -247,9 +249,10 @@ intel_emit_post_sync_nonzero_flush(struct intel_engine_cs *ring)
 }
 
 static int
-gen6_render_ring_flush(struct intel_engine_cs *ring,
-                         u32 invalidate_domains, u32 flush_domains)
+gen6_render_ring_flush(struct drm_i915_gem_request *req,
+		       u32 invalidate_domains, u32 flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
@@ -318,9 +321,10 @@ gen7_render_ring_cs_stall_wa(struct intel_engine_cs *ring)
 }
 
 static int
-gen7_render_ring_flush(struct intel_engine_cs *ring,
+gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32 invalidate_domains, u32 flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
@@ -400,9 +404,10 @@ gen8_emit_pipe_control(struct intel_engine_cs *ring,
 }
 
 static int
-gen8_render_ring_flush(struct intel_engine_cs *ring,
+gen8_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32 invalidate_domains, u32 flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
@@ -1545,10 +1550,11 @@ i8xx_ring_put_irq(struct intel_engine_cs *ring)
 }
 
 static int
-bsd_ring_flush(struct intel_engine_cs *ring,
+bsd_ring_flush(struct drm_i915_gem_request *req,
 	       u32     invalidate_domains,
 	       u32     flush_domains)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -2351,9 +2357,10 @@ static void gen6_bsd_ring_write_tail(struct intel_engine_cs *ring,
 		   _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
 }
 
-static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
+static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 			       u32 invalidate, u32 flush)
 {
+	struct intel_engine_cs *ring = req->ring;
 	uint32_t cmd;
 	int ret;
 
@@ -2463,9 +2470,10 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 
 /* Blitter support (SandyBridge+) */
 
-static int gen6_ring_flush(struct intel_engine_cs *ring,
+static int gen6_ring_flush(struct drm_i915_gem_request *req,
 			   u32 invalidate, u32 flush)
 {
+	struct intel_engine_cs *ring = req->ring;
 	struct drm_device *dev = ring->dev;
 	uint32_t cmd;
 	int ret;
@@ -2879,11 +2887,11 @@ intel_ring_flush_all_caches(struct drm_i915_gem_request *req)
 	if (!ring->gpu_caches_dirty)
 		return 0;
 
-	ret = ring->flush(ring, 0, I915_GEM_GPU_DOMAINS);
+	ret = ring->flush(req, 0, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_flush(ring, 0, I915_GEM_GPU_DOMAINS);
+	trace_i915_gem_ring_flush(req, 0, I915_GEM_GPU_DOMAINS);
 
 	ring->gpu_caches_dirty = false;
 	return 0;
@@ -2900,11 +2908,11 @@ intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 	if (ring->gpu_caches_dirty)
 		flush_domains = I915_GEM_GPU_DOMAINS;
 
-	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, flush_domains);
+	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_flush(ring, I915_GEM_GPU_DOMAINS, flush_domains);
+	trace_i915_gem_ring_flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
 
 	ring->gpu_caches_dirty = false;
 	return 0;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 2d059d1..55f6f35 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -150,7 +150,7 @@ struct  intel_engine_cs {
 
 	void		(*write_tail)(struct intel_engine_cs *ring,
 				      u32 value);
-	int __must_check (*flush)(struct intel_engine_cs *ring,
+	int __must_check (*flush)(struct drm_i915_gem_request *req,
 				  u32	invalidate_domains,
 				  u32	flush_domains);
 	int		(*add_request)(struct intel_engine_cs *ring);
-- 
1.7.9.5

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[PATCH 40/59] drm/i915: Update some flush helpers to take request structures

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated intel_emit_post_sync_nonzero_flush(), gen7_render_ring_cs_stall_wa() and
gen8_emit_pipe_control() to take requests instead of rings.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c |   20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index a29fa40..bbba27d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -214,8 +214,9 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
  * really our business.  That leaves only stall at scoreboard.
  */
 static int
-intel_emit_post_sync_nonzero_flush(struct intel_engine_cs *ring)
+intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
@@ -258,7 +259,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
 	int ret;
 
 	/* Force SNB workarounds for PIPE_CONTROL flushes */
-	ret = intel_emit_post_sync_nonzero_flush(ring);
+	ret = intel_emit_post_sync_nonzero_flush(req);
 	if (ret)
 		return ret;
 
@@ -302,8 +303,9 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-gen7_render_ring_cs_stall_wa(struct intel_engine_cs *ring)
+gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 4);
@@ -366,7 +368,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		/* Workaround: we must issue a pipe_control with CS-stall bit
 		 * set before a pipe_control command that has the state cache
 		 * invalidate bit set. */
-		gen7_render_ring_cs_stall_wa(ring);
+		gen7_render_ring_cs_stall_wa(req);
 	}
 
 	ret = intel_ring_begin(ring, 4);
@@ -383,9 +385,10 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-gen8_emit_pipe_control(struct intel_engine_cs *ring,
+gen8_emit_pipe_control(struct drm_i915_gem_request *req,
 		       u32 flags, u32 scratch_addr)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 6);
@@ -407,9 +410,8 @@ static int
 gen8_render_ring_flush(struct drm_i915_gem_request *req,
 		       u32 invalidate_domains, u32 flush_domains)
 {
-	struct intel_engine_cs *ring = req->ring;
 	u32 flags = 0;
-	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
+	u32 scratch_addr = req->ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
 	flags |= PIPE_CONTROL_CS_STALL;
@@ -429,7 +431,7 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req,
 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
 
 		/* WaCsStallBeforeStateCacheInvalidate:bdw,chv */
-		ret = gen8_emit_pipe_control(ring,
+		ret = gen8_emit_pipe_control(req,
 					     PIPE_CONTROL_CS_STALL |
 					     PIPE_CONTROL_STALL_AT_SCOREBOARD,
 					     0);
@@ -437,7 +439,7 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req,
 			return ret;
 	}
 
-	return gen8_emit_pipe_control(ring, flags, scratch_addr);
+	return gen8_emit_pipe_control(req, flags, scratch_addr);
 }
 
 static void ring_write_tail(struct intel_engine_cs *ring,
-- 
1.7.9.5

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[PATCH 41/59] drm/i915: Update ring->emit_flush() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->emit_flush() implementations to take a request instead
of a ringbuf/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   17 ++++++++---------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index fd80af5..ba49f50 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -569,8 +569,7 @@ static int logical_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
 	if (ring->gpu_caches_dirty)
 		flush_domains = I915_GEM_GPU_DOMAINS;
 
-	ret = ring->emit_flush(req->ringbuf, req->ctx,
-			       I915_GEM_GPU_DOMAINS, flush_domains);
+	ret = ring->emit_flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
 	if (ret)
 		return ret;
 
@@ -1003,7 +1002,7 @@ int logical_ring_flush_all_caches(struct drm_i915_gem_request *req)
 	if (!ring->gpu_caches_dirty)
 		return 0;
 
-	ret = ring->emit_flush(req->ringbuf, req->ctx, 0, I915_GEM_GPU_DOMAINS);
+	ret = ring->emit_flush(req, 0, I915_GEM_GPU_DOMAINS);
 	if (ret)
 		return ret;
 
@@ -1201,18 +1200,18 @@ static void gen8_logical_ring_put_irq(struct intel_engine_cs *ring)
 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
 }
 
-static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
-			   struct intel_context *ctx,
+static int gen8_emit_flush(struct drm_i915_gem_request *request,
 			   u32 invalidate_domains,
 			   u32 unused)
 {
+	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+	ret = intel_logical_ring_begin(ringbuf, request->ctx, 4);
 	if (ret)
 		return ret;
 
@@ -1242,11 +1241,11 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
-				  struct intel_context *ctx,
+static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
 				  u32 invalidate_domains,
 				  u32 flush_domains)
 {
+	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	u32 flags = 0;
@@ -1270,7 +1269,7 @@ static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
 	}
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, 6);
+	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 55f6f35..94182de 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -238,8 +238,7 @@ struct  intel_engine_cs {
 	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
 	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
 					struct drm_i915_gem_request *request);
-	int		(*emit_flush)(struct intel_ringbuffer *ringbuf,
-				      struct intel_context *ctx,
+	int		(*emit_flush)(struct drm_i915_gem_request *request,
 				      u32 invalidate_domains,
 				      u32 flush_domains);
 	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
-- 
1.7.9.5

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[PATCH 42/59] drm/i915: Update ring->add_request() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->add_request() implementations to take a request
instead of a ring. This removes their reliance on the OLR to obtain the seqno
value that the request should be tagged with.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |   26 ++++++++++++--------------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 3 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 95ed3a8..dd5c1d8 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2380,7 +2380,7 @@ void __i915_add_request(struct drm_i915_gem_request *request,
 	if (i915.enable_execlists)
 		ret = ring->emit_request(ringbuf, request);
 	else
-		ret = ring->add_request(ring);
+		ret = ring->add_request(request);
 	/* Not allowed to fail! */
 	WARN_ON(ret);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index bbba27d..0e55baf 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1239,16 +1239,16 @@ static int gen6_signal(struct intel_engine_cs *signaller,
 
 /**
  * gen6_add_request - Update the semaphore mailbox registers
- * 
- * @ring - ring that is adding a request
- * @seqno - return seqno stuck into the ring
+ *
+ * @request - request to write to the ring
  *
  * Update the mailbox registers in the *other* rings with the current seqno.
  * This acts like a signal in the canonical semaphore.
  */
 static int
-gen6_add_request(struct intel_engine_cs *ring)
+gen6_add_request(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	if (ring->semaphore.signal)
@@ -1261,8 +1261,7 @@ gen6_add_request(struct intel_engine_cs *ring)
 
 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, MI_USER_INTERRUPT);
 	__intel_ring_advance(ring);
 
@@ -1359,8 +1358,9 @@ do {									\
 } while (0)
 
 static int
-pc_render_add_request(struct intel_engine_cs *ring)
+pc_render_add_request(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
@@ -1380,8 +1380,7 @@ pc_render_add_request(struct intel_engine_cs *ring)
 			PIPE_CONTROL_WRITE_FLUSH |
 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, 0);
 	PIPE_CONTROL_FLUSH(ring, scratch_addr);
 	scratch_addr += 2 * CACHELINE_BYTES; /* write to separate cachelines */
@@ -1400,8 +1399,7 @@ pc_render_add_request(struct intel_engine_cs *ring)
 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
 			PIPE_CONTROL_NOTIFY);
 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, 0);
 	__intel_ring_advance(ring);
 
@@ -1570,8 +1568,9 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-i9xx_add_request(struct intel_engine_cs *ring)
+i9xx_add_request(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 4);
@@ -1580,8 +1579,7 @@ i9xx_add_request(struct intel_engine_cs *ring)
 
 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
-	intel_ring_emit(ring,
-		    i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_ring_emit(ring, i915_gem_request_get_seqno(req));
 	intel_ring_emit(ring, MI_USER_INTERRUPT);
 	__intel_ring_advance(ring);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 94182de..9641634 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -153,7 +153,7 @@ struct  intel_engine_cs {
 	int __must_check (*flush)(struct drm_i915_gem_request *req,
 				  u32	invalidate_domains,
 				  u32	flush_domains);
-	int		(*add_request)(struct intel_engine_cs *ring);
+	int		(*add_request)(struct drm_i915_gem_request *req);
 	/* Some chipsets are not quite as coherent as advertised and need
 	 * an expensive kick to force a true read of the up-to-date seqno.
 	 * However, the up-to-date seqno is not always required and the last
-- 
1.7.9.5

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[PATCH 43/59] drm/i915: Update ring->emit_request() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the ring->emit_request() implementation to take a request instead of a
ringbuf/request pair. Also removed it's use of the OLR for obtaining the
request's seqno.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    2 +-
 drivers/gpu/drm/i915/intel_lrc.c        |    7 +++----
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index dd5c1d8..881c6ea 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2378,7 +2378,7 @@ void __i915_add_request(struct drm_i915_gem_request *request,
 	request->postfix = intel_ring_get_tail(ringbuf);
 
 	if (i915.enable_execlists)
-		ret = ring->emit_request(ringbuf, request);
+		ret = ring->emit_request(request);
 	else
 		ret = ring->add_request(request);
 	/* Not allowed to fail! */
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ba49f50..24a4816 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1294,9 +1294,9 @@ static void gen8_set_seqno(struct intel_engine_cs *ring, u32 seqno)
 	intel_write_status_page(ring, I915_GEM_HWS_INDEX, seqno);
 }
 
-static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
-			     struct drm_i915_gem_request *request)
+static int gen8_emit_request(struct drm_i915_gem_request *request)
 {
+	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	struct intel_engine_cs *ring = ringbuf->ring;
 	u32 cmd;
 	int ret;
@@ -1313,8 +1313,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
 				(ring->status_page.gfx_addr +
 				(I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT)));
 	intel_logical_ring_emit(ringbuf, 0);
-	intel_logical_ring_emit(ringbuf,
-		i915_gem_request_get_seqno(ring->outstanding_lazy_request));
+	intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request));
 	intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
 	intel_logical_ring_emit(ringbuf, MI_NOOP);
 	intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 9641634..87f3b60 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -236,8 +236,7 @@ struct  intel_engine_cs {
 	struct list_head execlist_retired_req_list;
 	u8 next_context_status_buffer;
 	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
-	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
-					struct drm_i915_gem_request *request);
+	int		(*emit_request)(struct drm_i915_gem_request *request);
 	int		(*emit_flush)(struct drm_i915_gem_request *request,
 				      u32 invalidate_domains,
 				      u32 flush_domains);
-- 
1.7.9.5

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[PATCH 44/59] drm/i915: Update ring->dispatch_execbuffer() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->dispatch_execbuffer() implementations to take a
request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    4 ++--
 drivers/gpu/drm/i915/i915_gem_render_state.c |    3 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c      |   18 ++++++++++++------
 drivers/gpu/drm/i915/intel_ringbuffer.h      |    2 +-
 4 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index e58e88b..cb24ca7 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1317,14 +1317,14 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 			if (ret)
 				goto error;
 
-			ret = ring->dispatch_execbuffer(ring,
+			ret = ring->dispatch_execbuffer(params->request,
 							exec_start, exec_len,
 							params->dispatch_flags);
 			if (ret)
 				goto error;
 		}
 	} else {
-		ret = ring->dispatch_execbuffer(ring,
+		ret = ring->dispatch_execbuffer(params->request,
 						exec_start, exec_len,
 						params->dispatch_flags);
 		if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index e04cda4..a0201fc 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -164,8 +164,7 @@ int i915_gem_render_state_init(struct drm_i915_gem_request *req)
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = req->ring->dispatch_execbuffer(req->ring,
-					     so.ggtt_offset,
+	ret = req->ring->dispatch_execbuffer(req, so.ggtt_offset,
 					     so.rodata->batch_items * 4,
 					     I915_DISPATCH_SECURE);
 	if (ret)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0e55baf..77d357f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1711,10 +1711,11 @@ gen8_ring_put_irq(struct intel_engine_cs *ring)
 }
 
 static int
-i965_dispatch_execbuffer(struct intel_engine_cs *ring,
+i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			 u64 offset, u32 length,
 			 unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -1737,10 +1738,11 @@ i965_dispatch_execbuffer(struct intel_engine_cs *ring,
 #define I830_TLB_ENTRIES (2)
 #define I830_WA_SIZE max(I830_TLB_ENTRIES*4096, I830_BATCH_LIMIT)
 static int
-i830_dispatch_execbuffer(struct intel_engine_cs *ring,
+i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			 u64 offset, u32 len,
 			 unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	u32 cs_offset = ring->scratch.gtt_offset;
 	int ret;
 
@@ -1799,10 +1801,11 @@ i830_dispatch_execbuffer(struct intel_engine_cs *ring,
 }
 
 static int
-i915_dispatch_execbuffer(struct intel_engine_cs *ring,
+i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			 u64 offset, u32 len,
 			 unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -2402,10 +2405,11 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 }
 
 static int
-gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
+gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			      u64 offset, u32 len,
 			      unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	bool ppgtt = USES_PPGTT(ring->dev) &&
 			!(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
@@ -2425,10 +2429,11 @@ gen8_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 }
 
 static int
-hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
+hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			     u64 offset, u32 len,
 			     unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
@@ -2447,10 +2452,11 @@ hsw_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
 }
 
 static int
-gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
+gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			      u64 offset, u32 len,
 			      unsigned dispatch_flags)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
 	ret = intel_ring_begin(ring, 2);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 87f3b60..9f008d1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -164,7 +164,7 @@ struct  intel_engine_cs {
 				     bool lazy_coherency);
 	void		(*set_seqno)(struct intel_engine_cs *ring,
 				     u32 seqno);
-	int		(*dispatch_execbuffer)(struct intel_engine_cs *ring,
+	int		(*dispatch_execbuffer)(struct drm_i915_gem_request *req,
 					       u64 offset, u32 length,
 					       unsigned dispatch_flags);
 #define I915_DISPATCH_SECURE 0x1
-- 
1.7.9.5

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[PATCH 45/59] drm/i915: Update ring->emit_bb_start() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the ring->emit_bb_start() implementation to take a request instead of a
ringbuf/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   12 +++++-------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 24a4816..cdbe514 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -931,7 +931,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 	exec_start = params->batch_obj_vm_offset +
 		     args->batch_start_offset;
 
-	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
+	ret = ring->emit_bb_start(params->request, exec_start, params->dispatch_flags);
 	if (ret)
 		return ret;
 
@@ -1146,14 +1146,14 @@ static int gen9_init_render_ring(struct intel_engine_cs *ring)
 	return init_workarounds_ring(ring);
 }
 
-static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
-			      struct intel_context *ctx,
+static int gen8_emit_bb_start(struct drm_i915_gem_request *req,
 			      u64 offset, unsigned dispatch_flags)
 {
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, ctx, 4);
+	ret = intel_logical_ring_begin(ringbuf, req->ctx, 4);
 	if (ret)
 		return ret;
 
@@ -1333,9 +1333,7 @@ static int intel_lr_context_render_state_init(struct drm_i915_gem_request *req)
 	if (so.rodata == NULL)
 		return 0;
 
-	ret = req->ring->emit_bb_start(req->ringbuf,
-				       req->ctx,
-				       so.ggtt_offset,
+	ret = req->ring->emit_bb_start(req, so.ggtt_offset,
 				       I915_DISPATCH_SECURE);
 	if (ret)
 		goto out;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 9f008d1..2d1d8a6 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -240,8 +240,7 @@ struct  intel_engine_cs {
 	int		(*emit_flush)(struct drm_i915_gem_request *request,
 				      u32 invalidate_domains,
 				      u32 flush_domains);
-	int		(*emit_bb_start)(struct intel_ringbuffer *ringbuf,
-					 struct intel_context *ctx,
+	int		(*emit_bb_start)(struct drm_i915_gem_request *req,
 					 u64 offset, unsigned dispatch_flags);
 
 	/**
-- 
1.7.9.5

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[PATCH 46/59] drm/i915: Update ring->sync_to() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the ring->sync_to() implementations to take a request instead of a ring.
Also updated the tracer to include the request id.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
 drivers/gpu/drm/i915/i915_trace.h       |   14 ++++++++------
 drivers/gpu/drm/i915/intel_ringbuffer.c |    6 ++++--
 drivers/gpu/drm/i915/intel_ringbuffer.h |    4 ++--
 4 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 881c6ea..7304290 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3003,8 +3003,8 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
 	if (ret)
 		return ret;
 
-	trace_i915_gem_ring_sync_to(from, to, obj->last_read_req);
-	ret = to->semaphore.sync_to(to, from, seqno);
+	trace_i915_gem_ring_sync_to(*to_req, from, obj->last_read_req);
+	ret = to->semaphore.sync_to(*to_req, from, seqno);
 	if (!ret)
 		/* We use last_read_req because sync_to()
 		 * might have just caused seqno wrap under
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index f044e29..8ca536c 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -326,29 +326,31 @@ TRACE_EVENT(i915_gem_evict_vm,
 );
 
 TRACE_EVENT(i915_gem_ring_sync_to,
-	    TP_PROTO(struct intel_engine_cs *from,
-		     struct intel_engine_cs *to,
+	    TP_PROTO(struct drm_i915_gem_request *to_req,
+		     struct intel_engine_cs *from,
 		     struct drm_i915_gem_request *req),
-	    TP_ARGS(from, to, req),
+	    TP_ARGS(to_req, from, req),
 
 	    TP_STRUCT__entry(
 			     __field(u32, dev)
 			     __field(u32, sync_from)
 			     __field(u32, sync_to)
+			     __field(u32, uniq_to)
 			     __field(u32, seqno)
 			     ),
 
 	    TP_fast_assign(
 			   __entry->dev = from->dev->primary->index;
 			   __entry->sync_from = from->id;
-			   __entry->sync_to = to->id;
+			   __entry->sync_to = to_req->ring->id;
+			   __entry->uniq_to = to_req->uniq;
 			   __entry->seqno = i915_gem_request_get_seqno(req);
 			   ),
 
-	    TP_printk("dev=%u, sync-from=%u, sync-to=%u, seqno=%u",
+	    TP_printk("dev=%u, sync-from=%u, sync-to=%u, seqno=%u, to_uniq=%u",
 		      __entry->dev,
 		      __entry->sync_from, __entry->sync_to,
-		      __entry->seqno)
+		      __entry->seqno, __entry->uniq_to)
 );
 
 TRACE_EVENT(i915_gem_ring_dispatch,
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 77d357f..2de43c8 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1284,10 +1284,11 @@ static inline bool i915_gem_has_seqno_wrapped(struct drm_device *dev,
  */
 
 static int
-gen8_ring_sync(struct intel_engine_cs *waiter,
+gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
 	       struct intel_engine_cs *signaller,
 	       u32 seqno)
 {
+	struct intel_engine_cs *waiter = waiter_req->ring;
 	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
 	int ret;
 
@@ -1309,10 +1310,11 @@ gen8_ring_sync(struct intel_engine_cs *waiter,
 }
 
 static int
-gen6_ring_sync(struct intel_engine_cs *waiter,
+gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
 	       struct intel_engine_cs *signaller,
 	       u32 seqno)
 {
+	struct intel_engine_cs *waiter = waiter_req->ring;
 	u32 dw1 = MI_SEMAPHORE_MBOX |
 		  MI_SEMAPHORE_COMPARE |
 		  MI_SEMAPHORE_REGISTER;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 2d1d8a6..1107f82 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -222,8 +222,8 @@ struct  intel_engine_cs {
 		};
 
 		/* AKA wait() */
-		int	(*sync_to)(struct intel_engine_cs *ring,
-				   struct intel_engine_cs *to,
+		int	(*sync_to)(struct drm_i915_gem_request *to_req,
+				   struct intel_engine_cs *from,
 				   u32 seqno);
 		int	(*signal)(struct intel_engine_cs *signaller,
 				  /* num_dwords needed by caller */
-- 
1.7.9.5

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[PATCH 47/59] drm/i915: Update ring->signal() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated the various ring->signal() implementations to take a request instead of
a ring. This removes their reliance on the OLR to obtain the seqno value that
should be used for the signal.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c |   20 ++++++++++----------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2de43c8..10cb242 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1122,10 +1122,11 @@ static void render_ring_cleanup(struct intel_engine_cs *ring)
 	intel_fini_pipe_control(ring);
 }
 
-static int gen8_rcs_signal(struct intel_engine_cs *signaller,
+static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
 			   unsigned int num_dwords)
 {
 #define MBOX_UPDATE_DWORDS 8
+	struct intel_engine_cs *signaller = signaller_req->ring;
 	struct drm_device *dev = signaller->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *waiter;
@@ -1145,8 +1146,7 @@ static int gen8_rcs_signal(struct intel_engine_cs *signaller,
 		if (gtt_offset == MI_SEMAPHORE_SYNC_INVALID)
 			continue;
 
-		seqno = i915_gem_request_get_seqno(
-					   signaller->outstanding_lazy_request);
+		seqno = i915_gem_request_get_seqno(signaller_req);
 		intel_ring_emit(signaller, GFX_OP_PIPE_CONTROL(6));
 		intel_ring_emit(signaller, PIPE_CONTROL_GLOBAL_GTT_IVB |
 					   PIPE_CONTROL_QW_WRITE |
@@ -1163,10 +1163,11 @@ static int gen8_rcs_signal(struct intel_engine_cs *signaller,
 	return 0;
 }
 
-static int gen8_xcs_signal(struct intel_engine_cs *signaller,
+static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
 			   unsigned int num_dwords)
 {
 #define MBOX_UPDATE_DWORDS 6
+	struct intel_engine_cs *signaller = signaller_req->ring;
 	struct drm_device *dev = signaller->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *waiter;
@@ -1186,8 +1187,7 @@ static int gen8_xcs_signal(struct intel_engine_cs *signaller,
 		if (gtt_offset == MI_SEMAPHORE_SYNC_INVALID)
 			continue;
 
-		seqno = i915_gem_request_get_seqno(
-					   signaller->outstanding_lazy_request);
+		seqno = i915_gem_request_get_seqno(signaller_req);
 		intel_ring_emit(signaller, (MI_FLUSH_DW + 1) |
 					   MI_FLUSH_DW_OP_STOREDW);
 		intel_ring_emit(signaller, lower_32_bits(gtt_offset) |
@@ -1202,9 +1202,10 @@ static int gen8_xcs_signal(struct intel_engine_cs *signaller,
 	return 0;
 }
 
-static int gen6_signal(struct intel_engine_cs *signaller,
+static int gen6_signal(struct drm_i915_gem_request *signaller_req,
 		       unsigned int num_dwords)
 {
+	struct intel_engine_cs *signaller = signaller_req->ring;
 	struct drm_device *dev = signaller->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *useless;
@@ -1222,8 +1223,7 @@ static int gen6_signal(struct intel_engine_cs *signaller,
 	for_each_ring(useless, dev_priv, i) {
 		u32 mbox_reg = signaller->semaphore.mbox.signal[i];
 		if (mbox_reg != GEN6_NOSYNC) {
-			u32 seqno = i915_gem_request_get_seqno(
-					   signaller->outstanding_lazy_request);
+			u32 seqno = i915_gem_request_get_seqno(signaller_req);
 			intel_ring_emit(signaller, MI_LOAD_REGISTER_IMM(1));
 			intel_ring_emit(signaller, mbox_reg);
 			intel_ring_emit(signaller, seqno);
@@ -1252,7 +1252,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
 	int ret;
 
 	if (ring->semaphore.signal)
-		ret = ring->semaphore.signal(ring, 4);
+		ret = ring->semaphore.signal(req, 4);
 	else
 		ret = intel_ring_begin(ring, 4);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 1107f82..1af00b2 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -225,7 +225,7 @@ struct  intel_engine_cs {
 		int	(*sync_to)(struct drm_i915_gem_request *to_req,
 				   struct intel_engine_cs *from,
 				   u32 seqno);
-		int	(*signal)(struct intel_engine_cs *signaller,
+		int	(*signal)(struct drm_i915_gem_request *signaller_req,
 				  /* num_dwords needed by caller */
 				  unsigned int num_dwords);
 	} semaphore;
-- 
1.7.9.5

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[PATCH 48/59] drm/i915: Update cacheline_align() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Updated intel_ring_cacheline_align() to take a request instead of a ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c    |    2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |    3 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5236e59..277c73a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9605,7 +9605,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 	 * then do the cacheline alignment, and finally emit the
 	 * MI_DISPLAY_FLIP.
 	 */
-	ret = intel_ring_cacheline_align(ring);
+	ret = intel_ring_cacheline_align(req);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 10cb242..9cbc4ef 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2290,8 +2290,9 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 }
 
 /* Align the ring tail to a cacheline boundary */
-int intel_ring_cacheline_align(struct intel_engine_cs *ring)
+int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
 {
+	struct intel_engine_cs *ring = req->ring;
 	int num_dwords = (ring->buffer->tail & (CACHELINE_BYTES - 1)) / sizeof(uint32_t);
 	int ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 1af00b2..e353531 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -392,7 +392,7 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request);
 
 int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
-int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
+int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
 static inline void intel_ring_emit(struct intel_engine_cs *ring,
 				   u32 data)
 {
-- 
1.7.9.5

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[PATCH 49/59] drm/i915: Update intel_ring_begin() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use requests, intel_ring_begin()
can be updated to take a request instead of a ring. This also means that it no
longer needs to lazily allocate a request if no-one happens to have done it
earlier.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c            |    2 +-
 drivers/gpu/drm/i915/i915_gem_context.c    |    2 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    8 +--
 drivers/gpu/drm/i915/i915_gem_gtt.c        |    6 +--
 drivers/gpu/drm/i915/intel_display.c       |   10 ++--
 drivers/gpu/drm/i915/intel_overlay.c       |    8 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   74 ++++++++++++++--------------
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
 8 files changed, 55 insertions(+), 57 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 7304290..b047693 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4711,7 +4711,7 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 	if (!HAS_L3_DPF(dev) || !remap_info)
 		return 0;
 
-	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
+	ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 2c94c88..369e58d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -507,7 +507,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
 	if (INTEL_INFO(ring->dev)->gen >= 7)
 		len += 2 + (num_rings ? 4*num_rings + 2 : 0);
 
-	ret = intel_ring_begin(ring, len);
+	ret = intel_ring_begin(req, len);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index cb24ca7..9345db8 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1076,7 +1076,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
 		return -EINVAL;
 	}
 
-	ret = intel_ring_begin(ring, 4 * 3);
+	ret = intel_ring_begin(req, 4 * 3);
 	if (ret)
 		return ret;
 
@@ -1107,7 +1107,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
 	}
 
 	if (INTEL_INFO(ring->dev)->gen >= 4) {
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(req, 4);
 		if (ret)
 			return ret;
 
@@ -1116,7 +1116,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
 		intel_ring_emit(ring, ((box->x2 - 1) & 0xffff) | (box->y2 - 1) << 16);
 		intel_ring_emit(ring, DR4);
 	} else {
-		ret = intel_ring_begin(ring, 6);
+		ret = intel_ring_begin(req, 6);
 		if (ret)
 			return ret;
 
@@ -1287,7 +1287,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
 
 	if (ring == &dev_priv->ring[RCS] &&
 			instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(params->request, 4);
 		if (ret)
 			goto error;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5822429..7b656c8 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -382,7 +382,7 @@ static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
 
 	BUG_ON(entry >= 4);
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -889,7 +889,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -926,7 +926,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 277c73a..665e8cc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9426,7 +9426,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
 	u32 flip_mask;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -9461,7 +9461,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
 	u32 flip_mask;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -9494,7 +9494,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
 	uint32_t pf, pipesrc;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -9533,7 +9533,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
 	uint32_t pf, pipesrc;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -9609,7 +9609,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, len);
+	ret = intel_ring_begin(req, len);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 9eea308..2ed4422 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -247,7 +247,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret) {
 		i915_gem_request_cancel(req);
 		return ret;
@@ -288,7 +288,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret) {
 		i915_gem_request_cancel(req);
 		return ret;
@@ -353,7 +353,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret) {
 		i915_gem_request_cancel(req);
 		return ret;
@@ -428,7 +428,7 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
 		if (ret)
 			return ret;
 
-		ret = intel_ring_begin(ring, 2);
+		ret = intel_ring_begin(req, 2);
 		if (ret) {
 			i915_gem_request_cancel(req);
 			return ret;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 9cbc4ef..6f198df 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -106,7 +106,7 @@ gen2_render_ring_flush(struct drm_i915_gem_request *req,
 	if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER)
 		cmd |= MI_READ_FLUSH;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -165,7 +165,7 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
 	    (IS_G4X(dev) || IS_GEN5(dev)))
 		cmd |= MI_INVALIDATE_ISP;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -220,8 +220,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
 	int ret;
 
-
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -234,7 +233,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
 	intel_ring_emit(ring, MI_NOOP);
 	intel_ring_advance(ring);
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -289,7 +288,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
 		flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL;
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -308,7 +307,7 @@ gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -371,7 +370,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
 		gen7_render_ring_cs_stall_wa(req);
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -391,7 +390,7 @@ gen8_emit_pipe_control(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -726,7 +725,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	ret = intel_ring_begin(ring, (w->count * 2 + 2));
+	ret = intel_ring_begin(req, (w->count * 2 + 2));
 	if (ret)
 		return ret;
 
@@ -1136,7 +1135,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1177,7 +1176,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1216,7 +1215,7 @@ static int gen6_signal(struct drm_i915_gem_request *signaller_req,
 	num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2);
 #undef MBOX_UPDATE_DWORDS
 
-	ret = intel_ring_begin(signaller, num_dwords);
+	ret = intel_ring_begin(signaller_req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -1254,7 +1253,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
 	if (ring->semaphore.signal)
 		ret = ring->semaphore.signal(req, 4);
 	else
-		ret = intel_ring_begin(ring, 4);
+		ret = intel_ring_begin(req, 4);
 
 	if (ret)
 		return ret;
@@ -1292,7 +1291,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
 	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
 	int ret;
 
-	ret = intel_ring_begin(waiter, 4);
+	ret = intel_ring_begin(waiter_req, 4);
 	if (ret)
 		return ret;
 
@@ -1329,7 +1328,7 @@ gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
 
 	WARN_ON(wait_mbox == MI_SEMAPHORE_SYNC_INVALID);
 
-	ret = intel_ring_begin(waiter, 4);
+	ret = intel_ring_begin(waiter_req, 4);
 	if (ret)
 		return ret;
 
@@ -1374,7 +1373,7 @@ pc_render_add_request(struct drm_i915_gem_request *req)
 	 * incoherence by flushing the 6 PIPE_NOTIFY buffers out to
 	 * memory before requesting an interrupt.
 	 */
-	ret = intel_ring_begin(ring, 32);
+	ret = intel_ring_begin(req, 32);
 	if (ret)
 		return ret;
 
@@ -1559,7 +1558,7 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -1575,7 +1574,7 @@ i9xx_add_request(struct drm_i915_gem_request *req)
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1720,7 +1719,7 @@ i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -1748,7 +1747,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	u32 cs_offset = ring->scratch.gtt_offset;
 	int ret;
 
-	ret = intel_ring_begin(ring, 6);
+	ret = intel_ring_begin(req, 6);
 	if (ret)
 		return ret;
 
@@ -1765,7 +1764,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 		if (len > I830_BATCH_LIMIT)
 			return -ENOSPC;
 
-		ret = intel_ring_begin(ring, 6 + 2);
+		ret = intel_ring_begin(req, 6 + 2);
 		if (ret)
 			return ret;
 
@@ -1788,7 +1787,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
 		offset = cs_offset;
 	}
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1810,7 +1809,7 @@ i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2264,13 +2263,17 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring, int bytes)
 	return 0;
 }
 
-int intel_ring_begin(struct intel_engine_cs *ring,
+int intel_ring_begin(struct drm_i915_gem_request *req,
 		     int num_dwords)
 {
-	struct drm_i915_gem_request *req;
-	struct drm_i915_private *dev_priv = ring->dev->dev_private;
+	struct intel_engine_cs *ring;
+	struct drm_i915_private *dev_priv;
 	int ret;
 
+	WARN_ON(req == NULL);
+	ring = req->ring;
+	dev_priv = ring->dev->dev_private;
+
 	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
 				   dev_priv->mm.interruptible);
 	if (ret)
@@ -2280,11 +2283,6 @@ int intel_ring_begin(struct intel_engine_cs *ring,
 	if (ret)
 		return ret;
 
-	/* Preallocate the olr before touching the ring */
-	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
-	if (ret)
-		return ret;
-
 	ring->buffer->space -= num_dwords * sizeof(uint32_t);
 	return 0;
 }
@@ -2300,7 +2298,7 @@ int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
 		return 0;
 
 	num_dwords = CACHELINE_BYTES / sizeof(uint32_t) - num_dwords;
-	ret = intel_ring_begin(ring, num_dwords);
+	ret = intel_ring_begin(req, num_dwords);
 	if (ret)
 		return ret;
 
@@ -2370,7 +2368,7 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -2417,7 +2415,7 @@ gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 			!(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -2439,7 +2437,7 @@ hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2462,7 +2460,7 @@ gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
 	struct intel_engine_cs *ring = req->ring;
 	int ret;
 
-	ret = intel_ring_begin(ring, 2);
+	ret = intel_ring_begin(req, 2);
 	if (ret)
 		return ret;
 
@@ -2487,7 +2485,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_ring_begin(ring, 4);
+	ret = intel_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index e353531..f6ab6bb 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -391,7 +391,7 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
 
 int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request);
 
-int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
+int __must_check intel_ring_begin(struct drm_i915_gem_request *req, int n);
 int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
 static inline void intel_ring_emit(struct intel_engine_cs *ring,
 				   u32 data)
-- 
1.7.9.5

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[PATCH 50/59] drm/i915: Update intel_logical_ring_begin() to take a request structure

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that everything above has been converted to use requests,
intel_logical_ring_begin() can be updated to take a request instead of a
ringbuf/context pair. This also means that it no longer needs to lazily allocate
a request if no-one happens to have done it earlier.

Note that this change makes the execlist signature the same as the legacy
version. Thus the two functions could be merged into a ring->begin() wrapper if
required.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   36 ++++++++++++++++--------------------
 1 file changed, 16 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index cdbe514..c16d726 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -796,7 +796,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
 /**
  * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
  *
- * @ringbuf: Logical ringbuffer.
+ * @request: The request to start some new work for
  * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
  *
  * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
@@ -806,30 +806,26 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
  *
  * Return: non-zero if the ringbuffer is not ready to be written to.
  */
-static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
-				    struct intel_context *ctx, int num_dwords)
+static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
+				    int num_dwords)
 {
-	struct drm_i915_gem_request *req;
-	struct intel_engine_cs *ring = ringbuf->ring;
-	struct drm_device *dev = ring->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_i915_private *dev_priv;
 	int ret;
 
+	WARN_ON(req == NULL);
+	dev_priv = req->ring->dev->dev_private;
+
 	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
 				   dev_priv->mm.interruptible);
 	if (ret)
 		return ret;
 
-	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
-	if (ret)
-		return ret;
-
-	/* Preallocate the olr before touching the ring */
-	ret = i915_gem_request_alloc(ring, ctx, &req);
+	ret = logical_ring_prepare(req->ringbuf, req->ctx,
+				   num_dwords * sizeof(uint32_t));
 	if (ret)
 		return ret;
 
-	ringbuf->space -= num_dwords * sizeof(uint32_t);
+	req->ringbuf->space -= num_dwords * sizeof(uint32_t);
 	return 0;
 }
 
@@ -915,7 +911,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
 
 	if (ring == &dev_priv->ring[RCS] &&
 	    instp_mode != dev_priv->relative_constants_mode) {
-		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
+		ret = intel_logical_ring_begin(params->request, 4);
 		if (ret)
 			return ret;
 
@@ -1071,7 +1067,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	ret = intel_logical_ring_begin(ringbuf, req->ctx, w->count * 2 + 2);
+	ret = intel_logical_ring_begin(req, w->count * 2 + 2);
 	if (ret)
 		return ret;
 
@@ -1153,7 +1149,7 @@ static int gen8_emit_bb_start(struct drm_i915_gem_request *req,
 	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, req->ctx, 4);
+	ret = intel_logical_ring_begin(req, 4);
 	if (ret)
 		return ret;
 
@@ -1211,7 +1207,7 @@ static int gen8_emit_flush(struct drm_i915_gem_request *request,
 	uint32_t cmd;
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, request->ctx, 4);
+	ret = intel_logical_ring_begin(request, 4);
 	if (ret)
 		return ret;
 
@@ -1269,7 +1265,7 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
 		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
 	}
 
-	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
+	ret = intel_logical_ring_begin(request, 6);
 	if (ret)
 		return ret;
 
@@ -1301,7 +1297,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
 	u32 cmd;
 	int ret;
 
-	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
+	ret = intel_logical_ring_begin(request, 6);
 	if (ret)
 		return ret;
 
-- 
1.7.9.5

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[PATCH 51/59] drm/i915: Add *_ring_begin() to request allocation

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Now that the *_ring_begin() functions no longer call the request allocation
code, it is finally safe for the request allocation code to call *_ring_begin().
This is important to guarantee that the space reserved for the subsequent
i915_add_request() call does actually get reserved.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         |   16 ++++------------
 drivers/gpu/drm/i915/intel_lrc.c        |   15 +++++++++++++++
 drivers/gpu/drm/i915/intel_lrc.h        |    1 +
 drivers/gpu/drm/i915/intel_ringbuffer.c |   28 +++++++++++++++++-----------
 drivers/gpu/drm/i915/intel_ringbuffer.h |    3 ++-
 5 files changed, 39 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index b047693..fe2de21 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2561,19 +2561,11 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
 	 * i915_add_request() call can't fail. Note that the reserve may need
 	 * to be redone if the request is not actually submitted straight
 	 * away, e.g. because a GPU scheduler has deferred it.
-	 *
-	 * Note further that this call merely notes the reserve request. A
-	 * subsequent call to *_ring_begin() is required to actually ensure
-	 * that the reservation is available. Without the begin, if the
-	 * request creator immediately submitted the request without adding
-	 * any commands to it then there might not actually be sufficient
-	 * room for the submission commands. Unfortunately, the current
-	 * *_ring_begin() implementations potentially call back here to
-	 * i915_gem_request_alloc(). Thus calling _begin() here would lead to
-	 * infinite recursion! Until that back call path is removed, it is
-	 * necessary to do a manual _begin() outside.
 	 */
-	ret = intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
+	if (i915.enable_execlists)
+		ret = logical_ring_reserved_space_reserve(request);
+	else
+		ret = legacy_ring_reserved_space_reserve(request);
 	if (ret) {
 		/*
 		 * At this point, the request is fully allocated even if not
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c16d726..8cb34c6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -829,6 +829,21 @@ static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
 	return 0;
 }
 
+int logical_ring_reserved_space_reserve(struct drm_i915_gem_request *request)
+{
+	/*
+	 * The first call merely notes the reserve request and is common for
+	 * all back ends. The subsequent localised _begin() call actually
+	 * ensures that the reservation is available. Without the begin, if
+	 * the request creator immediately submitted the request without
+	 * adding any commands to it then there might not actually be
+	 * sufficient room for the submission commands.
+	 */
+	intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
+
+	return intel_logical_ring_begin(request, 0);
+}
+
 /**
  * execlists_submission() - submit a batchbuffer for execution, Execlists style
  * @dev: DRM device.
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 044c0e5..905a83e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -37,6 +37,7 @@
 
 /* Logical Rings */
 int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request);
+int logical_ring_reserved_space_reserve(struct drm_i915_gem_request *request);
 void intel_logical_ring_stop(struct intel_engine_cs *ring);
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
 int intel_logical_rings_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 6f198df..c7dcabd 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2205,21 +2205,27 @@ int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
 	return 0;
 }
 
-int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
+int legacy_ring_reserved_space_reserve(struct drm_i915_gem_request *request)
 {
-	/* NB: Until request management is fully tidied up and the OLR is
-	 * removed, there are too many ways for get false hits on this
-	 * anti-recursion check! */
-	/*WARN_ON(ringbuf->reserved_size);*/
+	/*
+	 * The first call merely notes the reserve request and is common for
+	 * all back ends. The subsequent localised _begin() call actually
+	 * ensures that the reservation is available. Without the begin, if
+	 * the request creator immediately submitted the request without
+	 * adding any commands to it then there might not actually be
+	 * sufficient room for the submission commands.
+	 */
+	intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
+
+	return intel_ring_begin(request, 0);
+}
+
+void intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
+{
+	WARN_ON(ringbuf->reserved_size);
 	WARN_ON(ringbuf->reserved_in_use);
 
 	ringbuf->reserved_size = size;
-
-	/*
-	 * Really need to call _begin() here but that currently leads to
-	 * recursion problems! So just return zero and hope for the best...
-	 */
-	return 0;
 }
 
 void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index f6ab6bb..365b98d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -442,7 +442,8 @@ intel_ring_get_request(struct intel_engine_cs *ring)
 
 #define MIN_SPACE_FOR_ADD_REQUEST	128
 
-int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size);
+int legacy_ring_reserved_space_reserve(struct drm_i915_gem_request *request);
+void intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size);
 void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size);
 void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf);
 
-- 
1.7.9.5

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[PATCH 52/59] drm/i915: Remove the now obsolete intel_ring_get_request()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

Much of the driver has now been converted to passing requests around instead of
rings/ringbufs/contexts. Thus the function for retreiving the request from a
ring (i.e. the OLR) is no longer used and can be removed.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.h |    7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 365b98d..3002338 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -433,13 +433,6 @@ static inline u32 intel_ring_get_tail(struct intel_ringbuffer *ringbuf)
 	return ringbuf->tail;
 }
 
-static inline struct drm_i915_gem_request *
-intel_ring_get_request(struct intel_engine_cs *ring)
-{
-	BUG_ON(ring->outstanding_lazy_request == NULL);
-	return ring->outstanding_lazy_request;
-}
-
 #define MIN_SPACE_FOR_ADD_REQUEST	128
 
 int legacy_ring_reserved_space_reserve(struct drm_i915_gem_request *request);
-- 
1.7.9.5

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[PATCH 53/59] drm/i915: Remove the now obsolete 'outstanding_lazy_request'

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The outstanding_lazy_request is no longer used anywhere in the driver.
Everything that was looking at it now has a request explicitly passed in from on
high. Everything that was relying upon it behind the scenes is now explicitly
creating/passing/submitting it's own private request. Thus the OLR can be
removed.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c            |   16 ++--------------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    4 +---
 drivers/gpu/drm/i915/intel_lrc.c           |    1 -
 drivers/gpu/drm/i915/intel_ringbuffer.c    |    8 --------
 drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ----
 5 files changed, 3 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fe2de21..9ff9bda 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1161,9 +1161,6 @@ i915_gem_check_olr(struct drm_i915_gem_request *req)
 {
 	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
 
-	if (req == req->ring->outstanding_lazy_request)
-		i915_add_request(req);
-
 	return 0;
 }
 
@@ -2344,8 +2341,6 @@ void __i915_add_request(struct drm_i915_gem_request *request,
 	dev_priv = ring->dev->dev_private;
 	ringbuf = request->ringbuf;
 
-	WARN_ON(request != ring->outstanding_lazy_request);
-
 	/*
 	 * To ensure that this call will not fail, space for it's emissions
 	 * should already have been reserved in the ring buffer. Let the ring
@@ -2412,7 +2407,6 @@ void __i915_add_request(struct drm_i915_gem_request *request,
 	}
 
 	trace_i915_gem_request_add(request);
-	ring->outstanding_lazy_request = NULL;
 
 	i915_queue_hangcheck(ring->dev);
 
@@ -2526,8 +2520,7 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
 	if (!req_out)
 		return -EINVAL;
 
-	if ((*req_out = ring->outstanding_lazy_request) != NULL)
-		return 0;
+	*req_out = NULL;
 
 	request = kzalloc(sizeof(*request), GFP_KERNEL);
 	if (request == NULL)
@@ -2576,7 +2569,7 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
 		return ret;
 	}
 
-	*req_out = ring->outstanding_lazy_request = request;
+	*req_out = request;
 	return 0;
 }
 
@@ -2671,9 +2664,6 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
 
 		i915_gem_free_request(request);
 	}
-
-	/* This may not have been flushed before the reset, so clean it now */
-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
 }
 
 void i915_gem_restore_fences(struct drm_device *dev)
@@ -3131,8 +3121,6 @@ int i915_gpu_idle(struct drm_device *dev)
 			i915_add_request_no_flush(req);
 		}
 
-		WARN_ON(ring->outstanding_lazy_request);
-
 		ret = intel_ring_idle(ring);
 		if (ret)
 			return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 9345db8..c512979 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1638,10 +1638,8 @@ err:
 	 * must be freed again. If it was submitted then it is being tracked
 	 * on the active request list and no clean up is required here.
 	 */
-	if (ret && params->request) {
+	if (ret && params->request)
 		i915_gem_request_cancel(params->request);
-		ring->outstanding_lazy_request = NULL;
-	}
 
 	mutex_unlock(&dev->struct_mutex);
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 8cb34c6..60bcf9a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1384,7 +1384,6 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
 
 	intel_logical_ring_stop(ring);
 	WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0);
-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
 
 	if (ring->cleanup)
 		ring->cleanup(ring);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index c7dcabd..c5752c4 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2051,7 +2051,6 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
 
 	intel_unpin_ringbuffer_obj(ringbuf);
 	intel_destroy_ringbuffer_obj(ringbuf);
-	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
 
 	if (ring->cleanup)
 		ring->cleanup(ring);
@@ -2182,11 +2181,6 @@ int intel_ring_idle(struct intel_engine_cs *ring)
 {
 	struct drm_i915_gem_request *req;
 
-	/* We need to add any requests required to flush the objects and ring */
-	WARN_ON(ring->outstanding_lazy_request);
-	if (ring->outstanding_lazy_request)
-		i915_add_request(ring->outstanding_lazy_request);
-
 	/* Wait upon the last request to be completed */
 	if (list_empty(&ring->request_list))
 		return 0;
@@ -2321,8 +2315,6 @@ void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	BUG_ON(ring->outstanding_lazy_request);
-
 	if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {
 		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
 		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 3002338..68097c1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -261,10 +261,6 @@ struct  intel_engine_cs {
 	 */
 	struct list_head request_list;
 
-	/**
-	 * Do we have some not yet emitted requests outstanding?
-	 */
-	struct drm_i915_gem_request *outstanding_lazy_request;
 	bool gpu_caches_dirty;
 
 	wait_queue_head_t irq_queue;
-- 
1.7.9.5

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[PATCH 54/59] drm/i915: Move the request/file and request/pid association to creation time

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

In _i915_add_request(), the request is associated with a userland client.
Specifically it is linked to the 'file' structure and the current user process
is recorded. One problem here is that the current user process is not
necessarily the same as when the request was submitted to the driver. This is
especially true when the GPU scheduler arrives and decouples driver submission
from hardware submission. Note also that it is only in the case where the add
request comes from an execbuff call that there is a client to associate. Any
other add request call is kernel only so does not need to do it.

This patch moves the client association into a separate function. This is then
called from the execbuffer code path itself at a sensible time. It also removes
the now redundant 'file' pointer from the add request parameter list.

An extra cleanup of the client association is also added to the request clean up
code for the eventuality where the request is killed after association but
before being submitted (e.g. due to out of memory error somewhere). Once the
submission has happened, the request is on the request list and the regular
request list removal will clear the association. Note that this still needs to
happen at this point in time because the request might be kept floating around
much longer (due to someone holding a reference count) and the client should not
be worrying about this request after it has been retired.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h            |    8 +++--
 drivers/gpu/drm/i915/i915_gem.c            |   53 ++++++++++++++++++++--------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    6 +++-
 3 files changed, 48 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 839c185..764ee4f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2127,6 +2127,9 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
 			   struct drm_i915_gem_request **req_out);
 void i915_gem_request_cancel(struct drm_i915_gem_request *req);
 void i915_gem_request_free(struct kref *req_ref);
+void i915_gem_request_remove_from_client(struct drm_i915_gem_request *request);
+int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
+				   struct drm_file *file);
 
 static inline uint32_t
 i915_gem_request_get_seqno(struct drm_i915_gem_request *req)
@@ -2752,13 +2755,12 @@ void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
 int __must_check i915_gpu_idle(struct drm_device *dev);
 int __must_check i915_gem_suspend(struct drm_device *dev);
 void __i915_add_request(struct drm_i915_gem_request *req,
-			struct drm_file *file,
 			struct drm_i915_gem_object *batch_obj,
 			bool flush_caches);
 #define i915_add_request(req) \
-	__i915_add_request(req, NULL, NULL, true)
+	__i915_add_request(req, NULL, true)
 #define i915_add_request_no_flush(req) \
-	__i915_add_request(req, NULL, NULL, false)
+	__i915_add_request(req, NULL, false)
 int __i915_wait_request(struct drm_i915_gem_request *req,
 			unsigned reset_counter,
 			bool interruptible,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9ff9bda..ecdae34 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2324,7 +2324,6 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
  * going to happen on the hardware. This would be a Bad Thing(tm).
  */
 void __i915_add_request(struct drm_i915_gem_request *request,
-			struct drm_file *file,
 			struct drm_i915_gem_object *obj,
 			bool flush_caches)
 {
@@ -2392,19 +2391,6 @@ void __i915_add_request(struct drm_i915_gem_request *request,
 
 	request->emitted_jiffies = jiffies;
 	list_add_tail(&request->list, &ring->request_list);
-	request->file_priv = NULL;
-
-	if (file) {
-		struct drm_i915_file_private *file_priv = file->driver_priv;
-
-		spin_lock(&file_priv->mm.lock);
-		request->file_priv = file_priv;
-		list_add_tail(&request->client_list,
-			      &file_priv->mm.request_list);
-		spin_unlock(&file_priv->mm.lock);
-
-		request->pid = get_pid(task_pid(current));
-	}
 
 	trace_i915_gem_request_add(request);
 
@@ -2420,7 +2406,34 @@ void __i915_add_request(struct drm_i915_gem_request *request,
 	intel_ring_reserved_space_end(ringbuf);
 }
 
-static inline void
+int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
+				   struct drm_file *file)
+{
+	struct drm_i915_private *dev_private;
+	struct drm_i915_file_private *file_priv;
+
+	WARN_ON(!req || !file || req->file_priv);
+
+	if (!req || !file)
+		return -EINVAL;
+
+	if (req->file_priv)
+		return -EINVAL;
+
+	dev_private = req->ring->dev->dev_private;
+	file_priv = file->driver_priv;
+
+	spin_lock(&file_priv->mm.lock);
+	req->file_priv = file_priv;
+	list_add_tail(&req->client_list, &file_priv->mm.request_list);
+	spin_unlock(&file_priv->mm.lock);
+
+	req->pid = get_pid(task_pid(current));
+
+	return 0;
+}
+
+inline void
 i915_gem_request_remove_from_client(struct drm_i915_gem_request *request)
 {
 	struct drm_i915_file_private *file_priv = request->file_priv;
@@ -2495,6 +2508,9 @@ void i915_gem_request_free(struct kref *req_ref)
 						 typeof(*req), ref);
 	struct intel_context *ctx = req->ctx;
 
+	if (req->file_priv)
+		i915_gem_request_remove_from_client(req);
+
 	if (ctx) {
 		if (i915.enable_execlists) {
 			struct intel_engine_cs *ring = req->ring;
@@ -4120,6 +4136,13 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file)
 		if (time_after_eq(request->emitted_jiffies, recent_enough))
 			break;
 
+		/*
+		 * Note that the request might not have been submitted yet.
+		 * In which case emitted_jiffies will be zero.
+		 */
+		if (!request->emitted_jiffies)
+			continue;
+
 		target = request;
 	}
 	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index c512979..8efc7f8 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1060,7 +1060,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
 	params->ring->gpu_caches_dirty = true;
 
 	/* Add a breadcrumb for the completion of the batch buffer */
-	__i915_add_request(params->request, params->file, params->batch_obj, true);
+	__i915_add_request(params->request, params->batch_obj, true);
 }
 
 static int
@@ -1603,6 +1603,10 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 	if (ret)
 		goto err_batch_unpin;
 
+	ret = i915_gem_request_add_to_client(params->request, file);
+	if (ret)
+		goto err_batch_unpin;
+
 	/*
 	 * Save assorted stuff away to pass through to *_submission().
 	 * NB: This data should be 'persistent' and not local as it will
-- 
1.7.9.5

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[PATCH 55/59] drm/i915: Remove fallback poll for ring buffer space

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

When the ring buffer is full, the driver finds an outstanding request that will
free up sufficient space for the current operation and waits for it to complete.
If no such request can be found, there is a fall back path of just polling until
sufficient space is available.

This path should not be required any more. It is a hangover from the bad days of
OLR such that it was possible for the ring to be completely filled without ever
having submitted a request. This can no longer happen as requests are now
submitted in a timely manner. Hence the entire polling path is obsolete. As it
also causes headaches in LRC land due to nesting faked requests, it is being
removed entirely.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c        |   65 ++++---------------------------
 drivers/gpu/drm/i915/intel_ringbuffer.c |   62 +++--------------------------
 2 files changed, 13 insertions(+), 114 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 60bcf9a..f21f449 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -622,8 +622,9 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
 	return 0;
 }
 
-static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
-				     int bytes)
+static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
+				       struct intel_context *ctx,
+				       int bytes)
 {
 	struct intel_engine_cs *ring = ringbuf->ring;
 	struct drm_i915_gem_request *request;
@@ -652,8 +653,11 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
 			break;
 	}
 
-	if (&request->list == &ring->request_list)
+	/* It should always be possible to find a suitable request! */
+	if (&request->list == &ring->request_list) {
+		WARN_ON(true);
 		return -ENOSPC;
+	}
 
 	ret = i915_wait_request(request);
 	if (ret)
@@ -663,7 +667,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
 
 	WARN_ON(intel_ring_space(ringbuf) < new_space);
 
-	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
+	return 0;
 }
 
 /*
@@ -690,59 +694,6 @@ intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
 	execlists_context_queue(ring, ctx, ringbuf->tail, request);
 }
 
-static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
-				       struct intel_context *ctx,
-				       int bytes)
-{
-	struct intel_engine_cs *ring = ringbuf->ring;
-	struct drm_device *dev = ring->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	unsigned long end;
-	int ret;
-
-	/* The whole point of reserving space is to not wait! */
-	WARN_ON(ringbuf->reserved_in_use);
-
-	ret = logical_ring_wait_request(ringbuf, bytes);
-	if (ret != -ENOSPC)
-		return ret;
-
-	/* Force the context submission in case we have been skipping it */
-	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
-
-	/* With GEM the hangcheck timer should kick us out of the loop,
-	 * leaving it early runs the risk of corrupting GEM state (due
-	 * to running on almost untested codepaths). But on resume
-	 * timers don't work yet, so prevent a complete hang in that
-	 * case by choosing an insanely large timeout. */
-	end = jiffies + 60 * HZ;
-
-	ret = 0;
-	do {
-		if (intel_ring_space(ringbuf) >= bytes)
-			break;
-
-		msleep(1);
-
-		if (dev_priv->mm.interruptible && signal_pending(current)) {
-			ret = -ERESTARTSYS;
-			break;
-		}
-
-		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
-					   dev_priv->mm.interruptible);
-		if (ret)
-			break;
-
-		if (time_after(jiffies, end)) {
-			ret = -EBUSY;
-			break;
-		}
-	} while (1);
-
-	return ret;
-}
-
 static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
 				    struct intel_context *ctx)
 {
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index c5752c4..6099fce 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2063,7 +2063,7 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
 	ring->buffer = NULL;
 }
 
-static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
+static int ring_wait_for_space(struct intel_engine_cs *ring, int n)
 {
 	struct intel_ringbuffer *ringbuf = ring->buffer;
 	struct drm_i915_gem_request *request;
@@ -2082,8 +2082,11 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
 			break;
 	}
 
-	if (&request->list == &ring->request_list)
+	/* It should always be possible to find a suitable request! */
+	if (&request->list == &ring->request_list) {
+		WARN_ON(true);
 		return -ENOSPC;
+	}
 
 	ret = i915_wait_request(request);
 	if (ret)
@@ -2096,61 +2099,6 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
 	return 0;
 }
 
-static int ring_wait_for_space(struct intel_engine_cs *ring, int n)
-{
-	struct drm_device *dev = ring->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_ringbuffer *ringbuf = ring->buffer;
-	unsigned long end;
-	int ret;
-
-	/* The whole point of reserving space is to not wait! */
-	WARN_ON(ringbuf->reserved_in_use);
-
-	ret = intel_ring_wait_request(ring, n);
-	if (ret != -ENOSPC)
-		return ret;
-
-	/* force the tail write in case we have been skipping them */
-	__intel_ring_advance(ring);
-
-	/* With GEM the hangcheck timer should kick us out of the loop,
-	 * leaving it early runs the risk of corrupting GEM state (due
-	 * to running on almost untested codepaths). But on resume
-	 * timers don't work yet, so prevent a complete hang in that
-	 * case by choosing an insanely large timeout. */
-	end = jiffies + 60 * HZ;
-
-	ret = 0;
-	trace_i915_ring_wait_begin(ring);
-	do {
-		if (intel_ring_space(ringbuf) >= n)
-			break;
-		ringbuf->head = I915_READ_HEAD(ring);
-		if (intel_ring_space(ringbuf) >= n)
-			break;
-
-		msleep(1);
-
-		if (dev_priv->mm.interruptible && signal_pending(current)) {
-			ret = -ERESTARTSYS;
-			break;
-		}
-
-		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
-					   dev_priv->mm.interruptible);
-		if (ret)
-			break;
-
-		if (time_after(jiffies, end)) {
-			ret = -EBUSY;
-			break;
-		}
-	} while (1);
-	trace_i915_ring_wait_end(ring);
-	return ret;
-}
-
 static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
 {
 	uint32_t __iomem *virt;
-- 
1.7.9.5

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[PATCH 56/59] drm/i915: Remove 'faked' request from LRC submission

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The LRC submission code requires a request for tracking purposes. It does not
actually require that request to 'complete' it simply uses it for keeping hold
of reference counts on contexts and such like.

Previously, the fall back path of polling for space in the ring would start by
submitting any outstanding work that was sat in the buffer. This submission was
not done as part of the request that that work was owned by because that would
lead to complications with the request being submitted twice. Instead, a null
request structure was passed in to the submit call and a fake one was created.

That fall back path has long since been obsoleted and has now been removed. Thus
there is never any need to fake up a request structure. This patch removes that
code. A couple of sanity check warnings are added as well, just in case.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   22 +++++-----------------
 1 file changed, 5 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f21f449..82190ad 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -507,23 +507,11 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
 	if (to != ring->default_context)
 		intel_lr_context_pin(ring, to);
 
-	if (!request) {
-		/*
-		 * If there isn't a request associated with this submission,
-		 * create one as a temporary holder.
-		 */
-		request = kzalloc(sizeof(*request), GFP_KERNEL);
-		if (request == NULL)
-			return -ENOMEM;
-		request->ring = ring;
-		request->ctx = to;
-		kref_init(&request->ref);
-		request->uniq = dev_priv->request_uniq++;
-		i915_gem_context_reference(request->ctx);
-	} else {
-		i915_gem_request_reference(request);
-		WARN_ON(to != request->ctx);
-	}
+	WARN_ON(!request);
+	WARN_ON(to != request->ctx);
+
+	i915_gem_request_reference(request);
+
 	request->tail = tail;
 
 	intel_runtime_pm_get(dev_priv);
-- 
1.7.9.5

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[PATCH 57/59] drm/i915: Update a bunch of LRC functions to take requests

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

A bunch of the low level LRC functions were passing around ringbuf and ctx
pairs. In a few cases, they took the r/c pair and a request as well. This is all
quite messy and unnecesary. The context_queue() call is especially bad since the
fake request code got removed - it takes a request and three extra things that
must be extracted from the request and then it checks them against what it finds
in the request. Removing all the derivable data makes the code much simpler all
round.

This patch updates those functions to just take the request structure.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c |   66 +++++++++++++++++---------------------
 1 file changed, 29 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 82190ad..ae00054 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -494,25 +494,20 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
 		   ((u32)ring->next_context_status_buffer & 0x07) << 8);
 }
 
-static int execlists_context_queue(struct intel_engine_cs *ring,
-				   struct intel_context *to,
-				   u32 tail,
-				   struct drm_i915_gem_request *request)
+static int execlists_context_queue(struct drm_i915_gem_request *request)
 {
+	struct intel_engine_cs *ring = request->ring;
 	struct drm_i915_gem_request *cursor;
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	unsigned long flags;
 	int num_elements = 0;
 
-	if (to != ring->default_context)
-		intel_lr_context_pin(ring, to);
-
-	WARN_ON(!request);
-	WARN_ON(to != request->ctx);
+	if (request->ctx != ring->default_context)
+		intel_lr_context_pin(ring, request->ctx);
 
 	i915_gem_request_reference(request);
 
-	request->tail = tail;
+	request->tail = request->ringbuf->tail;
 
 	intel_runtime_pm_get(dev_priv);
 
@@ -529,7 +524,7 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
 					   struct drm_i915_gem_request,
 					   execlist_link);
 
-		if (to == tail_req->ctx) {
+		if (request->ctx == tail_req->ctx) {
 			WARN(tail_req->elsp_submitted != 0,
 				"More than 2 already-submitted reqs queued\n");
 			list_del(&tail_req->execlist_link);
@@ -610,12 +605,12 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
 	return 0;
 }
 
-static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
-				       struct intel_context *ctx,
+static int logical_ring_wait_for_space(struct drm_i915_gem_request *req,
 				       int bytes)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
-	struct drm_i915_gem_request *request;
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
+	struct intel_engine_cs *ring = req->ring;
+	struct drm_i915_gem_request *target;
 	int ret, new_space;
 
 	/* The whole point of reserving space is to not wait! */
@@ -624,30 +619,30 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 	if (intel_ring_space(ringbuf) >= bytes)
 		return 0;
 
-	list_for_each_entry(request, &ring->request_list, list) {
+	list_for_each_entry(target, &ring->request_list, list) {
 		/*
 		 * The request queue is per-engine, so can contain requests
 		 * from multiple ringbuffers. Here, we must ignore any that
 		 * aren't from the ringbuffer we're considering.
 		 */
-		struct intel_context *ctx = request->ctx;
+		struct intel_context *ctx = target->ctx;
 		if (ctx->engine[ring->id].ringbuf != ringbuf)
 			continue;
 
 		/* Would completion of this request free enough space? */
-		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
+		new_space = __intel_ring_space(target->postfix, ringbuf->tail,
 				       ringbuf->size);
 		if (new_space >= bytes)
 			break;
 	}
 
 	/* It should always be possible to find a suitable request! */
-	if (&request->list == &ring->request_list) {
+	if (&target->list == &ring->request_list) {
 		WARN_ON(true);
 		return -ENOSPC;
 	}
 
-	ret = i915_wait_request(request);
+	ret = i915_wait_request(target);
 	if (ret)
 		return ret;
 
@@ -660,7 +655,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
 
 /*
  * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
- * @ringbuf: Logical Ringbuffer to advance.
+ * @request: Request to advance the logical ringbuffer of.
  *
  * The tail is updated in our logical ringbuffer struct, not in the actual context. What
  * really happens during submission is that the context and current tail will be placed
@@ -668,23 +663,21 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
  * point, the tail *inside* the context is updated and the ELSP written to.
  */
 static void
-intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
-				      struct intel_context *ctx,
-				      struct drm_i915_gem_request *request)
+intel_logical_ring_advance_and_submit(struct drm_i915_gem_request *request)
 {
-	struct intel_engine_cs *ring = ringbuf->ring;
+	struct intel_engine_cs *ring = request->ring;
 
-	intel_logical_ring_advance(ringbuf);
+	intel_logical_ring_advance(request->ringbuf);
 
 	if (intel_ring_stopped(ring))
 		return;
 
-	execlists_context_queue(ring, ctx, ringbuf->tail, request);
+	execlists_context_queue(request);
 }
 
-static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
-				    struct intel_context *ctx)
+static int logical_ring_wrap_buffer(struct drm_i915_gem_request *req)
 {
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	uint32_t __iomem *virt;
 	int rem = ringbuf->size - ringbuf->tail;
 
@@ -692,7 +685,7 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
 	WARN_ON(ringbuf->reserved_in_use);
 
 	if (ringbuf->space < rem) {
-		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
+		int ret = logical_ring_wait_for_space(req, rem);
 
 		if (ret)
 			return ret;
@@ -709,22 +702,22 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
 	return 0;
 }
 
-static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
-				struct intel_context *ctx, int bytes)
+static int logical_ring_prepare(struct drm_i915_gem_request *req, int bytes)
 {
+	struct intel_ringbuffer *ringbuf = req->ringbuf;
 	int ret;
 
 	if (!ringbuf->reserved_in_use)
 		bytes += ringbuf->reserved_size;
 
 	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
-		ret = logical_ring_wrap_buffer(ringbuf, ctx);
+		ret = logical_ring_wrap_buffer(req);
 		if (unlikely(ret))
 			return ret;
 	}
 
 	if (unlikely(ringbuf->space < bytes)) {
-		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
+		ret = logical_ring_wait_for_space(req, bytes);
 		if (unlikely(ret))
 			return ret;
 	}
@@ -759,8 +752,7 @@ static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
 	if (ret)
 		return ret;
 
-	ret = logical_ring_prepare(req->ringbuf, req->ctx,
-				   num_dwords * sizeof(uint32_t));
+	ret = logical_ring_prepare(req, num_dwords * sizeof(uint32_t));
 	if (ret)
 		return ret;
 
@@ -1266,7 +1258,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
 	intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request));
 	intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
 	intel_logical_ring_emit(ringbuf, MI_NOOP);
-	intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
+	intel_logical_ring_advance_and_submit(request);
 
 	return 0;
 }
-- 
1.7.9.5

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[PATCH 58/59] drm/i915: Remove the now obsolete 'i915_gem_check_olr()'

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

As there is no OLR to check, the check_olr() function is now a no-op and can be
removed.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h |    1 -
 drivers/gpu/drm/i915/i915_gem.c |   28 ----------------------------
 2 files changed, 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 764ee4f..0a68dbc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2713,7 +2713,6 @@ bool i915_gem_retire_requests(struct drm_device *dev);
 void i915_gem_retire_requests_ring(struct intel_engine_cs *ring);
 int __must_check i915_gem_check_wedge(struct i915_gpu_error *error,
 				      bool interruptible);
-int __must_check i915_gem_check_olr(struct drm_i915_gem_request *req);
 
 static inline bool i915_reset_in_progress(struct i915_gpu_error *error)
 {
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ecdae34..acb824c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1153,17 +1153,6 @@ i915_gem_check_wedge(struct i915_gpu_error *error,
 	return 0;
 }
 
-/*
- * Compare arbitrary request against outstanding lazy request. Emit on match.
- */
-int
-i915_gem_check_olr(struct drm_i915_gem_request *req)
-{
-	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
-
-	return 0;
-}
-
 static void fake_irq(unsigned long data)
 {
 	wake_up_process((struct task_struct *)data);
@@ -1338,10 +1327,6 @@ i915_wait_request(struct drm_i915_gem_request *req)
 	if (ret)
 		return ret;
 
-	ret = i915_gem_check_olr(req);
-	if (ret)
-		return ret;
-
 	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
 	i915_gem_request_reference(req);
 	ret = __i915_wait_request(req, reset_counter,
@@ -1415,10 +1400,6 @@ i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj,
 	if (ret)
 		return ret;
 
-	ret = i915_gem_check_olr(req);
-	if (ret)
-		return ret;
-
 	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
 	i915_gem_request_reference(req);
 	mutex_unlock(&dev->struct_mutex);
@@ -2852,15 +2833,10 @@ static int
 i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
 {
 	struct intel_engine_cs *ring;
-	int ret;
 
 	if (obj->active) {
 		ring = i915_gem_request_get_ring(obj->last_read_req);
 
-		ret = i915_gem_check_olr(obj->last_read_req);
-		if (ret)
-			return ret;
-
 		i915_gem_retire_requests_ring(ring);
 	}
 
@@ -2997,10 +2973,6 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
 			return ret;
 	}
 
-	ret = i915_gem_check_olr(obj->last_read_req);
-	if (ret)
-		return ret;
-
 	trace_i915_gem_ring_sync_to(*to_req, from, obj->last_read_req);
 	ret = to->semaphore.sync_to(*to_req, from, seqno);
 	if (!ret)
-- 
1.7.9.5

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[PATCH 59/59] drm/i915: Remove the almost obsolete i915_gem_object_flush_active()

[John.C.Harrison]

From: John Harrison <John.C.Harrison@Intel.com>

The i915_gem_object_flush_active() call used to do lots. Over time it has done
less and less. Now all it does call i915_gem_retire_requests_ring(). Hence it is
pretty much redundant as the two callers could just call retire directly. This
patch makes that change.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c |   43 +++++++++++----------------------------
 1 file changed, 12 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index acb824c..aef4748 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2825,25 +2825,6 @@ i915_gem_idle_work_handler(struct work_struct *work)
 }
 
 /**
- * Ensures that an object will eventually get non-busy by flushing any required
- * write domains, emitting any outstanding lazy request and retiring and
- * completed requests.
- */
-static int
-i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
-{
-	struct intel_engine_cs *ring;
-
-	if (obj->active) {
-		ring = i915_gem_request_get_ring(obj->last_read_req);
-
-		i915_gem_retire_requests_ring(ring);
-	}
-
-	return 0;
-}
-
-/**
  * i915_gem_wait_ioctl - implements DRM_IOCTL_I915_GEM_WAIT
  * @DRM_IOCTL_ARGS: standard ioctl arguments
  *
@@ -2888,10 +2869,12 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
 		return -ENOENT;
 	}
 
-	/* Need to make sure the object gets inactive eventually. */
-	ret = i915_gem_object_flush_active(obj);
-	if (ret)
-		goto out;
+	/* Make sure the object is not pending cleanup. */
+	if (obj->last_read_req) {
+		struct intel_engine_cs *ring;
+		ring = i915_gem_request_get_ring(obj->last_read_req);
+		i915_gem_retire_requests_ring(ring);
+	}
 
 	if (!obj->active || !obj->last_read_req)
 		goto out;
@@ -4335,19 +4318,17 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
 		goto unlock;
 	}
 
-	/* Count all active objects as busy, even if they are currently not used
-	 * by the gpu. Users of this interface expect objects to eventually
-	 * become non-busy without any further actions, therefore emit any
-	 * necessary flushes here.
-	 */
-	ret = i915_gem_object_flush_active(obj);
-
 	args->busy = obj->active;
 	if (obj->last_read_req) {
 		struct intel_engine_cs *ring;
 		BUILD_BUG_ON(I915_NUM_RINGS > 16);
 		ring = i915_gem_request_get_ring(obj->last_read_req);
-		args->busy |= intel_ring_flag(ring) << 16;
+
+		/* Check that the object wasn't simply pending cleanup */
+		i915_gem_retire_requests_ring(ring);
+
+		if (obj->last_read_req)
+			args->busy |= intel_ring_flag(ring) << 16;
 	}
 
 	drm_gem_object_unreference(&obj->base);
-- 
1.7.9.5

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Re: [PATCH 04/59] drm/i915: Fix for ringbuf space wait in LRC mode

[Daniel, Thomas]

> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
> John.C.Harrison@Intel.com
> Sent: Thursday, March 19, 2015 12:30 PM
> To: Intel-GFX@Lists.FreeDesktop.Org
> Subject: [Intel-gfx] [PATCH 04/59] drm/i915: Fix for ringbuf space wait in LRC
> mode
> 
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> The legacy and LRC code paths have an almost identical procedure for waiting
> for
> space in the ring buffer. They both search for a request in the free list that
> will advance the tail to a point where sufficient space is available. They then
> wait for that request, retire it and recalculate the free space value.
> 
> Unfortunately, a bug in the LRC side meant that the resulting free space might
> not be as large as expected and indeed, might not be sufficient. This is because
> it was testing against the value of request->tail not request->postfix. Whereas,
> when a request is retired, ringbuf->tail is updated to req->postfix not
> req->tail.
> 
> Another significant difference between the two is that the LRC one did not trust
> the wait for request to work! It redid the is there enough space available test
> and would fail the call if insufficient. Whereas, the legacy version just said
> 'return 0' - it assumed the preceeding code works. This difference meant that
> the LRC version still worked even with the bug - it just fell back to the
> polling wait path.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c        |   10 ++++++----
>  drivers/gpu/drm/i915/intel_ringbuffer.c |   10 ++++++----
>  2 files changed, 12 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 6504689..1c3834fc 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -634,7 +634,7 @@ static int logical_ring_wait_request(struct
> intel_ringbuffer *ringbuf,
>  {
>  	struct intel_engine_cs *ring = ringbuf->ring;
>  	struct drm_i915_gem_request *request;
> -	int ret;
> +	int ret, new_space;
> 
>  	if (intel_ring_space(ringbuf) >= bytes)
>  		return 0;
> @@ -650,10 +650,10 @@ static int logical_ring_wait_request(struct
> intel_ringbuffer *ringbuf,
>  			continue;
> 
>  		/* Would completion of this request free enough space? */
> -		if (__intel_ring_space(request->tail, ringbuf->tail,
> -				       ringbuf->size) >= bytes) {
> +		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
> +				       ringbuf->size);
> +		if (new_space >= bytes)
>  			break;
> -		}
>  	}
> 
>  	if (&request->list == &ring->request_list)
> @@ -665,6 +665,8 @@ static int logical_ring_wait_request(struct
> intel_ringbuffer *ringbuf,
> 
>  	i915_gem_retire_requests_ring(ring);
> 
> +	WARN_ON(intel_ring_space(ringbuf) < new_space);
> +
>  	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
>  }
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 99fb2f0..a26bdf8 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2059,16 +2059,16 @@ static int intel_ring_wait_request(struct
> intel_engine_cs *ring, int n)
>  {
>  	struct intel_ringbuffer *ringbuf = ring->buffer;
>  	struct drm_i915_gem_request *request;
> -	int ret;
> +	int ret, new_space;
> 
>  	if (intel_ring_space(ringbuf) >= n)
>  		return 0;
> 
>  	list_for_each_entry(request, &ring->request_list, list) {
> -		if (__intel_ring_space(request->postfix, ringbuf->tail,
> -				       ringbuf->size) >= n) {
> +		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
> +				       ringbuf->size);
> +		if (new_space >= n)
>  			break;
> -		}
>  	}
> 
>  	if (&request->list == &ring->request_list)
> @@ -2080,6 +2080,8 @@ static int intel_ring_wait_request(struct
> intel_engine_cs *ring, int n)
> 
>  	i915_gem_retire_requests_ring(ring);
> 
> +	WARN_ON(intel_ring_space(ringbuf) < new_space);
> +
>  	return 0;
>  }
> 
> --
> 1.7.9.5

Reviewed-by: Thomas Daniel <thomas.daniel@intel.com>

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Re: [PATCH 55/59] drm/i915: Remove fallback poll for ring buffer space

[Daniel, Thomas]

> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
> John.C.Harrison@Intel.com
> Sent: Thursday, March 19, 2015 12:31 PM
> To: Intel-GFX@Lists.FreeDesktop.Org
> Subject: [Intel-gfx] [PATCH 55/59] drm/i915: Remove fallback poll for ring buffer
> space
> 
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> When the ring buffer is full, the driver finds an outstanding request that will
> free up sufficient space for the current operation and waits for it to complete.
> If no such request can be found, there is a fall back path of just polling until
> sufficient space is available.
> 
> This path should not be required any more. It is a hangover from the bad days of
> OLR such that it was possible for the ring to be completely filled without ever
> having submitted a request. This can no longer happen as requests are now
> submitted in a timely manner. Hence the entire polling path is obsolete. As it
> also causes headaches in LRC land due to nesting faked requests, it is being
> removed entirely.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c        |   65 ++++---------------------------
>  drivers/gpu/drm/i915/intel_ringbuffer.c |   62 +++--------------------------
>  2 files changed, 13 insertions(+), 114 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 60bcf9a..f21f449 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -622,8 +622,9 @@ int intel_logical_ring_alloc_request_extras(struct
> drm_i915_gem_request *request
>  	return 0;
>  }
> 
> -static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> -				     int bytes)
> +static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> +				       struct intel_context *ctx,
> +				       int bytes)
>  {
>  	struct intel_engine_cs *ring = ringbuf->ring;
>  	struct drm_i915_gem_request *request;
> @@ -652,8 +653,11 @@ static int logical_ring_wait_request(struct
> intel_ringbuffer *ringbuf,
>  			break;
>  	}
> 
> -	if (&request->list == &ring->request_list)
> +	/* It should always be possible to find a suitable request! */
> +	if (&request->list == &ring->request_list) {
> +		WARN_ON(true);
>  		return -ENOSPC;
> +	}
Don’t we normally say
	if (WARN_ON(&request->list == &ring->request_list))
		return -ENOSPC;

> 
>  	ret = i915_wait_request(request);
>  	if (ret)
> @@ -663,7 +667,7 @@ static int logical_ring_wait_request(struct
> intel_ringbuffer *ringbuf,
> 
>  	WARN_ON(intel_ring_space(ringbuf) < new_space);
> 
> -	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
> +	return 0;
>  }
> 
>  /*
> @@ -690,59 +694,6 @@ intel_logical_ring_advance_and_submit(struct
> intel_ringbuffer *ringbuf,
>  	execlists_context_queue(ring, ctx, ringbuf->tail, request);
>  }
> 
> -static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> -				       struct intel_context *ctx,
> -				       int bytes)
> -{
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_device *dev = ring->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	unsigned long end;
> -	int ret;
> -
> -	/* The whole point of reserving space is to not wait! */
> -	WARN_ON(ringbuf->reserved_in_use);
> -
> -	ret = logical_ring_wait_request(ringbuf, bytes);
> -	if (ret != -ENOSPC)
> -		return ret;
> -
> -	/* Force the context submission in case we have been skipping it */
> -	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
> -
> -	/* With GEM the hangcheck timer should kick us out of the loop,
> -	 * leaving it early runs the risk of corrupting GEM state (due
> -	 * to running on almost untested codepaths). But on resume
> -	 * timers don't work yet, so prevent a complete hang in that
> -	 * case by choosing an insanely large timeout. */
> -	end = jiffies + 60 * HZ;
> -
> -	ret = 0;
> -	do {
> -		if (intel_ring_space(ringbuf) >= bytes)
> -			break;
> -
> -		msleep(1);
> -
> -		if (dev_priv->mm.interruptible && signal_pending(current)) {
> -			ret = -ERESTARTSYS;
> -			break;
> -		}
> -
> -		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> -					   dev_priv->mm.interruptible);
> -		if (ret)
> -			break;
> -
> -		if (time_after(jiffies, end)) {
> -			ret = -EBUSY;
> -			break;
> -		}
> -	} while (1);
> -
> -	return ret;
> -}
> -
>  static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
>  				    struct intel_context *ctx)
>  {
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index c5752c4..6099fce 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2063,7 +2063,7 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs
> *ring)
>  	ring->buffer = NULL;
>  }
> 
> -static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
> +static int ring_wait_for_space(struct intel_engine_cs *ring, int n)
>  {
>  	struct intel_ringbuffer *ringbuf = ring->buffer;
>  	struct drm_i915_gem_request *request;
> @@ -2082,8 +2082,11 @@ static int intel_ring_wait_request(struct
> intel_engine_cs *ring, int n)
>  			break;
>  	}
> 
> -	if (&request->list == &ring->request_list)
> +	/* It should always be possible to find a suitable request! */
> +	if (&request->list == &ring->request_list) {
> +		WARN_ON(true);
>  		return -ENOSPC;
> +	}
Same thing.

Thomas.

> 
>  	ret = i915_wait_request(request);
>  	if (ret)
> @@ -2096,61 +2099,6 @@ static int intel_ring_wait_request(struct
> intel_engine_cs *ring, int n)
>  	return 0;
>  }
> 
> -static int ring_wait_for_space(struct intel_engine_cs *ring, int n)
> -{
> -	struct drm_device *dev = ring->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_ringbuffer *ringbuf = ring->buffer;
> -	unsigned long end;
> -	int ret;
> -
> -	/* The whole point of reserving space is to not wait! */
> -	WARN_ON(ringbuf->reserved_in_use);
> -
> -	ret = intel_ring_wait_request(ring, n);
> -	if (ret != -ENOSPC)
> -		return ret;
> -
> -	/* force the tail write in case we have been skipping them */
> -	__intel_ring_advance(ring);
> -
> -	/* With GEM the hangcheck timer should kick us out of the loop,
> -	 * leaving it early runs the risk of corrupting GEM state (due
> -	 * to running on almost untested codepaths). But on resume
> -	 * timers don't work yet, so prevent a complete hang in that
> -	 * case by choosing an insanely large timeout. */
> -	end = jiffies + 60 * HZ;
> -
> -	ret = 0;
> -	trace_i915_ring_wait_begin(ring);
> -	do {
> -		if (intel_ring_space(ringbuf) >= n)
> -			break;
> -		ringbuf->head = I915_READ_HEAD(ring);
> -		if (intel_ring_space(ringbuf) >= n)
> -			break;
> -
> -		msleep(1);
> -
> -		if (dev_priv->mm.interruptible && signal_pending(current)) {
> -			ret = -ERESTARTSYS;
> -			break;
> -		}
> -
> -		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> -					   dev_priv->mm.interruptible);
> -		if (ret)
> -			break;
> -
> -		if (time_after(jiffies, end)) {
> -			ret = -EBUSY;
> -			break;
> -		}
> -	} while (1);
> -	trace_i915_ring_wait_end(ring);
> -	return ret;
> -}
> -
>  static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
>  {
>  	uint32_t __iomem *virt;
> --
> 1.7.9.5
> 
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Re: [PATCH 56/59] drm/i915: Remove 'faked' request from LRC submission

[Daniel, Thomas]

> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of
> John.C.Harrison@Intel.com
> Sent: Thursday, March 19, 2015 12:31 PM
> To: Intel-GFX@Lists.FreeDesktop.Org
> Subject: [Intel-gfx] [PATCH 56/59] drm/i915: Remove 'faked' request from LRC
> submission
> 
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> The LRC submission code requires a request for tracking purposes. It does not
> actually require that request to 'complete' it simply uses it for keeping hold
> of reference counts on contexts and such like.
> 
> Previously, the fall back path of polling for space in the ring would start by
> submitting any outstanding work that was sat in the buffer. This submission was
> not done as part of the request that that work was owned by because that
> would
> lead to complications with the request being submitted twice. Instead, a null
> request structure was passed in to the submit call and a fake one was created.
> 
> That fall back path has long since been obsoleted and has now been removed.
> Thus
> there is never any need to fake up a request structure. This patch removes that
> code. A couple of sanity check warnings are added as well, just in case.
> 
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c |   22 +++++-----------------
>  1 file changed, 5 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f21f449..82190ad 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -507,23 +507,11 @@ static int execlists_context_queue(struct
> intel_engine_cs *ring,
>  	if (to != ring->default_context)
>  		intel_lr_context_pin(ring, to);
> 
> -	if (!request) {
> -		/*
> -		 * If there isn't a request associated with this submission,
> -		 * create one as a temporary holder.
> -		 */
> -		request = kzalloc(sizeof(*request), GFP_KERNEL);
> -		if (request == NULL)
> -			return -ENOMEM;
> -		request->ring = ring;
> -		request->ctx = to;
> -		kref_init(&request->ref);
> -		request->uniq = dev_priv->request_uniq++;
> -		i915_gem_context_reference(request->ctx);
> -	} else {
> -		i915_gem_request_reference(request);
> -		WARN_ON(to != request->ctx);
> -	}
> +	WARN_ON(!request);
> +	WARN_ON(to != request->ctx);
> +
> +	i915_gem_request_reference(request);
> +
>  	request->tail = tail;
> 
>  	intel_runtime_pm_get(dev_priv);
> --
> 1.7.9.5
I need this to fix a leak in a forthcoming patch I have.  Thanks!
Reviewed-by: Thomas Daniel <thomas.daniel@intel.com>

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Re: [PATCH 55/59] drm/i915: Remove fallback poll for ring buffer space

[Jani Nikula]

On Thu, 19 Mar 2015, "Daniel, Thomas" <thomas.daniel@intel.com> wrote:
>> -	if (&request->list == &ring->request_list)
>> +	/* It should always be possible to find a suitable request! */
>> +	if (&request->list == &ring->request_list) {
>> +		WARN_ON(true);
>>  		return -ENOSPC;
>> +	}
> Don’t we normally say
> 	if (WARN_ON(&request->list == &ring->request_list))
> 		return -ENOSPC;

Yes, particularly since we've amended WARN_ON within i915 to print out
the condition that failed. "true" is not very useful with that. ;)

BR,
Jani.

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Re: [PATCH 55/59] drm/i915: Remove fallback poll for ring buffer space

[John Harrison]

On 19/03/2015 15:16, Jani Nikula wrote:
> On Thu, 19 Mar 2015, "Daniel, Thomas" <thomas.daniel@intel.com> wrote:
>>> -	if (&request->list == &ring->request_list)
>>> +	/* It should always be possible to find a suitable request! */
>>> +	if (&request->list == &ring->request_list) {
>>> +		WARN_ON(true);
>>>   		return -ENOSPC;
>>> +	}
>> Don’t we normally say
>> 	if (WARN_ON(&request->list == &ring->request_list))
>> 		return -ENOSPC;
> Yes, particularly since we've amended WARN_ON within i915 to print out
> the condition that failed. "true" is not very useful with that. ;)
>
> BR,
> Jani.
>
The issue I have with 'if(WARN_ON(x))' is that it looks like something 
that would disappear in a non debugging build. Whereas, this is a check 
that wants to exist regardless of build options.
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Re: [PATCH 55/59] drm/i915: Remove fallback poll for ring buffer space

[Daniel Vetter]

On Thu, Mar 19, 2015 at 04:33:12PM +0000, John Harrison wrote:
> On 19/03/2015 15:16, Jani Nikula wrote:
> >On Thu, 19 Mar 2015, "Daniel, Thomas" <thomas.daniel@intel.com> wrote:
> >>>-	if (&request->list == &ring->request_list)
> >>>+	/* It should always be possible to find a suitable request! */
> >>>+	if (&request->list == &ring->request_list) {
> >>>+		WARN_ON(true);
> >>>  		return -ENOSPC;
> >>>+	}
> >>Don’t we normally say
> >>	if (WARN_ON(&request->list == &ring->request_list))
> >>		return -ENOSPC;
> >Yes, particularly since we've amended WARN_ON within i915 to print out
> >the condition that failed. "true" is not very useful with that. ;)
> >
> >BR,
> >Jani.
> >
> The issue I have with 'if(WARN_ON(x))' is that it looks like something that
> would disappear in a non debugging build. Whereas, this is a check that
> wants to exist regardless of build options.

Yeah kernel isn't like that, WARN_ON is always executed. We rely on that
all over the place actually by sometimes wrapping full function-calls with
side-effects with a WARN_ON for cases we don't expect anything to ever
fail.
-Daniel
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Re: [PATCH 05/59] drm/i915: Reserve ring buffer space for i915_add_request() commands

[Daniel Vetter]

On Thu, Mar 19, 2015 at 12:30:10PM +0000, John.C.Harrison@Intel.com wrote:
> +void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size)

Just a bit of interface bikeshed - I'd drop the size parameter here. It
just duplicates what we tell the ring in the reservation code and the real
check happens in the _end function.

> +{
> +	WARN_ON(size > ringbuf->reserved_size);
> +	WARN_ON(ringbuf->reserved_in_use);
> +
> +	ringbuf->reserved_in_use = true;
> +	ringbuf->reserved_tail   = ringbuf->tail;
> +}
> +
> +void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
> +{
> +	WARN_ON(!ringbuf->reserved_in_use);
> +	WARN_ON(ringbuf->tail > ringbuf->reserved_tail + ringbuf->reserved_size);

Don't we need to handle wrap-around to make sure we do correctly check for
sufficient reservation?
-Daniel
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Re: [PATCH 51/59] drm/i915: Add *_ring_begin() to request allocation

[Daniel Vetter]

On Thu, Mar 19, 2015 at 12:30:56PM +0000, John.C.Harrison@Intel.com wrote:
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 6f198df..c7dcabd 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2205,21 +2205,27 @@ int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
>  	return 0;
>  }
>  
> -int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
> +int legacy_ring_reserved_space_reserve(struct drm_i915_gem_request *request)
>  {
> -	/* NB: Until request management is fully tidied up and the OLR is
> -	 * removed, there are too many ways for get false hits on this
> -	 * anti-recursion check! */
> -	/*WARN_ON(ringbuf->reserved_size);*/
> +	/*
> +	 * The first call merely notes the reserve request and is common for
> +	 * all back ends. The subsequent localised _begin() call actually
> +	 * ensures that the reservation is available. Without the begin, if
> +	 * the request creator immediately submitted the request without
> +	 * adding any commands to it then there might not actually be
> +	 * sufficient room for the submission commands.
> +	 */
> +	intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
> +
> +	return intel_ring_begin(request, 0);

This feels a bit convoluted tbh, and would fall aparat if we start adding
sanity checks to _begin/advance functions. Can't we instead directly call
ring_wait_for_space? This forgoes the intel_wrap_ring_buffer call, but
otoh we just need to factor that into our estimates. Wrapping the ring for
the entire reservartion right away is
a) way too much - we only wrap individual ring_being calls anyway
b) not doing any good since all the intermediate intel_ring_emit calls
might very-well push us into a wrap anyway.

In the end we just need to increase our reservation with the biggest
intel_ring_begin we have in the add_request code - that's the worst-case
of ring space we might waste due to wrapping.

Same for the lrc path ofc.
-Daniel
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Re: [PATCH 51/59] drm/i915: Add *_ring_begin() to request allocation

[Chris Wilson]

On Fri, Mar 20, 2015 at 04:23:45PM +0100, Daniel Vetter wrote:
> On Thu, Mar 19, 2015 at 12:30:56PM +0000, John.C.Harrison@Intel.com wrote:
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 6f198df..c7dcabd 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -2205,21 +2205,27 @@ int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
> >  	return 0;
> >  }
> >  
> > -int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
> > +int legacy_ring_reserved_space_reserve(struct drm_i915_gem_request *request)
> >  {
> > -	/* NB: Until request management is fully tidied up and the OLR is
> > -	 * removed, there are too many ways for get false hits on this
> > -	 * anti-recursion check! */
> > -	/*WARN_ON(ringbuf->reserved_size);*/
> > +	/*
> > +	 * The first call merely notes the reserve request and is common for
> > +	 * all back ends. The subsequent localised _begin() call actually
> > +	 * ensures that the reservation is available. Without the begin, if
> > +	 * the request creator immediately submitted the request without
> > +	 * adding any commands to it then there might not actually be
> > +	 * sufficient room for the submission commands.
> > +	 */
> > +	intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
> > +
> > +	return intel_ring_begin(request, 0);
> 
> This feels a bit convoluted tbh, and would fall aparat if we start adding
> sanity checks to _begin/advance functions. Can't we instead directly call
> ring_wait_for_space? This forgoes the intel_wrap_ring_buffer call, but
> otoh we just need to factor that into our estimates. Wrapping the ring for
> the entire reservartion right away is
> a) way too much - we only wrap individual ring_being calls anyway
> b) not doing any good since all the intermediate intel_ring_emit calls
> might very-well push us into a wrap anyway.
> 
> In the end we just need to increase our reservation with the biggest
> intel_ring_begin we have in the add_request code - that's the worst-case
> of ring space we might waste due to wrapping.

Sorry to tune in here but what? What happened to the transactional
request model?
-Chris

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Re: [PATCH 05/59] drm/i915: Reserve ring buffer space for i915_add_request() commands

[John Harrison]

On 20/03/2015 15:13, Daniel Vetter wrote:
> On Thu, Mar 19, 2015 at 12:30:10PM +0000, John.C.Harrison@Intel.com wrote:
>> +void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size)
> Just a bit of interface bikeshed - I'd drop the size parameter here. It
> just duplicates what we tell the ring in the reservation code and the real
> check happens in the _end function.
>
>> +{
>> +	WARN_ON(size > ringbuf->reserved_size);
>> +	WARN_ON(ringbuf->reserved_in_use);
>> +
>> +	ringbuf->reserved_in_use = true;
>> +	ringbuf->reserved_tail   = ringbuf->tail;
>> +}
>> +
>> +void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
>> +{
>> +	WARN_ON(!ringbuf->reserved_in_use);
>> +	WARN_ON(ringbuf->tail > ringbuf->reserved_tail + ringbuf->reserved_size);
> Don't we need to handle wrap-around to make sure we do correctly check for
> sufficient reservation?
> -Daniel

There is nothing special to worry about for wrapping. The regular 
intel_ring_begin() code will handle all that as before. The whole point 
of the reserved scheme is that it is basically the same as calling 
intel_ring_begin() with 'size + RESERVED_SIZE' everywhere. So when 
i915_add_request() starts, it is guaranteed that an 
'intel_ring_begin(RESERVED_SIZE)' has been done already including any 
necessary buffer wrapping. Thus it does not actually need to call 
'i_r_begin()' at all, really - it is guaranteed to succeed (as long as 
it stays within RESERVED_SIZE total usage).

John.

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Re: [PATCH 51/59] drm/i915: Add *_ring_begin() to request allocation

[John Harrison]

On 20/03/2015 15:30, Chris Wilson wrote:
> On Fri, Mar 20, 2015 at 04:23:45PM +0100, Daniel Vetter wrote:
>> On Thu, Mar 19, 2015 at 12:30:56PM +0000, John.C.Harrison@Intel.com wrote:
>>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> index 6f198df..c7dcabd 100644
>>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> @@ -2205,21 +2205,27 @@ int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
>>>   	return 0;
>>>   }
>>>   
>>> -int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
>>> +int legacy_ring_reserved_space_reserve(struct drm_i915_gem_request *request)
>>>   {
>>> -	/* NB: Until request management is fully tidied up and the OLR is
>>> -	 * removed, there are too many ways for get false hits on this
>>> -	 * anti-recursion check! */
>>> -	/*WARN_ON(ringbuf->reserved_size);*/
>>> +	/*
>>> +	 * The first call merely notes the reserve request and is common for
>>> +	 * all back ends. The subsequent localised _begin() call actually
>>> +	 * ensures that the reservation is available. Without the begin, if
>>> +	 * the request creator immediately submitted the request without
>>> +	 * adding any commands to it then there might not actually be
>>> +	 * sufficient room for the submission commands.
>>> +	 */
>>> +	intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
>>> +
>>> +	return intel_ring_begin(request, 0);
>> This feels a bit convoluted tbh, and would fall aparat if we start adding
>> sanity checks to _begin/advance functions. Can't we instead directly call
>> ring_wait_for_space? This forgoes the intel_wrap_ring_buffer call, but
>> otoh we just need to factor that into our estimates. Wrapping the ring for
>> the entire reservartion right away is
>> a) way too much - we only wrap individual ring_being calls anyway
>> b) not doing any good since all the intermediate intel_ring_emit calls
>> might very-well push us into a wrap anyway.
>>
>> In the end we just need to increase our reservation with the biggest
>> intel_ring_begin we have in the add_request code - that's the worst-case
>> of ring space we might waste due to wrapping.
I don't see why sanity checks in begin/advance would be a problem. This 
_begin() call is only required in the situation where no-one actually 
adds any commands to the ring before calling i915_add_request() and then 
is only necessary because i915_add_request() is not allowed to call 
_begin() any more because it is not allowed to fail. There is no magic 
going on behind the scenes. It is exactly the same as calling 
'_begin(RESERVED_SIZE)'. All subsequent code must still do it's own 
_begin() call before adding commands to the ring. Any sanity checks 
would ignore the reserved size and complain if a _begin() is too small 
for the commands actually written. It should all just work :). Plus it 
is nice and simple and easy to maintain.

Also, I don't see why it is better to do the wrap as late as possible. 
If a wrap is going to be required at some point then it doesn't really 
matter when it is done - early or late, the (small) hit still has to be 
taken. Given that the buffer size is orders of magnitude larger than the 
size of an individual request, there is no possibility of ever having to 
wrap twice. So I would say that keeping the code nice and simple 
outweighs any advantage to wrapping a few calls later.

> Sorry to tune in here but what? What happened to the transactional
> request model?
> -Chris
Er, what transactional request model?

There were comments a while ago about a scheme of not updating the 
hardware until the add_request() call such that the entire request could 
be discarded by simply resetting the ring pointers to how they were at 
the point of the alloc_request() call. I don't know if anything ever 
came out of that discussion though. I certainly didn't see it as a 'we 
must implement this before we do anything else'. And I'm just trying to 
do the simplest/quickest route to getting the GPU scheduler upstreamed!

John.

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Re: [PATCH 05/59] drm/i915: Reserve ring buffer space for i915_add_request() commands

[John Harrison]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> +void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
> +{
> +    WARN_ON(!ringbuf->reserved_in_use);
> +    WARN_ON(ringbuf->tail > ringbuf->reserved_tail + 
> ringbuf->reserved_size);
> +
> +    ringbuf->reserved_size   = 0;
> +    ringbuf->reserved_in_use = false;
> +}
> +

So apparently, my reserved size choice was too small for ironlake and 
the above assert is firing. Is there any kind of WARN_ON with printf 
facility in the kernel? It would be useful to have the offending sizes 
included in the message log without having to patch and re-run the 
tests. Or is the official solution to just use DRM_ERROR(...) instead of 
WARN_ON? I guess the stack trace isn't necessary as we know where the 
error is coming from already. But do DRM_ERROR() prints always appear or 
are they conditional on the user enabling them? And would anyone notice 
one anyway? At least with WARN_ONs, people do tend to complain.

Thanks,
John.
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Re: [PATCH 05/59] drm/i915: Reserve ring buffer space for i915_add_request() commands

[John Harrison]

On 20/03/2015 16:19, John Harrison wrote:
> On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
>> +void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
>> +{
>> +    WARN_ON(!ringbuf->reserved_in_use);
>> +    WARN_ON(ringbuf->tail > ringbuf->reserved_tail + 
>> ringbuf->reserved_size);
>> +
>> +    ringbuf->reserved_size   = 0;
>> +    ringbuf->reserved_in_use = false;
>> +}
>> +
>
> So apparently, my reserved size choice was too small for ironlake and 
> the above assert is firing. Is there any kind of WARN_ON with printf 
> facility in the kernel? It would be useful to have the offending sizes 
> included in the message log without having to patch and re-run the 
> tests. Or is the official solution to just use DRM_ERROR(...) instead 
> of WARN_ON? I guess the stack trace isn't necessary as we know where 
> the error is coming from already. But do DRM_ERROR() prints always 
> appear or are they conditional on the user enabling them? And would 
> anyone notice one anyway? At least with WARN_ONs, people do tend to 
> complain.

It was pointed out that I was being dumb. I shall update the WARN_ON() 
to be an ordinary WARN() instead and include the sizes in the message 
format. Unless there is a particular reason to use DRM_ERROR instead of 
WARN?


>
> Thanks,
> John.

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Re: [PATCH 05/59] drm/i915: Reserve ring buffer space for i915_add_request() commands

[Daniel Vetter]

On Fri, Mar 20, 2015 at 03:55:59PM +0000, John Harrison wrote:
> On 20/03/2015 15:13, Daniel Vetter wrote:
> >On Thu, Mar 19, 2015 at 12:30:10PM +0000, John.C.Harrison@Intel.com wrote:
> >>+void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size)
> >Just a bit of interface bikeshed - I'd drop the size parameter here. It
> >just duplicates what we tell the ring in the reservation code and the real
> >check happens in the _end function.
> >
> >>+{
> >>+	WARN_ON(size > ringbuf->reserved_size);
> >>+	WARN_ON(ringbuf->reserved_in_use);
> >>+
> >>+	ringbuf->reserved_in_use = true;
> >>+	ringbuf->reserved_tail   = ringbuf->tail;
> >>+}
> >>+
> >>+void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
> >>+{
> >>+	WARN_ON(!ringbuf->reserved_in_use);
> >>+	WARN_ON(ringbuf->tail > ringbuf->reserved_tail + ringbuf->reserved_size);
> >Don't we need to handle wrap-around to make sure we do correctly check for
> >sufficient reservation?
> >-Daniel
> 
> There is nothing special to worry about for wrapping. The regular
> intel_ring_begin() code will handle all that as before. The whole point of
> the reserved scheme is that it is basically the same as calling
> intel_ring_begin() with 'size + RESERVED_SIZE' everywhere. So when
> i915_add_request() starts, it is guaranteed that an
> 'intel_ring_begin(RESERVED_SIZE)' has been done already including any
> necessary buffer wrapping. Thus it does not actually need to call
> 'i_r_begin()' at all, really - it is guaranteed to succeed (as long as it
> stays within RESERVED_SIZE total usage).

I think there's a misunderstanding. Let me try to explain again.

ringbuf->tail gets wrapped around, but the expression
"ringbuf->reserved->tail + ringbuf->reserved_size" doesn't. And the
comparison ">" also doesn't handle wrap around.

All taken together there won't be a spurios WARN, buf if you wrap ->tail
and haven't reserved enough space your check wont catch this. The only
thing you need is reserved_size+reserved_tail > RINGBUF_SIZE and your WARN
won't fire, not even if we wrap the ring a few times.

This is even more important since the wrapping itself increases space
requirements a bit, and so we want to be especially careful with checking
that we reserved enough there.

Or do I miss something?
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH 51/59] drm/i915: Add *_ring_begin() to request allocation

[Daniel Vetter]

On Fri, Mar 20, 2015 at 04:09:55PM +0000, John Harrison wrote:
> On 20/03/2015 15:30, Chris Wilson wrote:
> >On Fri, Mar 20, 2015 at 04:23:45PM +0100, Daniel Vetter wrote:
> >>On Thu, Mar 19, 2015 at 12:30:56PM +0000, John.C.Harrison@Intel.com wrote:
> >>>diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >>>index 6f198df..c7dcabd 100644
> >>>--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> >>>+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >>>@@ -2205,21 +2205,27 @@ int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
> >>>  	return 0;
> >>>  }
> >>>-int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
> >>>+int legacy_ring_reserved_space_reserve(struct drm_i915_gem_request *request)
> >>>  {
> >>>-	/* NB: Until request management is fully tidied up and the OLR is
> >>>-	 * removed, there are too many ways for get false hits on this
> >>>-	 * anti-recursion check! */
> >>>-	/*WARN_ON(ringbuf->reserved_size);*/
> >>>+	/*
> >>>+	 * The first call merely notes the reserve request and is common for
> >>>+	 * all back ends. The subsequent localised _begin() call actually
> >>>+	 * ensures that the reservation is available. Without the begin, if
> >>>+	 * the request creator immediately submitted the request without
> >>>+	 * adding any commands to it then there might not actually be
> >>>+	 * sufficient room for the submission commands.
> >>>+	 */
> >>>+	intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
> >>>+
> >>>+	return intel_ring_begin(request, 0);
> >>This feels a bit convoluted tbh, and would fall aparat if we start adding
> >>sanity checks to _begin/advance functions. Can't we instead directly call
> >>ring_wait_for_space? This forgoes the intel_wrap_ring_buffer call, but
> >>otoh we just need to factor that into our estimates. Wrapping the ring for
> >>the entire reservartion right away is
> >>a) way too much - we only wrap individual ring_being calls anyway
> >>b) not doing any good since all the intermediate intel_ring_emit calls
> >>might very-well push us into a wrap anyway.
> >>
> >>In the end we just need to increase our reservation with the biggest
> >>intel_ring_begin we have in the add_request code - that's the worst-case
> >>of ring space we might waste due to wrapping.
>
> I don't see why sanity checks in begin/advance would be a problem. This
> _begin() call is only required in the situation where no-one actually adds
> any commands to the ring before calling i915_add_request() and then is only
> necessary because i915_add_request() is not allowed to call _begin() any
> more because it is not allowed to fail. There is no magic going on behind
> the scenes. It is exactly the same as calling '_begin(RESERVED_SIZE)'. All
> subsequent code must still do it's own _begin() call before adding commands
> to the ring. Any sanity checks would ignore the reserved size and complain
> if a _begin() is too small for the commands actually written. It should all
> just work :). Plus it is nice and simple and easy to maintain.
> 
> Also, I don't see why it is better to do the wrap as late as possible. If a
> wrap is going to be required at some point then it doesn't really matter
> when it is done - early or late, the (small) hit still has to be taken.
> Given that the buffer size is orders of magnitude larger than the size of an
> individual request, there is no possibility of ever having to wrap twice. So
> I would say that keeping the code nice and simple outweighs any advantage to
> wrapping a few calls later.

Ok two examples:

1. We have 100 bytes add request tail that we reserve, but only 80 bytes
left before wrapping. Your reservation code will wrap.

Let's also assume we have 160 bytes of execbuf stuff in 20bytes block. If
we would not have wrapped right away we'd save those 80 bytes of wrapping.
Eager wrapping just wasted space.

2. Again 100 bytes of reservation, 160 bytes of execbuf. But this time
around assume we have 200 bytes left before wrap. Your reservation
doesn't wrap since there's still 100 bytes left. But after the execbuf
there's only 40 bytes left, requiring a wrap. Eager wrapping didn't help
at all for correct reservation. Which means we _have_ to include the
worst-case loss for wrapping into our reservation, and more important the
reservation check _must_ handle wrapping correctly. Since that's the case
where things will fall appart if the reservation is just a bit too small.

Hence my recommendation to only reserve the space and not bother with
wrapping (it's a net loss) and also make sure we catch any kind of
overflow due to wrapping.

We could instead try to keep wrapping into account for the reserved space,
but I think that's more fragile. It's also more wasteful since generally
we don't need a 100 byte contiguous block but just a few dwords for each
individual command. So effective wrapping overhead is a lot less than
100-4.

Finally imo shrugging the double-wrap off isn't a good idea since emitting
a lot of crap by accident is a very likely bug. And with the guc
scheduling mode I've heard that the rings will be just 4k ...
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH 01/59] drm/i915: Rename 'do_execbuf' to 'execbuf_submit'

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The submission portion of the execbuffer code path was abstracted into a
> function pointer indirection as part of the legacy vs execlist work. The two
> implementation functions are called 'i915_gem_ringbuffer_submission' and
> 'intel_execlists_submission' but the pointer was called 'do_execbuf'. There is
> already a 'i915_gem_do_execbuffer' function (which is what calls the pointer
> indirection). The name of the pointer is therefore considered to be backwards
> and should be changed.
>
> This patch renames it to 'execbuf_submit' which is hopefully a bit clearer.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |   14 +++++++-------
>   drivers/gpu/drm/i915/i915_gem.c            |    4 ++--
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    6 +++---
>   3 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index eb38cd1..1a23445 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1812,13 +1812,13 @@ struct drm_i915_private {
>
>   	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
>   	struct {
> -		int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
> -				  struct intel_engine_cs *ring,
> -				  struct intel_context *ctx,
> -				  struct drm_i915_gem_execbuffer2 *args,
> -				  struct list_head *vmas,
> -				  struct drm_i915_gem_object *batch_obj,
> -				  u64 exec_start, u32 flags);
> +		int (*execbuf_submit)(struct drm_device *dev, struct drm_file *file,
> +				      struct intel_engine_cs *ring,
> +				      struct intel_context *ctx,
> +				      struct drm_i915_gem_execbuffer2 *args,
> +				      struct list_head *vmas,
> +				      struct drm_i915_gem_object *batch_obj,
> +				      u64 exec_start, u32 flags);
>   		int (*init_rings)(struct drm_device *dev);
>   		void (*cleanup_ring)(struct intel_engine_cs *ring);
>   		void (*stop_ring)(struct intel_engine_cs *ring);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 092f25c..51cdfb7 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4837,12 +4837,12 @@ int i915_gem_init(struct drm_device *dev)
>   	}
>
>   	if (!i915.enable_execlists) {
> -		dev_priv->gt.do_execbuf = i915_gem_ringbuffer_submission;
> +		dev_priv->gt.execbuf_submit = i915_gem_ringbuffer_submission;
>   		dev_priv->gt.init_rings = i915_gem_init_rings;
>   		dev_priv->gt.cleanup_ring = intel_cleanup_ring_buffer;
>   		dev_priv->gt.stop_ring = intel_stop_ring_buffer;
>   	} else {
> -		dev_priv->gt.do_execbuf = intel_execlists_submission;
> +		dev_priv->gt.execbuf_submit = intel_execlists_submission;
>   		dev_priv->gt.init_rings = intel_logical_rings_init;
>   		dev_priv->gt.cleanup_ring = intel_logical_ring_cleanup;
>   		dev_priv->gt.stop_ring = intel_logical_ring_stop;
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 9838d11..38e2178 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1594,9 +1594,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	} else
>   		exec_start += i915_gem_obj_offset(batch_obj, vm);
>
> -	ret = dev_priv->gt.do_execbuf(dev, file, ring, ctx, args,
> -				      &eb->vmas, batch_obj, exec_start,
> -				      dispatch_flags);
> +	ret = dev_priv->gt.execbuf_submit(dev, file, ring, ctx, args,
> +					  &eb->vmas, batch_obj, exec_start,
> +					  dispatch_flags);
>
>   	/*
>   	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 02/59] drm/i915: Make intel_logical_ring_begin() static

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The only usage of intel_logical_ring_begin() is within intel_lrc.c so it can be
> made static. To avoid a forward declaration at the top of the file, it and bunch
> of other functions have been shuffled upwards.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c |  474 +++++++++++++++++++-------------------
>   drivers/gpu/drm/i915/intel_lrc.h |    3 -
>   2 files changed, 237 insertions(+), 240 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index fcb074b..cad4300 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -611,6 +611,243 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>   	return logical_ring_invalidate_all_caches(ringbuf, ctx);
>   }
>
> +static int logical_ring_alloc_request(struct intel_engine_cs *ring,
> +				      struct intel_context *ctx)
> +{
> +	struct drm_i915_gem_request *request;
> +	struct drm_i915_private *dev_private = ring->dev->dev_private;
> +	int ret;
> +
> +	if (ring->outstanding_lazy_request)
> +		return 0;
> +
> +	request = kzalloc(sizeof(*request), GFP_KERNEL);
> +	if (request == NULL)
> +		return -ENOMEM;
> +
> +	if (ctx != ring->default_context) {
> +		ret = intel_lr_context_pin(ring, ctx);
> +		if (ret) {
> +			kfree(request);
> +			return ret;
> +		}
> +	}
> +
> +	kref_init(&request->ref);
> +	request->ring = ring;
> +	request->uniq = dev_private->request_uniq++;
> +
> +	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
> +	if (ret) {
> +		intel_lr_context_unpin(ring, ctx);
> +		kfree(request);
> +		return ret;
> +	}
> +
> +	request->ctx = ctx;
> +	i915_gem_context_reference(request->ctx);
> +	request->ringbuf = ctx->engine[ring->id].ringbuf;
> +
> +	ring->outstanding_lazy_request = request;
> +	return 0;
> +}
> +
> +static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> +				     int bytes)
> +{
> +	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct drm_i915_gem_request *request;
> +	int ret;
> +
> +	if (intel_ring_space(ringbuf) >= bytes)
> +		return 0;
> +
> +	list_for_each_entry(request, &ring->request_list, list) {
> +		/*
> +		 * The request queue is per-engine, so can contain requests
> +		 * from multiple ringbuffers. Here, we must ignore any that
> +		 * aren't from the ringbuffer we're considering.
> +		 */
> +		struct intel_context *ctx = request->ctx;
> +		if (ctx->engine[ring->id].ringbuf != ringbuf)
> +			continue;
> +
> +		/* Would completion of this request free enough space? */
> +		if (__intel_ring_space(request->tail, ringbuf->tail,
> +				       ringbuf->size) >= bytes) {
> +			break;
> +		}
> +	}
> +
> +	if (&request->list == &ring->request_list)
> +		return -ENOSPC;
> +
> +	ret = i915_wait_request(request);
> +	if (ret)
> +		return ret;
> +
> +	i915_gem_retire_requests_ring(ring);
> +
> +	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
> +}
> +
> +/*
> + * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
> + * @ringbuf: Logical Ringbuffer to advance.
> + *
> + * The tail is updated in our logical ringbuffer struct, not in the actual context. What
> + * really happens during submission is that the context and current tail will be placed
> + * on a queue waiting for the ELSP to be ready to accept a new context submission. At that
> + * point, the tail *inside* the context is updated and the ELSP written to.
> + */
> +static void
> +intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
> +				      struct intel_context *ctx,
> +				      struct drm_i915_gem_request *request)
> +{
> +	struct intel_engine_cs *ring = ringbuf->ring;
> +
> +	intel_logical_ring_advance(ringbuf);
> +
> +	if (intel_ring_stopped(ring))
> +		return;
> +
> +	execlists_context_queue(ring, ctx, ringbuf->tail, request);
> +}
> +
> +static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> +				       struct intel_context *ctx,
> +				       int bytes)
> +{
> +	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct drm_device *dev = ring->dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	unsigned long end;
> +	int ret;
> +
> +	ret = logical_ring_wait_request(ringbuf, bytes);
> +	if (ret != -ENOSPC)
> +		return ret;
> +
> +	/* Force the context submission in case we have been skipping it */
> +	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
> +
> +	/* With GEM the hangcheck timer should kick us out of the loop,
> +	 * leaving it early runs the risk of corrupting GEM state (due
> +	 * to running on almost untested codepaths). But on resume
> +	 * timers don't work yet, so prevent a complete hang in that
> +	 * case by choosing an insanely large timeout. */
> +	end = jiffies + 60 * HZ;
> +
> +	ret = 0;
> +	do {
> +		if (intel_ring_space(ringbuf) >= bytes)
> +			break;
> +
> +		msleep(1);
> +
> +		if (dev_priv->mm.interruptible && signal_pending(current)) {
> +			ret = -ERESTARTSYS;
> +			break;
> +		}
> +
> +		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> +					   dev_priv->mm.interruptible);
> +		if (ret)
> +			break;
> +
> +		if (time_after(jiffies, end)) {
> +			ret = -EBUSY;
> +			break;
> +		}
> +	} while (1);
> +
> +	return ret;
> +}
> +
> +static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
> +				    struct intel_context *ctx)
> +{
> +	uint32_t __iomem *virt;
> +	int rem = ringbuf->size - ringbuf->tail;
> +
> +	if (ringbuf->space < rem) {
> +		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
> +
> +		if (ret)
> +			return ret;
> +	}
> +
> +	virt = ringbuf->virtual_start + ringbuf->tail;
> +	rem /= 4;
> +	while (rem--)
> +		iowrite32(MI_NOOP, virt++);
> +
> +	ringbuf->tail = 0;
> +	intel_ring_update_space(ringbuf);
> +
> +	return 0;
> +}
> +
> +static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
> +				struct intel_context *ctx, int bytes)
> +{
> +	int ret;
> +
> +	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
> +		ret = logical_ring_wrap_buffer(ringbuf, ctx);
> +		if (unlikely(ret))
> +			return ret;
> +	}
> +
> +	if (unlikely(ringbuf->space < bytes)) {
> +		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
> +		if (unlikely(ret))
> +			return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +/**
> + * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
> + *
> + * @ringbuf: Logical ringbuffer.
> + * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
> + *
> + * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
> + * be wrapped, or wait a bit for the tail to be updated). This function takes care of that
> + * and also preallocates a request (every workload submission is still mediated through
> + * requests, same as it did with legacy ringbuffer submission).
> + *
> + * Return: non-zero if the ringbuffer is not ready to be written to.
> + */
> +static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
> +				    struct intel_context *ctx, int num_dwords)
> +{
> +	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct drm_device *dev = ring->dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	int ret;
> +
> +	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> +				   dev_priv->mm.interruptible);
> +	if (ret)
> +		return ret;
> +
> +	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
> +	if (ret)
> +		return ret;
> +
> +	/* Preallocate the olr before touching the ring */
> +	ret = logical_ring_alloc_request(ring, ctx);
> +	if (ret)
> +		return ret;
> +
> +	ringbuf->space -= num_dwords * sizeof(uint32_t);
> +	return 0;
> +}
> +
>   /**
>    * execlists_submission() - submit a batchbuffer for execution, Execlists style
>    * @dev: DRM device.
> @@ -787,30 +1024,6 @@ int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
>   	return 0;
>   }
>
> -/*
> - * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
> - * @ringbuf: Logical Ringbuffer to advance.
> - *
> - * The tail is updated in our logical ringbuffer struct, not in the actual context. What
> - * really happens during submission is that the context and current tail will be placed
> - * on a queue waiting for the ELSP to be ready to accept a new context submission. At that
> - * point, the tail *inside* the context is updated and the ELSP written to.
> - */
> -static void
> -intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
> -				      struct intel_context *ctx,
> -				      struct drm_i915_gem_request *request)
> -{
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -
> -	intel_logical_ring_advance(ringbuf);
> -
> -	if (intel_ring_stopped(ring))
> -		return;
> -
> -	execlists_context_queue(ring, ctx, ringbuf->tail, request);
> -}
> -
>   static int intel_lr_context_pin(struct intel_engine_cs *ring,
>   		struct intel_context *ctx)
>   {
> @@ -855,219 +1068,6 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
>   	}
>   }
>
> -static int logical_ring_alloc_request(struct intel_engine_cs *ring,
> -				      struct intel_context *ctx)
> -{
> -	struct drm_i915_gem_request *request;
> -	struct drm_i915_private *dev_private = ring->dev->dev_private;
> -	int ret;
> -
> -	if (ring->outstanding_lazy_request)
> -		return 0;
> -
> -	request = kzalloc(sizeof(*request), GFP_KERNEL);
> -	if (request == NULL)
> -		return -ENOMEM;
> -
> -	if (ctx != ring->default_context) {
> -		ret = intel_lr_context_pin(ring, ctx);
> -		if (ret) {
> -			kfree(request);
> -			return ret;
> -		}
> -	}
> -
> -	kref_init(&request->ref);
> -	request->ring = ring;
> -	request->uniq = dev_private->request_uniq++;
> -
> -	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
> -	if (ret) {
> -		intel_lr_context_unpin(ring, ctx);
> -		kfree(request);
> -		return ret;
> -	}
> -
> -	request->ctx = ctx;
> -	i915_gem_context_reference(request->ctx);
> -	request->ringbuf = ctx->engine[ring->id].ringbuf;
> -
> -	ring->outstanding_lazy_request = request;
> -	return 0;
> -}
> -
> -static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> -				     int bytes)
> -{
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_i915_gem_request *request;
> -	int ret;
> -
> -	if (intel_ring_space(ringbuf) >= bytes)
> -		return 0;
> -
> -	list_for_each_entry(request, &ring->request_list, list) {
> -		/*
> -		 * The request queue is per-engine, so can contain requests
> -		 * from multiple ringbuffers. Here, we must ignore any that
> -		 * aren't from the ringbuffer we're considering.
> -		 */
> -		struct intel_context *ctx = request->ctx;
> -		if (ctx->engine[ring->id].ringbuf != ringbuf)
> -			continue;
> -
> -		/* Would completion of this request free enough space? */
> -		if (__intel_ring_space(request->tail, ringbuf->tail,
> -				       ringbuf->size) >= bytes) {
> -			break;
> -		}
> -	}
> -
> -	if (&request->list == &ring->request_list)
> -		return -ENOSPC;
> -
> -	ret = i915_wait_request(request);
> -	if (ret)
> -		return ret;
> -
> -	i915_gem_retire_requests_ring(ring);
> -
> -	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
> -}
> -
> -static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> -				       struct intel_context *ctx,
> -				       int bytes)
> -{
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_device *dev = ring->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	unsigned long end;
> -	int ret;
> -
> -	ret = logical_ring_wait_request(ringbuf, bytes);
> -	if (ret != -ENOSPC)
> -		return ret;
> -
> -	/* Force the context submission in case we have been skipping it */
> -	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
> -
> -	/* With GEM the hangcheck timer should kick us out of the loop,
> -	 * leaving it early runs the risk of corrupting GEM state (due
> -	 * to running on almost untested codepaths). But on resume
> -	 * timers don't work yet, so prevent a complete hang in that
> -	 * case by choosing an insanely large timeout. */
> -	end = jiffies + 60 * HZ;
> -
> -	ret = 0;
> -	do {
> -		if (intel_ring_space(ringbuf) >= bytes)
> -			break;
> -
> -		msleep(1);
> -
> -		if (dev_priv->mm.interruptible && signal_pending(current)) {
> -			ret = -ERESTARTSYS;
> -			break;
> -		}
> -
> -		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> -					   dev_priv->mm.interruptible);
> -		if (ret)
> -			break;
> -
> -		if (time_after(jiffies, end)) {
> -			ret = -EBUSY;
> -			break;
> -		}
> -	} while (1);
> -
> -	return ret;
> -}
> -
> -static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
> -				    struct intel_context *ctx)
> -{
> -	uint32_t __iomem *virt;
> -	int rem = ringbuf->size - ringbuf->tail;
> -
> -	if (ringbuf->space < rem) {
> -		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
> -
> -		if (ret)
> -			return ret;
> -	}
> -
> -	virt = ringbuf->virtual_start + ringbuf->tail;
> -	rem /= 4;
> -	while (rem--)
> -		iowrite32(MI_NOOP, virt++);
> -
> -	ringbuf->tail = 0;
> -	intel_ring_update_space(ringbuf);
> -
> -	return 0;
> -}
> -
> -static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
> -				struct intel_context *ctx, int bytes)
> -{
> -	int ret;
> -
> -	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
> -		ret = logical_ring_wrap_buffer(ringbuf, ctx);
> -		if (unlikely(ret))
> -			return ret;
> -	}
> -
> -	if (unlikely(ringbuf->space < bytes)) {
> -		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
> -		if (unlikely(ret))
> -			return ret;
> -	}
> -
> -	return 0;
> -}
> -
> -/**
> - * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
> - *
> - * @ringbuf: Logical ringbuffer.
> - * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
> - *
> - * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
> - * be wrapped, or wait a bit for the tail to be updated). This function takes care of that
> - * and also preallocates a request (every workload submission is still mediated through
> - * requests, same as it did with legacy ringbuffer submission).
> - *
> - * Return: non-zero if the ringbuffer is not ready to be written to.
> - */
> -int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
> -			     struct intel_context *ctx, int num_dwords)
> -{
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_device *dev = ring->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	int ret;
> -
> -	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> -				   dev_priv->mm.interruptible);
> -	if (ret)
> -		return ret;
> -
> -	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
> -	if (ret)
> -		return ret;
> -
> -	/* Preallocate the olr before touching the ring */
> -	ret = logical_ring_alloc_request(ring, ctx);
> -	if (ret)
> -		return ret;
> -
> -	ringbuf->space -= num_dwords * sizeof(uint32_t);
> -	return 0;
> -}
> -
>   static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
>   					       struct intel_context *ctx)
>   {
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index adb731e4..ac8f81a 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -63,9 +63,6 @@ static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
>   	iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
>   	ringbuf->tail += 4;
>   }
> -int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
> -			     struct intel_context *ctx,
> -			     int num_dwords);
>
>   /* Logical Ring Contexts */
>   void intel_lr_context_free(struct intel_context *ctx);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 03/59] drm/i915: Move common request allocation code into a common function

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The request allocation code is largely duplicated between legacy mode and
> execlist mode. The actual difference between the two versions of the code is
> pretty minimal.
>
> This patch moves the common code out into a separate function. This is then
> called by the execution specific version prior to setting up the one different
> value.
>
> For: VIZ-5190
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    2 ++
>   drivers/gpu/drm/i915/i915_gem.c         |   37 +++++++++++++++++++++++++++++
>   drivers/gpu/drm/i915/intel_lrc.c        |   39 +++++++------------------------
>   drivers/gpu/drm/i915/intel_lrc.h        |    2 ++
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   28 +++-------------------
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    2 ++
>   6 files changed, 54 insertions(+), 56 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 1a23445..4ebd421 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2113,6 +2113,8 @@ struct drm_i915_gem_request {
>
>   };
>
> +int i915_gem_request_alloc(struct intel_engine_cs *ring,
> +			   struct intel_context *ctx);
>   void i915_gem_request_free(struct kref *req_ref);
>
>   static inline uint32_t
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 51cdfb7..4824adf 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2518,6 +2518,43 @@ void i915_gem_request_free(struct kref *req_ref)
>   	kfree(req);
>   }
>
> +int i915_gem_request_alloc(struct intel_engine_cs *ring,
> +			   struct intel_context *ctx)
> +{
> +	int ret;
> +	struct drm_i915_gem_request *request;
> +	struct drm_i915_private *dev_private = ring->dev->dev_private;
> +
> +	if (ring->outstanding_lazy_request)
> +		return 0;
> +
> +	request = kzalloc(sizeof(*request), GFP_KERNEL);
> +	if (request == NULL)
> +		return -ENOMEM;
> +
> +	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
> +	if (ret) {
> +		kfree(request);
> +		return ret;
> +	}
> +
> +	kref_init(&request->ref);
> +	request->ring = ring;
> +	request->uniq = dev_private->request_uniq++;
> +
> +	if (i915.enable_execlists)
> +		ret = intel_logical_ring_alloc_request_extras(request, ctx);
> +	else
> +		ret = intel_ring_alloc_request_extras(request);
> +	if (ret) {
> +		kfree(request);
> +		return ret;
> +	}
> +
> +	ring->outstanding_lazy_request = request;
> +	return 0;
> +}
> +
>   struct drm_i915_gem_request *
>   i915_gem_find_active_request(struct intel_engine_cs *ring)
>   {
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index cad4300..6504689 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -611,44 +611,21 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>   	return logical_ring_invalidate_all_caches(ringbuf, ctx);
>   }
>
> -static int logical_ring_alloc_request(struct intel_engine_cs *ring,
> -				      struct intel_context *ctx)
> +int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request,
> +					    struct intel_context *ctx)
>   {
> -	struct drm_i915_gem_request *request;
> -	struct drm_i915_private *dev_private = ring->dev->dev_private;
>   	int ret;
>
> -	if (ring->outstanding_lazy_request)
> -		return 0;
> -
> -	request = kzalloc(sizeof(*request), GFP_KERNEL);
> -	if (request == NULL)
> -		return -ENOMEM;
> -
> -	if (ctx != ring->default_context) {
> -		ret = intel_lr_context_pin(ring, ctx);
> -		if (ret) {
> -			kfree(request);
> +	if (ctx != request->ring->default_context) {
> +		ret = intel_lr_context_pin(request->ring, ctx);
> +		if (ret)
>   			return ret;
> -		}
> -	}
> -
> -	kref_init(&request->ref);
> -	request->ring = ring;
> -	request->uniq = dev_private->request_uniq++;
> -
> -	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
> -	if (ret) {
> -		intel_lr_context_unpin(ring, ctx);
> -		kfree(request);
> -		return ret;
>   	}
>
> -	request->ctx = ctx;
> +	request->ringbuf = ctx->engine[request->ring->id].ringbuf;
> +	request->ctx     = ctx;
>   	i915_gem_context_reference(request->ctx);
> -	request->ringbuf = ctx->engine[ring->id].ringbuf;
>
> -	ring->outstanding_lazy_request = request;
>   	return 0;
>   }
>
> @@ -840,7 +817,7 @@ static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>   		return ret;
>
>   	/* Preallocate the olr before touching the ring */
> -	ret = logical_ring_alloc_request(ring, ctx);
> +	ret = i915_gem_request_alloc(ring, ctx);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index ac8f81a..04d3a6d 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -36,6 +36,8 @@
>   #define RING_CONTEXT_STATUS_PTR(ring)	((ring)->mmio_base+0x3a0)
>
>   /* Logical Rings */
> +int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request,
> +					    struct intel_context *ctx);
>   void intel_logical_ring_stop(struct intel_engine_cs *ring);
>   void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
>   int intel_logical_rings_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 441e250..99fb2f0 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2181,32 +2181,10 @@ int intel_ring_idle(struct intel_engine_cs *ring)
>   	return i915_wait_request(req);
>   }
>
> -static int
> -intel_ring_alloc_request(struct intel_engine_cs *ring)
> +int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
>   {
> -	int ret;
> -	struct drm_i915_gem_request *request;
> -	struct drm_i915_private *dev_private = ring->dev->dev_private;
> -
> -	if (ring->outstanding_lazy_request)
> -		return 0;
> -
> -	request = kzalloc(sizeof(*request), GFP_KERNEL);
> -	if (request == NULL)
> -		return -ENOMEM;
> -
> -	kref_init(&request->ref);
> -	request->ring = ring;
> -	request->ringbuf = ring->buffer;
> -	request->uniq = dev_private->request_uniq++;
> -
> -	ret = i915_gem_get_seqno(ring->dev, &request->seqno);
> -	if (ret) {
> -		kfree(request);
> -		return ret;
> -	}
> +	request->ringbuf = request->ring->buffer;
>
> -	ring->outstanding_lazy_request = request;
>   	return 0;
>   }
>
> @@ -2247,7 +2225,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>   		return ret;
>
>   	/* Preallocate the olr before touching the ring */
> -	ret = intel_ring_alloc_request(ring);
> +	ret = i915_gem_request_alloc(ring, ring->default_context);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index c761fe0..6566dd4 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -390,6 +390,8 @@ int intel_alloc_ringbuffer_obj(struct drm_device *dev,
>   void intel_stop_ring_buffer(struct intel_engine_cs *ring);
>   void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
>
> +int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request);
> +
>   int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
>   int __must_check intel_ring_cacheline_align(struct intel_engine_cs *ring);
>   static inline void intel_ring_emit(struct intel_engine_cs *ring,
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Intel-gfx@lists.freedesktop.org
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Re: [PATCH 04/59] drm/i915: Fix for ringbuf space wait in LRC mode

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The legacy and LRC code paths have an almost identical procedure for waiting for
> space in the ring buffer. They both search for a request in the free list that
> will advance the tail to a point where sufficient space is available. They then
> wait for that request, retire it and recalculate the free space value.
>
> Unfortunately, a bug in the LRC side meant that the resulting free space might
> not be as large as expected and indeed, might not be sufficient. This is because
> it was testing against the value of request->tail not request->postfix. Whereas,
> when a request is retired, ringbuf->tail is updated to req->postfix not
> req->tail.
>
> Another significant difference between the two is that the LRC one did not trust
> the wait for request to work! It redid the is there enough space available test
> and would fail the call if insufficient. Whereas, the legacy version just said
> 'return 0' - it assumed the preceeding code works. This difference meant that
> the LRC version still worked even with the bug - it just fell back to the
> polling wait path.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c        |   10 ++++++----
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   10 ++++++----
>   2 files changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 6504689..1c3834fc 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -634,7 +634,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
>   {
>   	struct intel_engine_cs *ring = ringbuf->ring;
>   	struct drm_i915_gem_request *request;
> -	int ret;
> +	int ret, new_space;
>
>   	if (intel_ring_space(ringbuf) >= bytes)
>   		return 0;
> @@ -650,10 +650,10 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
>   			continue;
>
>   		/* Would completion of this request free enough space? */
> -		if (__intel_ring_space(request->tail, ringbuf->tail,
> -				       ringbuf->size) >= bytes) {
> +		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
> +				       ringbuf->size);
> +		if (new_space >= bytes)
>   			break;
> -		}
>   	}
>
>   	if (&request->list == &ring->request_list)
> @@ -665,6 +665,8 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
>
>   	i915_gem_retire_requests_ring(ring);
>
> +	WARN_ON(intel_ring_space(ringbuf) < new_space);
> +
>   	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
>   }
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 99fb2f0..a26bdf8 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2059,16 +2059,16 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
>   {
>   	struct intel_ringbuffer *ringbuf = ring->buffer;
>   	struct drm_i915_gem_request *request;
> -	int ret;
> +	int ret, new_space;
>
>   	if (intel_ring_space(ringbuf) >= n)
>   		return 0;
>
>   	list_for_each_entry(request, &ring->request_list, list) {
> -		if (__intel_ring_space(request->postfix, ringbuf->tail,
> -				       ringbuf->size) >= n) {
> +		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
> +				       ringbuf->size);
> +		if (new_space >= n)
>   			break;
> -		}
>   	}
>
>   	if (&request->list == &ring->request_list)
> @@ -2080,6 +2080,8 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
>
>   	i915_gem_retire_requests_ring(ring);
>
> +	WARN_ON(intel_ring_space(ringbuf) < new_space);
> +
>   	return 0;
>   }
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 05/59] drm/i915: Reserve ring buffer space for i915_add_request() commands

[Tomas Elf]

Three comments in this one. The reason I mention it is because two are 
at the bottom of the patch and one is crammed in the middle.

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> It is a bad idea for i915_add_request() to fail. The work will already have been
> send to the ring and will be processed, but there will not be any tracking or
> management of that work.
>
> The only way the add request call can fail is if it can't write its epilogue
> commands to the ring (cache flushing, seqno updates, interrupt signalling). The
> reasons for that are mostly down to running out of ring buffer space and the
> problems associated with trying to get some more. This patch prevents that
> situation from happening in the first place.
>
> When a request is created, it marks sufficient space as reserved for the
> epilogue commands. Thus guaranteeing that by the time the epilogue is written,
> there will be plenty of space for it. Note that a ring_begin() call is required
> to actually reserve the space (and do any potential waiting). However, that is
> not currently done at request creation time. This is because the ring_begin()
> code can allocate a request. Hence calling begin() from the request allocation
> code would lead to infinite recursion! Later patches in this series remove the
> need for begin() to do the allocate. At that point, it becomes safe for the
> allocate to call begin() and really reserve the space.
>
> Until then, there is a potential for insufficient space to be available at the
> point of calling i915_add_request(). However, that would only be in the case
> where the request was created and immediately submitted without ever calling
> ring_begin() and adding any work to that request. Which should never happen. And
> even if it does, and if that request happens to fall down the tiny window of
> opportunity for failing due to being out of ring space then does it really
> matter because the request wasn't doing anything in the first place?
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    1 +
>   drivers/gpu/drm/i915/i915_gem.c         |   47 +++++++++++++++++++++++++++++
>   drivers/gpu/drm/i915/intel_lrc.c        |   12 ++++++++
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   50 +++++++++++++++++++++++++++++--
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    9 ++++++
>   5 files changed, 117 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4ebd421..fe6446d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2115,6 +2115,7 @@ struct drm_i915_gem_request {
>
>   int i915_gem_request_alloc(struct intel_engine_cs *ring,
>   			   struct intel_context *ctx);
> +void i915_gem_request_cancel(struct drm_i915_gem_request *req);
>   void i915_gem_request_free(struct kref *req_ref);
>
>   static inline uint32_t
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4824adf..fc383fc 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2344,6 +2344,13 @@ int __i915_add_request(struct intel_engine_cs *ring,
>   	} else
>   		ringbuf = ring->buffer;
>
> +	/*
> +	 * To ensure that this call will not fail, space for it's emissions

1. Nitpick: "space for it's emissions" : "it's" -> "its"

> +	 * should already have been reserved in the ring buffer. Let the ring
> +	 * know that it is time to use that space up.
> +	 */
> +	intel_ring_reserved_space_use(ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
> +
>   	request_start = intel_ring_get_tail(ringbuf);
>   	/*
>   	 * Emit any outstanding flushes - execbuf can fail to emit the flush
> @@ -2426,6 +2433,9 @@ int __i915_add_request(struct intel_engine_cs *ring,
>   			   round_jiffies_up_relative(HZ));
>   	intel_mark_busy(dev_priv->dev);
>
> +	/* Sanity check that the reserved size was large enough. */
> +	intel_ring_reserved_space_end(ringbuf);
> +
>   	return 0;
>   }
>
> @@ -2551,10 +2561,47 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
>   		return ret;
>   	}
>
> +	/*
> +	 * Reserve space in the ring buffer for all the commands required to
> +	 * eventually emit this request. This is to guarantee that the
> +	 * i915_add_request() call can't fail. Note that the reserve may need
> +	 * to be redone if the request is not actually submitted straight
> +	 * away, e.g. because a GPU scheduler has deferred it.
> +	 *
> +	 * Note further that this call merely notes the reserve request. A
> +	 * subsequent call to *_ring_begin() is required to actually ensure
> +	 * that the reservation is available. Without the begin, if the
> +	 * request creator immediately submitted the request without adding
> +	 * any commands to it then there might not actually be sufficient
> +	 * room for the submission commands. Unfortunately, the current
> +	 * *_ring_begin() implementations potentially call back here to
> +	 * i915_gem_request_alloc(). Thus calling _begin() here would lead to
> +	 * infinite recursion! Until that back call path is removed, it is
> +	 * necessary to do a manual _begin() outside.
> +	 */
> +	ret = intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
> +	if (ret) {
> +		/*
> +		 * At this point, the request is fully allocated even if not
> +		 * fully prepared. Thus it can be cleaned up using the proper
> +		 * free code.
> +		 */
> +		i915_gem_request_cancel(request);
> +		return ret;
> +	}
> +
>   	ring->outstanding_lazy_request = request;
>   	return 0;
>   }
>
> +void i915_gem_request_cancel(struct drm_i915_gem_request *req)
> +{
> +	intel_ring_reserved_space_use(req->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
> +	intel_ring_reserved_space_end(req->ringbuf);
> +
> +	i915_gem_request_unreference(req);
> +}
> +
>   struct drm_i915_gem_request *
>   i915_gem_find_active_request(struct intel_engine_cs *ring)
>   {
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 1c3834fc..bdbdcae 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -636,6 +636,9 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
>   	struct drm_i915_gem_request *request;
>   	int ret, new_space;
>
> +	/* The whole point of reserving space is to not wait! */
> +	WARN_ON(ringbuf->reserved_in_use);
> +
>   	if (intel_ring_space(ringbuf) >= bytes)
>   		return 0;
>
> @@ -704,6 +707,9 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>   	unsigned long end;
>   	int ret;
>
> +	/* The whole point of reserving space is to not wait! */
> +	WARN_ON(ringbuf->reserved_in_use);
> +
>   	ret = logical_ring_wait_request(ringbuf, bytes);
>   	if (ret != -ENOSPC)
>   		return ret;
> @@ -750,6 +756,9 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
>   	uint32_t __iomem *virt;
>   	int rem = ringbuf->size - ringbuf->tail;
>
> +	/* Can't wrap if space has already been reserved! */
> +	WARN_ON(ringbuf->reserved_in_use);
> +
>   	if (ringbuf->space < rem) {
>   		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
>
> @@ -773,6 +782,9 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
>   {
>   	int ret;
>
> +	if (!ringbuf->reserved_in_use)
> +		bytes += ringbuf->reserved_size;
> +
>   	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
>   		ret = logical_ring_wrap_buffer(ringbuf, ctx);
>   		if (unlikely(ret))
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index a26bdf8..9075008 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2061,6 +2061,9 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
>   	struct drm_i915_gem_request *request;
>   	int ret, new_space;
>
> +	/* The whole point of reserving space is to not wait! */
> +	WARN_ON(ringbuf->reserved_in_use);
> +
>   	if (intel_ring_space(ringbuf) >= n)
>   		return 0;
>
> @@ -2093,6 +2096,9 @@ static int ring_wait_for_space(struct intel_engine_cs *ring, int n)
>   	unsigned long end;
>   	int ret;
>
> +	/* The whole point of reserving space is to not wait! */
> +	WARN_ON(ringbuf->reserved_in_use);
> +
>   	ret = intel_ring_wait_request(ring, n);
>   	if (ret != -ENOSPC)
>   		return ret;
> @@ -2143,6 +2149,9 @@ static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
>   	struct intel_ringbuffer *ringbuf = ring->buffer;
>   	int rem = ringbuf->size - ringbuf->tail;
>
> +	/* Can't wrap if space has already been reserved! */
> +	WARN_ON(ringbuf->reserved_in_use);
> +
>   	if (ringbuf->space < rem) {
>   		int ret = ring_wait_for_space(ring, rem);
>   		if (ret)
> @@ -2190,12 +2199,49 @@ int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
>   	return 0;
>   }
>
> -static int __intel_ring_prepare(struct intel_engine_cs *ring,
> -				int bytes)
> +int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
> +{
> +	/* NB: Until request management is fully tidied up and the OLR is
> +	 * removed, there are too many ways for get false hits on this
> +	 * anti-recursion check! */
> +	/*WARN_ON(ringbuf->reserved_size);*/
> +	WARN_ON(ringbuf->reserved_in_use);
> +
> +	ringbuf->reserved_size = size;
> +
> +	/*
> +	 * Really need to call _begin() here but that currently leads to
> +	 * recursion problems! So just return zero and hope for the best...
> +	 */
> +	return 0;
> +}
> +
> +void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size)
> +{
> +	WARN_ON(size > ringbuf->reserved_size);
> +	WARN_ON(ringbuf->reserved_in_use);
> +
> +	ringbuf->reserved_in_use = true;
> +	ringbuf->reserved_tail   = ringbuf->tail;
> +}
> +
> +void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
> +{
> +	WARN_ON(!ringbuf->reserved_in_use);
> +	WARN_ON(ringbuf->tail > ringbuf->reserved_tail + ringbuf->reserved_size);
> +
> +	ringbuf->reserved_size   = 0;
> +	ringbuf->reserved_in_use = false;
> +}
> +
> +static int __intel_ring_prepare(struct intel_engine_cs *ring, int bytes)
>   {
>   	struct intel_ringbuffer *ringbuf = ring->buffer;
>   	int ret;
>
> +	if (!ringbuf->reserved_in_use)
> +		bytes += ringbuf->reserved_size;
> +
>   	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
>   		ret = intel_wrap_ring_buffer(ring);
>   		if (unlikely(ret))
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 6566dd4..b334459 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -104,6 +104,9 @@ struct intel_ringbuffer {
>   	int space;
>   	int size;
>   	int effective_size;
> +	int reserved_size;
> +	int reserved_tail;
> +	bool reserved_in_use;
>
>   	/** We track the position of the requests in the ring buffer, and
>   	 * when each is retired we increment last_retired_head as the GPU
> @@ -442,4 +445,10 @@ intel_ring_get_request(struct intel_engine_cs *ring)
>   	return ring->outstanding_lazy_request;
>   }
>
> +#define MIN_SPACE_FOR_ADD_REQUEST	128

2. How was this value derived? How do we know that it works properly for 
all platforms? Can be be sure that it's enough to make sure that 
add_request does not fail later?

> +
> +int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size);
> +void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size);
> +void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf);
> +

3. The relationship between these functions and where they belong on the 
request submission timeline are not obvious here. These functions are 
conceptually not that difficult to grasp once you read the code (and 
read through all of the patches in this patch series) but it could be 
made much easier by adding a decent description of a) The purpose of 
each function and b) When each function should be used in relation to 
the other functions.

Thanks,
Tomas

>   #endif /* _INTEL_RINGBUFFER_H_ */
>

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Re: [PATCH 05/59] drm/i915: Reserve ring buffer space for i915_add_request() commands

[Chris Wilson]

On Mon, Mar 23, 2015 at 09:54:41AM +0100, Daniel Vetter wrote:
> On Fri, Mar 20, 2015 at 03:55:59PM +0000, John Harrison wrote:
> > On 20/03/2015 15:13, Daniel Vetter wrote:
> > >On Thu, Mar 19, 2015 at 12:30:10PM +0000, John.C.Harrison@Intel.com wrote:
> > >>+void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size)
> > >Just a bit of interface bikeshed - I'd drop the size parameter here. It
> > >just duplicates what we tell the ring in the reservation code and the real
> > >check happens in the _end function.
> > >
> > >>+{
> > >>+	WARN_ON(size > ringbuf->reserved_size);
> > >>+	WARN_ON(ringbuf->reserved_in_use);
> > >>+
> > >>+	ringbuf->reserved_in_use = true;
> > >>+	ringbuf->reserved_tail   = ringbuf->tail;
> > >>+}
> > >>+
> > >>+void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
> > >>+{
> > >>+	WARN_ON(!ringbuf->reserved_in_use);
> > >>+	WARN_ON(ringbuf->tail > ringbuf->reserved_tail + ringbuf->reserved_size);
> > >Don't we need to handle wrap-around to make sure we do correctly check for
> > >sufficient reservation?
> > >-Daniel
> > 
> > There is nothing special to worry about for wrapping. The regular
> > intel_ring_begin() code will handle all that as before. The whole point of
> > the reserved scheme is that it is basically the same as calling
> > intel_ring_begin() with 'size + RESERVED_SIZE' everywhere. So when
> > i915_add_request() starts, it is guaranteed that an
> > 'intel_ring_begin(RESERVED_SIZE)' has been done already including any
> > necessary buffer wrapping. Thus it does not actually need to call
> > 'i_r_begin()' at all, really - it is guaranteed to succeed (as long as it
> > stays within RESERVED_SIZE total usage).
> 
> I think there's a misunderstanding. Let me try to explain again.
> 
> ringbuf->tail gets wrapped around, but the expression
> "ringbuf->reserved->tail + ringbuf->reserved_size" doesn't. And the
> comparison ">" also doesn't handle wrap around.
> 
> All taken together there won't be a spurios WARN, buf if you wrap ->tail
> and haven't reserved enough space your check wont catch this. The only
> thing you need is reserved_size+reserved_tail > RINGBUF_SIZE and your WARN
> won't fire, not even if we wrap the ring a few times.
> 
> This is even more important since the wrapping itself increases space
> requirements a bit, and so we want to be especially careful with checking
> that we reserved enough there.
> 
> Or do I miss something?

The question is why even bother to reserve space for the request
emission? If the request occupies so much ring space that the final
flush+breadcrumb+interrupt cannot fit into what remains, then we will
throw a WARN due to out of ring-space and percolate up the failure and
unwind the failed request.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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Re: [PATCH 07/59] drm/i915: Early alloc request in execbuff

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Start of explicit request management in the execbuffer code path. This patch
> adds a call to allocate a request structure before all the actual hardware work
> is done. Thus guaranteeing that all that work is tagged by a known request. At
> present, nothing further is done with the request, the rest comes later in the
> series.
>
> The only noticable change is that failure to get a request (e.g. due to lack of
> memory) will be caught earlier in the sequence. It now occurs right at the start
> before any un-undoable work has been done.
>
> v2: Simplified the error handling path.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 1bb237c..2504cfd 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1594,10 +1594,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	} else
>   		exec_start += i915_gem_obj_offset(batch_obj, vm);
>
> +	/* Allocate a request for this batch buffer nice and early. */
> +	ret = i915_gem_request_alloc(ring, ctx);
> +	if (ret)
> +		goto err_batch_unpin;
> +
>   	ret = dev_priv->gt.execbuf_submit(dev, file, ring, ctx, args,
>   					  &eb->vmas, batch_obj, exec_start,
>   					  dispatch_flags);
>
> +err_batch_unpin:
>   	/*
>   	 * FIXME: We crucially rely upon the active tracking for the (ppgtt)
>   	 * batch vma for correctness. For less ugly and less fragility this
> @@ -1606,6 +1612,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	 */
>   	if (dispatch_flags & I915_DISPATCH_SECURE)
>   		i915_gem_object_ggtt_unpin(batch_obj);
> +
>   err:
>   	/* the request owns the ref now */
>   	i915_gem_context_unreference(ctx);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 08/59] drm/i915: Set context in request from creation even in legacy mode

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> In execlist mode, the context object pointer is written in to the request
> structure (and reference counted) at the point of request creation. In legacy
> mode, this only happens inside i915_add_request().
>
> This patch updates the legacy code path to match the execlist version. This
> allows all the intermediate code between request creation and request submission
> to get at the context object given only a request structure. Thus negating the
> need to pass context pointers here, there and everywhere.
>
> v2: Moved the context reference so it does not need to be undone if the
> get_seqno() fails.
>
> v3: Fixed execlist mode always hitting a warning about invalid last_contexts
> (which don't exist in execlist mode).
>
> v4: Updated for new i915_gem_request_alloc() scheme.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c  |   14 +++++---------
>   drivers/gpu/drm/i915/intel_lrc.c |   11 ++++-------
>   drivers/gpu/drm/i915/intel_lrc.h |    3 +--
>   3 files changed, 10 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index cdf1c9d..f35ac7f 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2393,14 +2393,7 @@ void __i915_add_request(struct intel_engine_cs *ring,
>   	 */
>   	request->batch_obj = obj;
>
> -	if (!i915.enable_execlists) {
> -		/* Hold a reference to the current context so that we can inspect
> -		 * it later in case a hangcheck error event fires.
> -		 */
> -		request->ctx = ring->last_context;
> -		if (request->ctx)
> -			i915_gem_context_reference(request->ctx);
> -	}
> +	WARN_ON(!i915.enable_execlists && (request->ctx != ring->last_context));
>
>   	request->emitted_jiffies = jiffies;
>   	list_add_tail(&request->list, &ring->request_list);
> @@ -2545,12 +2538,15 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
>   	kref_init(&request->ref);
>   	request->ring = ring;
>   	request->uniq = dev_private->request_uniq++;
> +	request->ctx  = ctx;
> +	i915_gem_context_reference(request->ctx);
>
>   	if (i915.enable_execlists)
> -		ret = intel_logical_ring_alloc_request_extras(request, ctx);
> +		ret = intel_logical_ring_alloc_request_extras(request);
>   	else
>   		ret = intel_ring_alloc_request_extras(request);
>   	if (ret) {
> +		i915_gem_context_unreference(request->ctx);
>   		kfree(request);
>   		return ret;
>   	}
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 8d48761..a0ce65b 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -611,20 +611,17 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
>   	return logical_ring_invalidate_all_caches(ringbuf, ctx);
>   }
>
> -int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request,
> -					    struct intel_context *ctx)
> +int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request)
>   {
>   	int ret;
>
> -	if (ctx != request->ring->default_context) {
> -		ret = intel_lr_context_pin(request->ring, ctx);
> +	if (request->ctx != request->ring->default_context) {
> +		ret = intel_lr_context_pin(request->ring, request->ctx);
>   		if (ret)
>   			return ret;
>   	}
>
> -	request->ringbuf = ctx->engine[request->ring->id].ringbuf;
> -	request->ctx     = ctx;
> -	i915_gem_context_reference(request->ctx);
> +	request->ringbuf = request->ctx->engine[request->ring->id].ringbuf;
>
>   	return 0;
>   }
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 04d3a6d..4148de0 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -36,8 +36,7 @@
>   #define RING_CONTEXT_STATUS_PTR(ring)	((ring)->mmio_base+0x3a0)
>
>   /* Logical Rings */
> -int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request,
> -					    struct intel_context *ctx);
> +int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request);
>   void intel_logical_ring_stop(struct intel_engine_cs *ring);
>   void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
>   int intel_logical_rings_init(struct drm_device *dev);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 09/59] drm/i915: Merged the many do_execbuf() parameters into a structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The do_execbuf() function takes quite a few parameters. The actual set of
> parameters is going to change with the conversion to passing requests around.
> Further, it is due to grow massively with the arrival of the GPU scheduler.
>
> This patch simplifies the prototype by passing a parameter structure instead.
> Changing the parameter set in the future is then simply a matter of
> adding/removing items to the structure.
>
> Note that the structure does not contain absolutely everything that is passed
> in. This is because the intention is to use this structure more extensively
> later in this patch series and more especially in the GPU scheduler that is
> coming soon. The latter requires hanging on to the structure as the final
> hardware submission can be delayed until long after the execbuf IOCTL has
> returned to user land. Thus it is unsafe to put anything in the structure that
> is local to the IOCTL call itself - such as the 'args' parameter. All entries
> must be copies of data or pointers to structures that are reference counted in
> some way and guaranteed to exist for the duration of the batch buffer's life.
>
> v2: Rebased to newer tree and updated for changes to the command parser.
> Specifically, a code shuffle has required saving the batch start address in the
> params structure.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Reviewed-by: Tomas Elf <tomas.elf@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |   28 +++++++------
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |   61 ++++++++++++++++++----------
>   drivers/gpu/drm/i915/intel_lrc.c           |   26 ++++++------
>   drivers/gpu/drm/i915/intel_lrc.h           |    9 ++--
>   4 files changed, 71 insertions(+), 53 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7b36d4a..6ae99ce 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1558,6 +1558,17 @@ struct i915_virtual_gpu {
>   	bool active;
>   };
>
> +struct i915_execbuffer_params {
> +	struct drm_device               *dev;
> +	struct drm_file                 *file;
> +	uint32_t                        dispatch_flags;
> +	uint32_t                        args_batch_start_offset;
> +	uint32_t                        batch_obj_vm_offset;
> +	struct intel_engine_cs          *ring;
> +	struct drm_i915_gem_object      *batch_obj;
> +	struct intel_context            *ctx;
> +};
> +
>   struct drm_i915_private {
>   	struct drm_device *dev;
>   	struct kmem_cache *slab;
> @@ -1812,13 +1823,9 @@ struct drm_i915_private {
>
>   	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
>   	struct {
> -		int (*execbuf_submit)(struct drm_device *dev, struct drm_file *file,
> -				      struct intel_engine_cs *ring,
> -				      struct intel_context *ctx,
> +		int (*execbuf_submit)(struct i915_execbuffer_params *params,
>   				      struct drm_i915_gem_execbuffer2 *args,
> -				      struct list_head *vmas,
> -				      struct drm_i915_gem_object *batch_obj,
> -				      u64 exec_start, u32 flags);
> +				      struct list_head *vmas);
>   		int (*init_rings)(struct drm_device *dev);
>   		void (*cleanup_ring)(struct intel_engine_cs *ring);
>   		void (*stop_ring)(struct intel_engine_cs *ring);
> @@ -2569,14 +2576,9 @@ void i915_gem_execbuffer_retire_commands(struct drm_device *dev,
>   					 struct drm_file *file,
>   					 struct intel_engine_cs *ring,
>   					 struct drm_i915_gem_object *obj);
> -int i915_gem_ringbuffer_submission(struct drm_device *dev,
> -				   struct drm_file *file,
> -				   struct intel_engine_cs *ring,
> -				   struct intel_context *ctx,
> +int i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   				   struct drm_i915_gem_execbuffer2 *args,
> -				   struct list_head *vmas,
> -				   struct drm_i915_gem_object *batch_obj,
> -				   u64 exec_start, u32 flags);
> +				   struct list_head *vmas);
>   int i915_gem_execbuffer(struct drm_device *dev, void *data,
>   			struct drm_file *file_priv);
>   int i915_gem_execbuffer2(struct drm_device *dev, void *data,
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 2504cfd..2fffd99 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1185,17 +1185,15 @@ err:
>   }
>
>   int
> -i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
> -			       struct intel_engine_cs *ring,
> -			       struct intel_context *ctx,
> +i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>   			       struct drm_i915_gem_execbuffer2 *args,
> -			       struct list_head *vmas,
> -			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 dispatch_flags)
> +			       struct list_head *vmas)
>   {
>   	struct drm_clip_rect *cliprects = NULL;
> +	struct drm_device *dev = params->dev;
> +	struct intel_engine_cs *ring = params->ring;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
> -	u64 exec_len;
> +	u64 exec_start, exec_len;
>   	int instp_mode;
>   	u32 instp_mask;
>   	int i, ret = 0;
> @@ -1247,7 +1245,7 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>   	if (ret)
>   		goto error;
>
> -	ret = i915_switch_context(ring, ctx);
> +	ret = i915_switch_context(ring, params->ctx);
>   	if (ret)
>   		goto error;
>
> @@ -1304,12 +1302,15 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>   	}
>
>   	if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
> -		ret = i915_reset_gen7_sol_offsets(dev, ring);
> +		ret = i915_reset_gen7_sol_offsets(params->dev, ring);

I know that I already r-b:ed this patch before but I discovered that 
this change is not necessary since dev is already defined further up. 
Just reuse that local variable and revert this change.

>   		if (ret)
>   			goto error;
>   	}
>
> -	exec_len = args->batch_len;
> +	exec_len   = args->batch_len;
> +	exec_start = params->batch_obj_vm_offset +
> +		     params->args_batch_start_offset;
> +
>   	if (cliprects) {
>   		for (i = 0; i < args->num_cliprects; i++) {
>   			ret = i915_emit_box(ring, &cliprects[i],
> @@ -1319,22 +1320,23 @@ i915_gem_ringbuffer_submission(struct drm_device *dev, struct drm_file *file,
>
>   			ret = ring->dispatch_execbuffer(ring,
>   							exec_start, exec_len,
> -							dispatch_flags);
> +							params->dispatch_flags);
>   			if (ret)
>   				goto error;
>   		}
>   	} else {
>   		ret = ring->dispatch_execbuffer(ring,
>   						exec_start, exec_len,
> -						dispatch_flags);
> +						params->dispatch_flags);
>   		if (ret)
>   			return ret;
>   	}
>
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring,
> +					    params->batch_obj);
>
>   error:
>   	kfree(cliprects);
> @@ -1404,8 +1406,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	struct intel_engine_cs *ring;
>   	struct intel_context *ctx;
>   	struct i915_address_space *vm;
> +	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
> +	struct i915_execbuffer_params *params = &params_master;
>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
> -	u64 exec_start = args->batch_start_offset;
>   	u32 dispatch_flags;
>   	int ret;
>   	bool need_relocs;
> @@ -1498,6 +1501,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	else
>   		vm = &dev_priv->gtt.base;
>
> +	memset(&params_master, 0x00, sizeof(params_master));
> +
>   	eb = eb_create(args);
>   	if (eb == NULL) {
>   		i915_gem_context_unreference(ctx);
> @@ -1567,8 +1572,9 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   		if (USES_FULL_PPGTT(dev))
>   			dispatch_flags |= I915_DISPATCH_SECURE;
>
> -		exec_start = 0;
> -	}
> +		params->args_batch_start_offset = 0;
> +	} else
> +		params->args_batch_start_offset = args->batch_start_offset;
>
>   	batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
>
> @@ -1590,18 +1596,29 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   		if (ret)
>   			goto err;
>
> -		exec_start += i915_gem_obj_ggtt_offset(batch_obj);
> +		params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj);
>   	} else
> -		exec_start += i915_gem_obj_offset(batch_obj, vm);
> +		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>
>   	/* Allocate a request for this batch buffer nice and early. */
>   	ret = i915_gem_request_alloc(ring, ctx);
>   	if (ret)
>   		goto err_batch_unpin;
>
> -	ret = dev_priv->gt.execbuf_submit(dev, file, ring, ctx, args,
> -					  &eb->vmas, batch_obj, exec_start,
> -					  dispatch_flags);
> +	/*
> +	 * Save assorted stuff away to pass through to *_submission().
> +	 * NB: This data should be 'persistent' and not local as it will
> +	 * kept around beyond the duration of the IOCTL once the GPU
> +	 * scheduler arrives.
> +	 */
> +	params->dev                     = dev;
> +	params->file                    = file;
> +	params->ring                    = ring;
> +	params->dispatch_flags          = dispatch_flags;
> +	params->batch_obj               = batch_obj;
> +	params->ctx                     = ctx;
> +
> +	ret = dev_priv->gt.execbuf_submit(params, args, &eb->vmas);
>
>   err_batch_unpin:
>   	/*
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index a0ce65b..c0d97e97 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -853,16 +853,15 @@ static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>    *
>    * Return: non-zero if the submission fails.
>    */
> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> -			       struct intel_engine_cs *ring,
> -			       struct intel_context *ctx,
> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>   			       struct drm_i915_gem_execbuffer2 *args,
> -			       struct list_head *vmas,
> -			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 dispatch_flags)
> +			       struct list_head *vmas)
>   {
> +	struct drm_device       *dev = params->dev;
> +	struct intel_engine_cs  *ring = params->ring;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
> +	struct intel_ringbuffer *ringbuf = params->ctx->engine[ring->id].ringbuf;
> +	u64 exec_start;
>   	int instp_mode;
>   	u32 instp_mask;
>   	int ret;
> @@ -913,13 +912,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>   		return -EINVAL;
>   	}
>
> -	ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
> +	ret = execlists_move_to_gpu(ringbuf, params->ctx, vmas);
>   	if (ret)
>   		return ret;
>
>   	if (ring == &dev_priv->ring[RCS] &&
>   	    instp_mode != dev_priv->relative_constants_mode) {
> -		ret = intel_logical_ring_begin(ringbuf, ctx, 4);
> +		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
>   		if (ret)
>   			return ret;
>
> @@ -932,14 +931,17 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
>   		dev_priv->relative_constants_mode = instp_mode;
>   	}
>
> -	ret = ring->emit_bb_start(ringbuf, ctx, exec_start, dispatch_flags);
> +	exec_start = params->batch_obj_vm_offset +
> +		     args->batch_start_offset;
> +
> +	ret = ring->emit_bb_start(ringbuf, params->ctx, exec_start, params->dispatch_flags);
>   	if (ret)
>   		return ret;
>
> -	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags);
> +	trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), params->dispatch_flags);
>
>   	i915_gem_execbuffer_move_to_active(vmas, ring);
> -	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
> +	i915_gem_execbuffer_retire_commands(params->dev, params->file, ring, params->batch_obj);
>
>   	return 0;
>   }
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 4148de0..bf137c4 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -76,13 +76,10 @@ void intel_lr_context_reset(struct drm_device *dev,
>
>   /* Execlists */
>   int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
> -int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
> -			       struct intel_engine_cs *ring,
> -			       struct intel_context *ctx,
> +struct i915_execbuffer_params;
> +int intel_execlists_submission(struct i915_execbuffer_params *params,
>   			       struct drm_i915_gem_execbuffer2 *args,
> -			       struct list_head *vmas,
> -			       struct drm_i915_gem_object *batch_obj,
> -			       u64 exec_start, u32 dispatch_flags);
> +			       struct list_head *vmas);
>   u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
>
>   void intel_lrc_irq_handler(struct intel_engine_cs *ring);
>

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Re: [PATCH 11/59] drm/i915: Update alloc_request to return the allocated request

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The alloc_request() function does not actually return the newly allocated
> request. Instead, it must be pulled from ring->outstanding_lazy_request. This
> patch fixes this so that code can create a request and start using it knowing
> exactly which request it actually owns.
>
> v2: Updated for new i915_gem_request_alloc() scheme.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    3 ++-
>   drivers/gpu/drm/i915/i915_gem.c            |   10 +++++++---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 ++-
>   drivers/gpu/drm/i915/intel_lrc.c           |    3 ++-
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |    3 ++-
>   5 files changed, 15 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e2d5790..2c2c8a9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2121,7 +2121,8 @@ struct drm_i915_gem_request {
>   };
>
>   int i915_gem_request_alloc(struct intel_engine_cs *ring,
> -			   struct intel_context *ctx);
> +			   struct intel_context *ctx,
> +			   struct drm_i915_gem_request **req_out);
>   void i915_gem_request_cancel(struct drm_i915_gem_request *req);
>   void i915_gem_request_free(struct kref *req_ref);
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index f35ac7f..9a335d5 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2516,13 +2516,17 @@ void i915_gem_request_free(struct kref *req_ref)
>   }
>
>   int i915_gem_request_alloc(struct intel_engine_cs *ring,
> -			   struct intel_context *ctx)
> +			   struct intel_context *ctx,
> +			   struct drm_i915_gem_request **req_out)
>   {
>   	int ret;
>   	struct drm_i915_gem_request *request;
>   	struct drm_i915_private *dev_private = ring->dev->dev_private;
>
> -	if (ring->outstanding_lazy_request)
> +	if (!req_out)
> +		return -EINVAL;
> +
> +	if ((*req_out = ring->outstanding_lazy_request) != NULL)
>   		return 0;
>
>   	request = kzalloc(sizeof(*request), GFP_KERNEL);
> @@ -2580,7 +2584,7 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
>   		return ret;
>   	}
>
> -	ring->outstanding_lazy_request = request;
> +	*req_out = ring->outstanding_lazy_request = request;
>   	return 0;
>   }
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index f9da0ad..38f6c76 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1404,6 +1404,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	struct i915_address_space *vm;
>   	struct i915_execbuffer_params params_master; /* XXX: will be removed later */
>   	struct i915_execbuffer_params *params = &params_master;
> +	struct drm_i915_gem_request *request;
>   	const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
>   	u32 dispatch_flags;
>   	int ret;
> @@ -1597,7 +1598,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   		params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm);
>
>   	/* Allocate a request for this batch buffer nice and early. */
> -	ret = i915_gem_request_alloc(ring, ctx);
> +	ret = i915_gem_request_alloc(ring, ctx, &request);
>   	if (ret)
>   		goto err_batch_unpin;
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 21af5d6..ecd293a 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -813,6 +813,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
>   static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>   				    struct intel_context *ctx, int num_dwords)
>   {
> +	struct drm_i915_gem_request *req;
>   	struct intel_engine_cs *ring = ringbuf->ring;
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -828,7 +829,7 @@ static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
>   		return ret;
>
>   	/* Preallocate the olr before touching the ring */
> -	ret = i915_gem_request_alloc(ring, ctx);
> +	ret = i915_gem_request_alloc(ring, ctx, &req);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 1a7ed8b..958da01 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2256,6 +2256,7 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring, int bytes)
>   int intel_ring_begin(struct intel_engine_cs *ring,
>   		     int num_dwords)
>   {
> +	struct drm_i915_gem_request *req;
>   	struct drm_i915_private *dev_priv = ring->dev->dev_private;
>   	int ret;
>
> @@ -2269,7 +2270,7 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>   		return ret;
>
>   	/* Preallocate the olr before touching the ring */
> -	ret = i915_gem_request_alloc(ring, ring->default_context);
> +	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
>   	if (ret)
>   		return ret;
>
>

(actually already)
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
(but was not part of the patch so I'll add it again)

Thanks,
Tomas
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Re: [PATCH 16/59] drm/i915: Add flag to i915_add_request() to skip the cache flush

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> In order to explcitly track all GPU work (and completely remove the outstanding
> lazy request), it is necessary to add extra i915_add_request() calls to various
> places. Some of these do not need the implicit cache flush done as part of the
> standard batch buffer submission process.
>
> This patch adds a flag to _add_request() to specify whether the flush is
> required or not.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h              |    7 +++++--
>   drivers/gpu/drm/i915/i915_gem.c              |   17 ++++++++++-------
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c   |    2 +-
>   drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
>   5 files changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d3b718e..4bcb43f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2751,9 +2751,12 @@ int __must_check i915_gpu_idle(struct drm_device *dev);
>   int __must_check i915_gem_suspend(struct drm_device *dev);
>   void __i915_add_request(struct intel_engine_cs *ring,
>   			struct drm_file *file,
> -			struct drm_i915_gem_object *batch_obj);
> +			struct drm_i915_gem_object *batch_obj,
> +			bool flush_caches);
>   #define i915_add_request(ring) \
> -	__i915_add_request(ring, NULL, NULL)
> +	__i915_add_request(ring, NULL, NULL, true)
> +#define i915_add_request_no_flush(ring) \
> +	__i915_add_request(ring, NULL, NULL, false)
>   int __i915_wait_request(struct drm_i915_gem_request *req,
>   			unsigned reset_counter,
>   			bool interruptible,
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 9a335d5..f143d15 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2329,7 +2329,8 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
>    */
>   void __i915_add_request(struct intel_engine_cs *ring,
>   			struct drm_file *file,
> -			struct drm_i915_gem_object *obj)
> +			struct drm_i915_gem_object *obj,
> +			bool flush_caches)
>   {
>   	struct drm_i915_private *dev_priv = ring->dev->dev_private;
>   	struct drm_i915_gem_request *request;
> @@ -2361,12 +2362,14 @@ void __i915_add_request(struct intel_engine_cs *ring,
>   	 * is that the flush _must_ happen before the next request, no matter
>   	 * what.
>   	 */
> -	if (i915.enable_execlists)
> -		ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
> -	else
> -		ret = intel_ring_flush_all_caches(ring);
> -	/* Not allowed to fail! */
> -	WARN_ON(ret);
> +	if (flush_caches) {
> +		if (i915.enable_execlists)
> +			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
> +		else
> +			ret = intel_ring_flush_all_caches(ring);
> +		/* Not allowed to fail! */
> +		WARN_ON(ret);

There has been a discussion about whether it's ok to use 
WARN_ON(<variable/constant>) since it doesn't add any useful information 
about the actual failure case to the kernel log. By that logic you 
should add WARN_ON to each individual call to _flush_all_caches above 
but I would be inclined to say that that would be slightly redundant. It 
could be argued that if you get a WARN stack_dump in the kernel log at 
this point you pretty much know from where it came.

Although, if you want to be able to rely entirely on the kernel log and 
don't want to read the source code to figure out what function call 
failed then you would have to either add WARN_ONs to each individual 
function call or replace WARN_ON(ret) with something like WARN(ret, 
"flush_all_caches returned %d", ret) or something.

Any other opinion on how we should do this from anyone? What pattern 
should we be following here?

> +	}
>
>   	/* Record the position of the start of the request so that
>   	 * should we detect the updated seqno part-way through the
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 3173550..c0be7d7 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1060,7 +1060,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
>   	params->ring->gpu_caches_dirty = true;
>
>   	/* Add a breadcrumb for the completion of the batch buffer */
> -	__i915_add_request(params->ring, params->file, params->batch_obj);
> +	__i915_add_request(params->ring, params->file, params->batch_obj, true);
>   }
>
>   static int
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index ce4788f..4418616 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -173,7 +173,7 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
>
>   	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
>
> -	__i915_add_request(ring, NULL, so.obj);
> +	__i915_add_request(ring, NULL, so.obj, true);
>   	/* __i915_add_request moves object to inactive if it fails */
>   out:
>   	i915_gem_render_state_fini(&so);
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 8c69f88..4922725 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1350,7 +1350,7 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
>
>   	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
>
> -	__i915_add_request(ring, file, so.obj);
> +	__i915_add_request(ring, file, so.obj, true);
>   	/* intel_logical_ring_add_request moves object to inactive if it
>   	 * fails */
>   out:
>

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Re: [PATCH 18/59] drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The i915_gem_init_hw() function calls a bunch of smaller initialisation
> functions. Multiple of which have generic sections and per ring sections. This
> means multiple passes are done over the rings. Each pass writes data to the ring
> which floats around in that ring's OLR until some random point in the future
> when an add_request() is done by some random other piece of code.
>
> This patch breaks i915_ppgtt_init_hw() in two with the per ring initialisation
> now being done in i915_ppgtt_init_ring(). The ring looping is now done at the
> top level in i915_gem_init_hw().
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c     |   25 +++++++++++++++++++------
>   drivers/gpu/drm/i915/i915_gem_gtt.c |   28 +++++++++++++++-------------
>   drivers/gpu/drm/i915/i915_gem_gtt.h |    1 +
>   3 files changed, 35 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 8677293..683fc80 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4883,19 +4883,32 @@ i915_gem_init_hw(struct drm_device *dev)
>   	 */
>   	init_unused_rings(dev);
>
> +	ret = i915_ppgtt_init_hw(dev);
> +	if (ret) {
> +		DRM_ERROR("PPGTT enable HW failed %d\n", ret);
> +		goto out;
> +	}
> +
> +	/* Need to do basic initialisation of all rings first: */
>   	for_each_ring(ring, dev_priv, i) {
>   		ret = ring->init_hw(ring);
>   		if (ret)
>   			goto out;
>   	}
>
> -	for (i = 0; i < NUM_L3_SLICES(dev); i++)
> -		i915_gem_l3_remap(&dev_priv->ring[RCS], i);
> +	/* Now it is safe to go back round and do everything else: */
> +	for_each_ring(ring, dev_priv, i) {
> +		if (ring->id == RCS) {
> +			for (i = 0; i < NUM_L3_SLICES(dev); i++)
> +				i915_gem_l3_remap(ring, i);
> +		}
>
> -	ret = i915_ppgtt_init_hw(dev);
> -	if (ret && ret != -EIO) {
> -		DRM_ERROR("PPGTT enable failed %d\n", ret);
> -		i915_gem_cleanup_ringbuffer(dev);
> +		ret = i915_ppgtt_init_ring(ring);
> +		if (ret && ret != -EIO) {
> +			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
> +			i915_gem_cleanup_ringbuffer(dev);
> +			goto out;
> +		}
>   	}
>
>   	ret = i915_gem_context_enable(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index d8ff1a8..83076d7 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1280,11 +1280,6 @@ int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
>
>   int i915_ppgtt_init_hw(struct drm_device *dev)
>   {
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_engine_cs *ring;
> -	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
> -	int i, ret = 0;
> -
>   	/* In the case of execlists, PPGTT is enabled by the context descriptor
>   	 * and the PDPs are contained within the context itself.  We don't
>   	 * need to do anything here. */
> @@ -1303,16 +1298,23 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
>   	else
>   		MISSING_CASE(INTEL_INFO(dev)->gen);
>
> -	if (ppgtt) {
> -		for_each_ring(ring, dev_priv, i) {
> -			ret = ppgtt->switch_mm(ppgtt, ring);
> -			if (ret != 0)
> -				return ret;
> -		}
> -	}
> +	return 0;
> +}
>
> -	return ret;
> +int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
> +{
> +	struct drm_i915_private *dev_priv = ring->dev->dev_private;
> +	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
> +
> +	if (i915.enable_execlists)
> +		return 0;
> +
> +	if (!ppgtt)
> +		return 0;
> +
> +	return ppgtt->switch_mm(ppgtt, ring);
>   }
> +
>   struct i915_hw_ppgtt *
>   i915_ppgtt_create(struct drm_device *dev, struct drm_i915_file_private *fpriv)
>   {
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index c9e93f5..2941fbb 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -311,6 +311,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
>
>   int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
>   int i915_ppgtt_init_hw(struct drm_device *dev);
> +int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
>   void i915_ppgtt_release(struct kref *kref);
>   struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
>   					struct drm_i915_file_private *fpriv);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 20/59] drm/i915: Don't tag kernel batches as user batches

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The render state initialisation code does an explicit i915_add_request() call to
> commit the init commands. It was passing in the initialisation batch buffer to
> add_request() as the batch object parameter. However, the batch object entry in
> the request structure (which is all that parameter is used for) is meant for
> keeping track of user generated batch buffers for blame tagging during GPU
> hangs.
>
> This patch clears the batch object parameter so that kernel generated batch
> buffers are not tagged as being user generated.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_render_state.c |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c             |    2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index 4418616..a32a4b9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -173,7 +173,7 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
>
>   	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
>
> -	__i915_add_request(ring, NULL, so.obj, true);
> +	__i915_add_request(ring, NULL, NULL, true);
>   	/* __i915_add_request moves object to inactive if it fails */
>   out:
>   	i915_gem_render_state_fini(&so);
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 4922725..f24ab0c 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1350,7 +1350,7 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
>
>   	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
>
> -	__i915_add_request(ring, file, so.obj, true);
> +	__i915_add_request(ring, file, NULL, true);
>   	/* intel_logical_ring_add_request moves object to inactive if it
>   	 * fails */
>   out:
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 21/59] drm/i915: Add explicit request management to i915_gem_init_hw()

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that a single per ring loop is being done for all the different
> intialisation steps in i915_gem_init_hw(), it is possible to add proper request
> management as well. The last remaining issue is that the context enable call
> eventually ends up within *_render_state_init() and this does it's own private

Nitpick: "it's own private" : "it's" -> "its"

> _i915_add_request() call.
>
> This patch adds explicit request creation and submission to the top level loop
> and removes the add_request() from deep within the sub-functions. Note that the
> old add_request() call was being passed a batch object. This is now explicitly
> written to the request object instead. A warning has also been added to
> i915_add_request() to ensure that there is never an attempt to add two batch
> objects to a single request - e.g. because render_state_init() was called during
> execbuffer processing.

"A warning has also been added" : No it hasn't. After discussion with 
John it turns out that this part of the commit message is old and should 
be removed.

>
> v2: Updated for removal of batch_obj from add_request call in previous patch
> (which is new to series).
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h              |    3 ++-
>   drivers/gpu/drm/i915/i915_gem.c              |   12 ++++++++++++
>   drivers/gpu/drm/i915/i915_gem_render_state.c |    2 --
>   drivers/gpu/drm/i915/intel_lrc.c             |    5 -----
>   4 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index cc957d5..aa0695b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2082,7 +2082,8 @@ struct drm_i915_gem_request {
>   	struct intel_context *ctx;
>   	struct intel_ringbuffer *ringbuf;
>
> -	/** Batch buffer related to this request if any */
> +	/** Batch buffer related to this request if any (used for
> +	    error state dump only) */
>   	struct drm_i915_gem_object *batch_obj;
>
>   	/** Time at which this request was emitted, in jiffies. */
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 29568c4..4452618 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4900,8 +4900,16 @@ i915_gem_init_hw(struct drm_device *dev)
>
>   	/* Now it is safe to go back round and do everything else: */
>   	for_each_ring(ring, dev_priv, i) {
> +		struct drm_i915_gem_request *req;
> +
>   		WARN_ON(!ring->default_context);
>
> +		ret = i915_gem_request_alloc(ring, ring->default_context, &req);
> +		if (ret) {
> +			i915_gem_cleanup_ringbuffer(dev);
> +			goto out;
> +		}
> +
>   		if (ring->id == RCS) {
>   			for (i = 0; i < NUM_L3_SLICES(dev); i++)
>   				i915_gem_l3_remap(ring, i);
> @@ -4910,6 +4918,7 @@ i915_gem_init_hw(struct drm_device *dev)
>   		ret = i915_ppgtt_init_ring(ring);
>   		if (ret && ret != -EIO) {
>   			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
> +			i915_gem_request_cancel(req);
>   			i915_gem_cleanup_ringbuffer(dev);
>   			goto out;
>   		}
> @@ -4917,9 +4926,12 @@ i915_gem_init_hw(struct drm_device *dev)
>   		ret = i915_gem_context_enable(ring);
>   		if (ret && ret != -EIO) {
>   			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
> +			i915_gem_request_cancel(req);
>   			i915_gem_cleanup_ringbuffer(dev);
>   			goto out;
>   		}
> +
> +		i915_add_request_no_flush(ring);
>   	}
>
>   out:
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index a32a4b9..a07b4ee 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -173,8 +173,6 @@ int i915_gem_render_state_init(struct intel_engine_cs *ring)
>
>   	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
>
> -	__i915_add_request(ring, NULL, NULL, true);
> -	/* __i915_add_request moves object to inactive if it fails */
>   out:
>   	i915_gem_render_state_fini(&so);
>   	return ret;
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f24ab0c..b430e51 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1330,8 +1330,6 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
>   {
>   	struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
>   	struct render_state so;
> -	struct drm_i915_file_private *file_priv = ctx->file_priv;
> -	struct drm_file *file = file_priv ? file_priv->file : NULL;
>   	int ret;
>
>   	ret = i915_gem_render_state_prepare(ring, &so);
> @@ -1350,9 +1348,6 @@ static int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
>
>   	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
>
> -	__i915_add_request(ring, file, NULL, true);
> -	/* intel_logical_ring_add_request moves object to inactive if it
> -	 * fails */
>   out:
>   	i915_gem_render_state_fini(&so);
>   	return ret;
>

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Re: [PATCH 22/59] drm/i915: Update ppgtt_init_ring() & context_enable() to take requests

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The final step in removing the OLR from i915_gem_init_hw() is to pass the newly
> allocated request structure in to each step rather than passing a ring
> structure. This patch updates both i915_ppgtt_init_ring() and
> i915_gem_context_enable() to take request pointers.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    2 +-
>   drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
>   drivers/gpu/drm/i915/i915_gem_context.c |    3 ++-
>   drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
>   drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
>   5 files changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index aa0695b..e139f0e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2890,7 +2890,7 @@ int __must_check i915_gem_context_init(struct drm_device *dev);
>   void i915_gem_context_fini(struct drm_device *dev);
>   void i915_gem_context_reset(struct drm_device *dev);
>   int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
> -int i915_gem_context_enable(struct intel_engine_cs *ring);
> +int i915_gem_context_enable(struct drm_i915_gem_request *req);
>   void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
>   int i915_switch_context(struct intel_engine_cs *ring,
>   			struct intel_context *to);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4452618..9d776a5 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4915,7 +4915,7 @@ i915_gem_init_hw(struct drm_device *dev)
>   				i915_gem_l3_remap(ring, i);
>   		}
>
> -		ret = i915_ppgtt_init_ring(ring);
> +		ret = i915_ppgtt_init_ring(req);
>   		if (ret && ret != -EIO) {
>   			DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);
>   			i915_gem_request_cancel(req);
> @@ -4923,7 +4923,7 @@ i915_gem_init_hw(struct drm_device *dev)
>   			goto out;
>   		}
>
> -		ret = i915_gem_context_enable(ring);
> +		ret = i915_gem_context_enable(req);
>   		if (ret && ret != -EIO) {
>   			DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);
>   			i915_gem_request_cancel(req);
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index f51faad..647b48d 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -407,8 +407,9 @@ void i915_gem_context_fini(struct drm_device *dev)
>   	i915_gem_context_unreference(dctx);
>   }
>
> -int i915_gem_context_enable(struct intel_engine_cs *ring)
> +int i915_gem_context_enable(struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	if (i915.enable_execlists) {
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 83076d7..ac63572 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1301,9 +1301,9 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
>   	return 0;
>   }
>
> -int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
> +int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
>   {
> -	struct drm_i915_private *dev_priv = ring->dev->dev_private;
> +	struct drm_i915_private *dev_priv = req->ring->dev->dev_private;
>   	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
>
>   	if (i915.enable_execlists)
> @@ -1312,7 +1312,7 @@ int i915_ppgtt_init_ring(struct intel_engine_cs *ring)
>   	if (!ppgtt)
>   		return 0;
>
> -	return ppgtt->switch_mm(ppgtt, ring);
> +	return ppgtt->switch_mm(ppgtt, req->ring);
>   }
>
>   struct i915_hw_ppgtt *
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index 2941fbb..d4c7184 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -311,7 +311,7 @@ void i915_global_gtt_cleanup(struct drm_device *dev);
>
>   int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt);
>   int i915_ppgtt_init_hw(struct drm_device *dev);
> -int i915_ppgtt_init_ring(struct intel_engine_cs *ring);
> +int i915_ppgtt_init_ring(struct drm_i915_gem_request *req);
>   void i915_ppgtt_release(struct kref *kref);
>   struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_device *dev,
>   					struct drm_i915_file_private *fpriv);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 24/59] drm/i915: Update do_switch() to take a request structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated do_switch() to take a request pointer instead of a ring/context pair.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>
> v2: Removed some overzealous req-> dereferencing.
> ---
>   drivers/gpu/drm/i915/i915_gem_context.c |    7 ++++---
>   1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 26d5816..78e9c9c 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -560,9 +560,10 @@ mi_set_context(struct intel_engine_cs *ring,
>   	return ret;
>   }
>
> -static int do_switch(struct intel_engine_cs *ring,
> -		     struct intel_context *to)
> +static int do_switch(struct drm_i915_gem_request *req)
>   {
> +	struct intel_context *to = req->ctx;
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = ring->dev->dev_private;
>   	struct intel_context *from = ring->last_context;
>   	u32 hw_flags = 0;
> @@ -726,7 +727,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
>   		return 0;
>   	}
>
> -	return do_switch(req->ring, req->ctx);
> +	return do_switch(req);
>   }
>
>   static bool contexts_enabled(struct drm_device *dev)
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 25/59] drm/i915: Update deferred context creation to do explicit request management

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> In execlist mode, context initialisation is deferred until first use of the
> given context. This is because execlist mode has many more contexts than legacy
> mode and many are never actually used. Previously, the initialisation commands

Chris Wilson has previously remarked that execlist mode has in fact _no_ 
more contexts than legacy mode. It's just that we have conflicting 
definition of terms here. Could you reword this to say "execlist mode 
has many more context hardware states" or "execlist mode has many more 
subcontexts" or something? We need to work out how we should refer to 
these things in a consistent way.

> were written to the ring and tagged with some random request structure via the
> OLR. This seemed to be causing a null pointer deference bug under certain
> circumstances (BZ:88865).
>
> This patch adds explicit request creation and submission to the deferred
> initialisation code path. Thus removing any reliance on or randomness caused by
> the OLR.
>
> Note that it should be possible to move the deferred context creation until even
> later - when the context is actually switched to rather than when it is merely
> validated. This would allow the initialisation to be done within the request of
> the work that is wanting to use the context. Hence, the extra request that is
> created, used and retired just for the context init could be removed completely.
> However, this is left for a follow up patch.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c |   11 ++++++++++-
>   1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index b430e51..c77a74b 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1949,13 +1949,22 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
>   		lrc_setup_hardware_status_page(ring, ctx_obj);
>   	else if (ring->id == RCS && !ctx->rcs_initialized) {
>   		if (ring->init_context) {
> -			ret = ring->init_context(ring, ctx);
> +			struct drm_i915_gem_request *req;
> +
> +			ret = i915_gem_request_alloc(ring, ctx, &req);
> +			if (ret)
> +				return ret;
> +
> +			ret = ring->init_context(req->ring, ctx);
>   			if (ret) {
>   				DRM_ERROR("ring init context: %d\n", ret);
> +				i915_gem_request_cancel(req);
>   				ctx->engine[ring->id].ringbuf = NULL;
>   				ctx->engine[ring->id].state = NULL;
>   				goto error;
>   			}
> +
> +			i915_add_request_no_flush(req->ring);
>   		}
>
>   		ctx->rcs_initialized = true;
>

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Re: [PATCH 28/59] drm/i915: Update i915_gem_object_sync() to take a request structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The plan is to pass requests around as the basic submission tracking structure
> rather than rings and contexts. This patch updates the i915_gem_object_sync()
> code path.
>
> v2: Much more complex patch to share a single request between the sync and the
> page flip. The _sync() function now supports lazy allocation of the request
> structure. That is, if one is passed in then that will be used. If one is not,
> then a request will be allocated and passed back out. Note that the _sync() code
> does not necessarily require a request. Thus one will only be created until
> certain situations. The reason the lazy allocation must be done within the
> _sync() code itself is because the decision to need one or not is not really
> something that code above can second guess (except in the case where one is
> definitely not required because no ring is passed in).
>
> The call chains above _sync() now support passing a request through which most
> callers passing in NULL and assuming that no request will be required (because
> they also pass in NULL for the ring and therefore can't be generating any ring
> code).
>
> The exeception is intel_crtc_page_flip() which now supports having a request
> returned from _sync(). If one is, then that request is shared by the page flip
> (if the page flip is of a type to need a request). If _sync() does not generate
> a request but the page flip does need one, then the page flip path will create
> it's own request.

Nitpick: "it's own request" -> "its own request"

>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    6 ++++--
>   drivers/gpu/drm/i915/i915_gem.c            |   19 ++++++++++++++++---
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
>   drivers/gpu/drm/i915/intel_display.c       |   17 ++++++++++++-----
>   drivers/gpu/drm/i915/intel_drv.h           |    3 ++-
>   drivers/gpu/drm/i915/intel_fbdev.c         |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c           |    2 +-
>   drivers/gpu/drm/i915/intel_overlay.c       |    2 +-
>   8 files changed, 38 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ca070d3..55d82a7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2665,7 +2665,8 @@ static inline void i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
>
>   int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
>   int i915_gem_object_sync(struct drm_i915_gem_object *obj,
> -			 struct intel_engine_cs *to);
> +			 struct intel_engine_cs *to,
> +			 struct drm_i915_gem_request **to_req);
>   void i915_vma_move_to_active(struct i915_vma *vma,
>   			     struct intel_engine_cs *ring);
>   int i915_gem_dumb_create(struct drm_file *file_priv,
> @@ -2773,7 +2774,8 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write);
>   int __must_check
>   i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>   				     u32 alignment,
> -				     struct intel_engine_cs *pipelined);
> +				     struct intel_engine_cs *pipelined,
> +				     struct drm_i915_gem_request **pipelined_request);
>   void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj);
>   int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj,
>   				int align);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 0a25461..9114071 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2957,6 +2957,9 @@ out:
>    *
>    * @obj: object which may be in use on another ring.
>    * @to: ring we wish to use the object on. May be NULL.
> + * @to_req: request we wish to use the object for. May be NULL.

to_req may only be NULL if to is NULL. And to may only be NULL if to_req 
is NULL.

> + *          This will be allocated and returned if a request is
> + *          required but not passed in.

"This will be allocated and returned if a request is required but not 
passed in" sounds like to_req is NULL. However, what we mean here is 
that *to_req is NULL. And that can coincide with to not being NULL.
So together with the relationship between to_req and to described in my 
remark above this adds another level of complexity.

Could we perhaps formulate the full extent of the NULLability of these 
parameters in a consistent way instead of two arbitrary sentences? Like 
something along the lines of:

- to can be NULL if to_req is NULL
- to_req can be NULL if to is NULL
- If *to_req is NULL it may be allocated and returned.

Thanks,
Tomas

>    *
>    * This code is meant to abstract object synchronization with the GPU.
>    * Calling with NULL implies synchronizing the object with the CPU
> @@ -2966,7 +2969,8 @@ out:
>    */
>   int
>   i915_gem_object_sync(struct drm_i915_gem_object *obj,
> -		     struct intel_engine_cs *to)
> +		     struct intel_engine_cs *to,
> +		     struct drm_i915_gem_request **to_req)
>   {
>   	struct intel_engine_cs *from;
>   	u32 seqno;
> @@ -2980,6 +2984,8 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
>   	if (to == NULL || !i915_semaphore_is_enabled(obj->base.dev))
>   		return i915_gem_object_wait_rendering(obj, false);
>
> +	WARN_ON(!to_req);
> +
>   	idx = intel_ring_sync_index(from, to);
>
>   	seqno = i915_gem_request_get_seqno(obj->last_read_req);
> @@ -2988,6 +2994,12 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
>   	if (seqno <= from->semaphore.sync_seqno[idx])
>   		return 0;
>
> +	if (*to_req == NULL) {
> +		ret = i915_gem_request_alloc(to, to->default_context, to_req);
> +		if (ret)
> +			return ret;
> +	}
> +
>   	ret = i915_gem_check_olr(obj->last_read_req);
>   	if (ret)
>   		return ret;
> @@ -3953,14 +3965,15 @@ static bool is_pin_display(struct drm_i915_gem_object *obj)
>   int
>   i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>   				     u32 alignment,
> -				     struct intel_engine_cs *pipelined)
> +				     struct intel_engine_cs *pipelined,
> +				     struct drm_i915_gem_request **pipelined_request)
>   {
>   	u32 old_read_domains, old_write_domain;
>   	bool was_pin_display;
>   	int ret;
>
>   	if (pipelined != i915_gem_request_get_ring(obj->last_read_req)) {
> -		ret = i915_gem_object_sync(obj, pipelined);
> +		ret = i915_gem_object_sync(obj, pipelined, pipelined_request);
>   		if (ret)
>   			return ret;
>   	}
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index eca88a6..1978f9c 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -902,7 +902,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
>
>   	list_for_each_entry(vma, vmas, exec_list) {
>   		struct drm_i915_gem_object *obj = vma->obj;
> -		ret = i915_gem_object_sync(obj, req->ring);
> +		ret = i915_gem_object_sync(obj, req->ring, &req);
>   		if (ret)
>   			return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f1c0295..c71c523 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2245,7 +2245,8 @@ intel_fb_align_height(struct drm_device *dev, int height,
>   int
>   intel_pin_and_fence_fb_obj(struct drm_plane *plane,
>   			   struct drm_framebuffer *fb,
> -			   struct intel_engine_cs *pipelined)
> +			   struct intel_engine_cs *pipelined,
> +			   struct drm_i915_gem_request **pipelined_request)
>   {
>   	struct drm_device *dev = fb->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -2304,7 +2305,7 @@ intel_pin_and_fence_fb_obj(struct drm_plane *plane,
>   	intel_runtime_pm_get(dev_priv);
>
>   	dev_priv->mm.interruptible = false;
> -	ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined);
> +	ret = i915_gem_object_pin_to_display_plane(obj, alignment, pipelined, pipelined_request);
>   	if (ret)
>   		goto err_interruptible;
>
> @@ -9882,6 +9883,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>   	enum pipe pipe = intel_crtc->pipe;
>   	struct intel_unpin_work *work;
>   	struct intel_engine_cs *ring;
> +	struct drm_i915_gem_request *request = NULL;
>   	int ret;
>
>   	/*
> @@ -9979,7 +9981,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>   		ring = &dev_priv->ring[RCS];
>   	}
>
> -	ret = intel_pin_and_fence_fb_obj(crtc->primary, fb, ring);
> +	ret = intel_pin_and_fence_fb_obj(crtc->primary, fb, ring, &request);
>   	if (ret)
>   		goto cleanup_pending;
>
> @@ -10004,6 +10006,9 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>   					intel_ring_get_request(ring));
>   	}
>
> +	if (request)
> +		i915_add_request_no_flush(request->ring);
> +
>   	work->flip_queued_vblank = drm_crtc_vblank_count(crtc);
>   	work->enable_stall_check = true;
>
> @@ -10021,6 +10026,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>   cleanup_unpin:
>   	intel_unpin_fb_obj(obj);
>   cleanup_pending:
> +	if (request)
> +		i915_gem_request_cancel(request);
>   	atomic_dec(&intel_crtc->unpin_work_count);
>   	mutex_unlock(&dev->struct_mutex);
>   cleanup:
> @@ -11975,7 +11982,7 @@ intel_prepare_plane_fb(struct drm_plane *plane,
>   		if (ret)
>   			DRM_DEBUG_KMS("failed to attach phys object\n");
>   	} else {
> -		ret = intel_pin_and_fence_fb_obj(plane, fb, NULL);
> +		ret = intel_pin_and_fence_fb_obj(plane, fb, NULL, NULL);
>   	}
>
>   	if (ret == 0)
> @@ -13900,7 +13907,7 @@ void intel_modeset_gem_init(struct drm_device *dev)
>
>   		if (intel_pin_and_fence_fb_obj(c->primary,
>   					       c->primary->fb,
> -					       NULL)) {
> +					       NULL, NULL)) {
>   			DRM_ERROR("failed to pin boot fb on pipe %d\n",
>   				  to_intel_crtc(c)->pipe);
>   			drm_framebuffer_unreference(c->primary->fb);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 8bb18e5..6ad2823 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -961,7 +961,8 @@ void intel_release_load_detect_pipe(struct drm_connector *connector,
>   				    struct intel_load_detect_pipe *old);
>   int intel_pin_and_fence_fb_obj(struct drm_plane *plane,
>   			       struct drm_framebuffer *fb,
> -			       struct intel_engine_cs *pipelined);
> +			       struct intel_engine_cs *pipelined,
> +			       struct drm_i915_gem_request **pipelined_request);
>   struct drm_framebuffer *
>   __intel_framebuffer_create(struct drm_device *dev,
>   			   struct drm_mode_fb_cmd2 *mode_cmd,
> diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
> index 757c0d2..4e7e7da 100644
> --- a/drivers/gpu/drm/i915/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/intel_fbdev.c
> @@ -151,7 +151,7 @@ static int intelfb_alloc(struct drm_fb_helper *helper,
>   	}
>
>   	/* Flush everything out, we'll be doing GTT only from now on */
> -	ret = intel_pin_and_fence_fb_obj(NULL, fb, NULL);
> +	ret = intel_pin_and_fence_fb_obj(NULL, fb, NULL, NULL);
>   	if (ret) {
>   		DRM_ERROR("failed to pin obj: %d\n", ret);
>   		goto out_fb;
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 0480ad4..93faf11 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -590,7 +590,7 @@ static int execlists_move_to_gpu(struct drm_i915_gem_request *req,
>   	list_for_each_entry(vma, vmas, exec_list) {
>   		struct drm_i915_gem_object *obj = vma->obj;
>
> -		ret = i915_gem_object_sync(obj, req->ring);
> +		ret = i915_gem_object_sync(obj, req->ring, &req);
>   		if (ret)
>   			return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index 6af2581..ce7797c 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -720,7 +720,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
>   	if (ret != 0)
>   		return ret;
>
> -	ret = i915_gem_object_pin_to_display_plane(new_bo, 0, NULL);
> +	ret = i915_gem_object_pin_to_display_plane(new_bo, 0, NULL, NULL);
>   	if (ret != 0)
>   		return ret;
>
>

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Re: [PATCH 29/59] drm/i915: Update overlay code to do explicit request management

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The overlay update code path to do explicit request creation and submission
> rather than relying on the OLR to do the right thing.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_overlay.c |   56 +++++++++++++++++++++++++---------
>   1 file changed, 41 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index ce7797c..090fedd 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -209,17 +209,15 @@ static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
>   }
>
>   static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
> +					 struct drm_i915_gem_request *req,
>   					 void (*tail)(struct intel_overlay *))
>   {
>   	struct drm_device *dev = overlay->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
>   	int ret;
>
>   	BUG_ON(overlay->last_flip_req);
> -	i915_gem_request_assign(&overlay->last_flip_req,
> -					     ring->outstanding_lazy_request);
> -	i915_add_request(ring);
> +	i915_gem_request_assign(&overlay->last_flip_req, req);
> +	i915_add_request(req->ring);
>
>   	overlay->flip_tail = tail;
>   	ret = i915_wait_request(overlay->last_flip_req);
> @@ -237,6 +235,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
>   	struct drm_device *dev = overlay->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
> +	struct drm_i915_gem_request *req;
>   	int ret;
>
>   	BUG_ON(overlay->active);
> @@ -244,17 +243,23 @@ static int intel_overlay_on(struct intel_overlay *overlay)
>
>   	WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
>   	if (ret)
>   		return ret;
>
> +	ret = intel_ring_begin(ring, 4);
> +	if (ret) {
> +		i915_gem_request_cancel(req);
> +		return ret;
> +	}
> +
>   	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_ON);
>   	intel_ring_emit(ring, overlay->flip_addr | OFC_UPDATE);
>   	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
>   	intel_ring_emit(ring, MI_NOOP);
>   	intel_ring_advance(ring);
>
> -	return intel_overlay_do_wait_request(overlay, NULL);
> +	return intel_overlay_do_wait_request(overlay, req, NULL);
>   }
>
>   /* overlay needs to be enabled in OCMD reg */
> @@ -264,6 +269,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
>   	struct drm_device *dev = overlay->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
> +	struct drm_i915_gem_request *req;
>   	u32 flip_addr = overlay->flip_addr;
>   	u32 tmp;
>   	int ret;
> @@ -278,18 +284,23 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
>   	if (tmp & (1 << 17))
>   		DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp);
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
>   	if (ret)
>   		return ret;
>
> +	ret = intel_ring_begin(ring, 2);
> +	if (ret) {
> +		i915_gem_request_cancel(req);
> +		return ret;
> +	}
> +
>   	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
>   	intel_ring_emit(ring, flip_addr);
>   	intel_ring_advance(ring);
>
>   	WARN_ON(overlay->last_flip_req);
> -	i915_gem_request_assign(&overlay->last_flip_req,
> -					     ring->outstanding_lazy_request);
> -	i915_add_request(ring);
> +	i915_gem_request_assign(&overlay->last_flip_req, req);
> +	i915_add_request(req->ring);
>
>   	return 0;
>   }
> @@ -326,6 +337,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
>   	struct drm_device *dev = overlay->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_engine_cs *ring = &dev_priv->ring[RCS];
> +	struct drm_i915_gem_request *req;
>   	u32 flip_addr = overlay->flip_addr;
>   	int ret;
>
> @@ -337,10 +349,16 @@ static int intel_overlay_off(struct intel_overlay *overlay)
>   	 * of the hw. Do it in both cases */
>   	flip_addr |= OFC_UPDATE;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
>   	if (ret)
>   		return ret;
>
> +	ret = intel_ring_begin(ring, 6);
> +	if (ret) {
> +		i915_gem_request_cancel(req);
> +		return ret;
> +	}
> +
>   	/* wait for overlay to go idle */
>   	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE);
>   	intel_ring_emit(ring, flip_addr);
> @@ -359,7 +377,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
>   	}
>   	intel_ring_advance(ring);
>
> -	return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail);
> +	return intel_overlay_do_wait_request(overlay, req, intel_overlay_off_tail);
>   }
>
>   /* recover from an interruption due to a signal
> @@ -404,15 +422,23 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
>
>   	if (I915_READ(ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT) {
>   		/* synchronous slowpath */
> -		ret = intel_ring_begin(ring, 2);
> +		struct drm_i915_gem_request *req;
> +
> +		ret = i915_gem_request_alloc(ring, ring->default_context, &req);
>   		if (ret)
>   			return ret;
>
> +		ret = intel_ring_begin(ring, 2);
> +		if (ret) {
> +			i915_gem_request_cancel(req);
> +			return ret;
> +		}
> +
>   		intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
>   		intel_ring_emit(ring, MI_NOOP);
>   		intel_ring_advance(ring);
>
> -		ret = intel_overlay_do_wait_request(overlay,
> +		ret = intel_overlay_do_wait_request(overlay, req,
>   						    intel_overlay_release_old_vid_tail);
>   		if (ret)
>   			return ret;
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 30/59] drm/i915: Update queue_flip() to take a request structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the display page flip code to do explicit request creation and
> submission rather than relying on the OLR and just hoping that the request
> actually gets submitted at some random point.
>
> The sequence is now to create a request, queue the work to the ring, assign the
> known request to the flip queue work item then actually submit the work and post
> the request.
>
> Note that every single flip function used to finish with
> '__intel_ring_advance(ring);'. However, immediately after they return there is
> now an add request call which will do the advance anyway. Thus the many
> duplicate advance calls have been removed.
>
> v2: Updated commit message with comment about advance removal.
>
> v3: The request can now be allocated by the _sync() code earlier on. Thus the
> page flip path does not necessarily need to allocate a new request, it may be
> able to re-use one.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h         |    2 +-
>   drivers/gpu/drm/i915/intel_display.c    |   33 ++++++++++++++++++-------------
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    2 +-
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    1 -
>   4 files changed, 21 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 55d82a7..1fd59bc 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -574,7 +574,7 @@ struct drm_i915_display_funcs {
>   	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
>   			  struct drm_framebuffer *fb,
>   			  struct drm_i915_gem_object *obj,
> -			  struct intel_engine_cs *ring,
> +			  struct drm_i915_gem_request *req,
>   			  uint32_t flags);
>   	void (*update_primary_plane)(struct drm_crtc *crtc,
>   				     struct drm_framebuffer *fb,
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c71c523..c39cd34 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9418,9 +9418,10 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	u32 flip_mask;
>   	int ret;
> @@ -9445,7 +9446,6 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, 0); /* aux display base address, unused */
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9453,9 +9453,10 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	u32 flip_mask;
>   	int ret;
> @@ -9477,7 +9478,6 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, MI_NOOP);
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9485,9 +9485,10 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	uint32_t pf, pipesrc;
> @@ -9516,7 +9517,6 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, pf | pipesrc);
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9524,9 +9524,10 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	uint32_t pf, pipesrc;
> @@ -9552,7 +9553,6 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, pf | pipesrc);
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9560,9 +9560,10 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
>   				 struct drm_crtc *crtc,
>   				 struct drm_framebuffer *fb,
>   				 struct drm_i915_gem_object *obj,
> -				 struct intel_engine_cs *ring,
> +				 struct drm_i915_gem_request *req,
>   				 uint32_t flags)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>   	uint32_t plane_bit = 0;
>   	int len, ret;
> @@ -9647,7 +9648,6 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
>   	intel_ring_emit(ring, (MI_NOOP));
>
>   	intel_mark_page_flip_active(intel_crtc);
> -	__intel_ring_advance(ring);
>   	return 0;
>   }
>
> @@ -9803,7 +9803,7 @@ static int intel_default_queue_flip(struct drm_device *dev,
>   				    struct drm_crtc *crtc,
>   				    struct drm_framebuffer *fb,
>   				    struct drm_i915_gem_object *obj,
> -				    struct intel_engine_cs *ring,
> +				    struct drm_i915_gem_request *req,
>   				    uint32_t flags)
>   {
>   	return -ENODEV;
> @@ -9997,13 +9997,18 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
>   		i915_gem_request_assign(&work->flip_queued_req,
>   					obj->last_write_req);
>   	} else {
> -		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, ring,
> +		if (!request) {
> +			ret = i915_gem_request_alloc(ring, ring->default_context, &request);
> +			if (ret)
> +				goto cleanup_unpin;
> +		}
> +
> +		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, request,
>   						   page_flip_flags);
>   		if (ret)
>   			goto cleanup_unpin;
>
> -		i915_gem_request_assign(&work->flip_queued_req,
> -					intel_ring_get_request(ring));
> +		i915_gem_request_assign(&work->flip_queued_req, request);
>   	}
>
>   	if (request)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 291920e..8a55032 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -81,7 +81,7 @@ bool intel_ring_stopped(struct intel_engine_cs *ring)
>   	return dev_priv->gpu_error.stop_rings & intel_ring_flag(ring);
>   }
>
> -void __intel_ring_advance(struct intel_engine_cs *ring)
> +static void __intel_ring_advance(struct intel_engine_cs *ring)
>   {
>   	struct intel_ringbuffer *ringbuf = ring->buffer;
>   	ringbuf->tail &= ringbuf->size - 1;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 2dc111c..5fac101 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -412,7 +412,6 @@ int __intel_ring_space(int head, int tail, int size);
>   void intel_ring_update_space(struct intel_ringbuffer *ringbuf);
>   int intel_ring_space(struct intel_ringbuffer *ringbuf);
>   bool intel_ring_stopped(struct intel_engine_cs *ring);
> -void __intel_ring_advance(struct intel_engine_cs *ring);
>
>   int __must_check intel_ring_idle(struct intel_engine_cs *ring);
>   void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 38/59] drm/i915: Update switch_mm() to take a request structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the switch_mm() code paths to take a request instead of a ring. This
> includes the myriad *_mm_switch functions themselves and a bunch of PDP related
> helper functions.
>
> v2: Rebased to newer tree.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
>   drivers/gpu/drm/i915/i915_gem_gtt.c     |   23 ++++++++++++++---------
>   drivers/gpu/drm/i915/i915_gem_gtt.h     |    2 +-
>   3 files changed, 16 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index f615fca..35116d3 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -595,7 +595,7 @@ static int do_switch(struct drm_i915_gem_request *req)
>
>   	if (to->ppgtt) {
>   		trace_switch_mm(ring, to);
> -		ret = to->ppgtt->switch_mm(to->ppgtt, ring);
> +		ret = to->ppgtt->switch_mm(to->ppgtt, req);
>   		if (ret)
>   			goto unpin_out;
>   	}
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index ac63572..96fd8e0 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -374,9 +374,10 @@ static struct i915_page_directory_entry *alloc_pd_single(void)
>   }
>
>   /* Broadwell Page Directory Pointer Descriptors */
> -static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
> -			   uint64_t val)
> +static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
> +			  uint64_t val)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	BUG_ON(entry >= 4);
> @@ -397,7 +398,7 @@ static int gen8_write_pdp(struct intel_engine_cs *ring, unsigned entry,
>   }
>
>   static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			  struct intel_engine_cs *ring)
> +			  struct drm_i915_gem_request *req)
>   {
>   	int i, ret;
>
> @@ -406,7 +407,7 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
>
>   	for (i = used_pd - 1; i >= 0; i--) {
>   		dma_addr_t addr = ppgtt->pdp.page_directory[i]->daddr;
> -		ret = gen8_write_pdp(ring, i, addr);
> +		ret = gen8_write_pdp(req, i, addr);
>   		if (ret)
>   			return ret;
>   	}
> @@ -878,8 +879,9 @@ static uint32_t get_pd_offset(struct i915_hw_ppgtt *ppgtt)
>   }
>
>   static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			 struct intel_engine_cs *ring)
> +			 struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	/* NB: TLBs must be flushed and invalidated before a switch */
> @@ -903,8 +905,9 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   }
>
>   static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			  struct intel_engine_cs *ring)
> +			  struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev);
>
>   	I915_WRITE(RING_PP_DIR_DCLV(ring), PP_DIR_DCLV_2G);
> @@ -913,8 +916,9 @@ static int vgpu_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   }
>
>   static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			  struct intel_engine_cs *ring)
> +			  struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	/* NB: TLBs must be flushed and invalidated before a switch */
> @@ -945,8 +949,9 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   }
>
>   static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
> -			  struct intel_engine_cs *ring)
> +			  struct drm_i915_gem_request *req)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_device *dev = ppgtt->base.dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>
> @@ -1312,7 +1317,7 @@ int i915_ppgtt_init_ring(struct drm_i915_gem_request *req)
>   	if (!ppgtt)
>   		return 0;
>
> -	return ppgtt->switch_mm(ppgtt, req->ring);
> +	return ppgtt->switch_mm(ppgtt, req);
>   }
>
>   struct i915_hw_ppgtt *
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index d4c7184..8490ff5 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -300,7 +300,7 @@ struct i915_hw_ppgtt {
>
>   	int (*enable)(struct i915_hw_ppgtt *ppgtt);
>   	int (*switch_mm)(struct i915_hw_ppgtt *ppgtt,
> -			 struct intel_engine_cs *ring);
> +			 struct drm_i915_gem_request *req);
>   	void (*debug_dump)(struct i915_hw_ppgtt *ppgtt, struct seq_file *m);
>   };
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 39/59] drm/i915: Update ring->flush() to take a requests structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Udpated the various ring->flush() functions to take a request instead of a ring.

Nitpick: "Udpated" -> "Updated".

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

> Also updated the tracer to include the request id.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem_context.c |    2 +-
>   drivers/gpu/drm/i915/i915_gem_gtt.c     |    6 +++---
>   drivers/gpu/drm/i915/i915_trace.h       |   14 +++++++------
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   34 +++++++++++++++++++------------
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
>   5 files changed, 34 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 35116d3..2c94c88 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -493,7 +493,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
>   	 * itlb_before_ctx_switch.
>   	 */
>   	if (IS_GEN6(ring->dev)) {
> -		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
> +		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, 0);
>   		if (ret)
>   			return ret;
>   	}
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 96fd8e0..5822429 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -885,7 +885,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	int ret;
>
>   	/* NB: TLBs must be flushed and invalidated before a switch */
> -	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
> +	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
>   	if (ret)
>   		return ret;
>
> @@ -922,7 +922,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	int ret;
>
>   	/* NB: TLBs must be flushed and invalidated before a switch */
> -	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
> +	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
>   	if (ret)
>   		return ret;
>
> @@ -940,7 +940,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
>
>   	/* XXX: RCS is the only one to auto invalidate the TLBs? */
>   	if (ring->id != RCS) {
> -		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
> +		ret = ring->flush(req, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
>   		if (ret)
>   			return ret;
>   	}
> diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
> index f004d3d..f044e29 100644
> --- a/drivers/gpu/drm/i915/i915_trace.h
> +++ b/drivers/gpu/drm/i915/i915_trace.h
> @@ -377,25 +377,27 @@ TRACE_EVENT(i915_gem_ring_dispatch,
>   );
>
>   TRACE_EVENT(i915_gem_ring_flush,
> -	    TP_PROTO(struct intel_engine_cs *ring, u32 invalidate, u32 flush),
> -	    TP_ARGS(ring, invalidate, flush),
> +	    TP_PROTO(struct drm_i915_gem_request *req, u32 invalidate, u32 flush),
> +	    TP_ARGS(req, invalidate, flush),
>
>   	    TP_STRUCT__entry(
>   			     __field(u32, dev)
>   			     __field(u32, ring)
> +			     __field(u32, uniq)
>   			     __field(u32, invalidate)
>   			     __field(u32, flush)
>   			     ),
>
>   	    TP_fast_assign(
> -			   __entry->dev = ring->dev->primary->index;
> -			   __entry->ring = ring->id;
> +			   __entry->dev = req->ring->dev->primary->index;
> +			   __entry->ring = req->ring->id;
> +			   __entry->uniq = req->uniq;
>   			   __entry->invalidate = invalidate;
>   			   __entry->flush = flush;
>   			   ),
>
> -	    TP_printk("dev=%u, ring=%x, invalidate=%04x, flush=%04x",
> -		      __entry->dev, __entry->ring,
> +	    TP_printk("dev=%u, ring=%x, request=%u, invalidate=%04x, flush=%04x",
> +		      __entry->dev, __entry->ring, __entry->uniq,
>   		      __entry->invalidate, __entry->flush)
>   );
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index b7646b7..a29fa40 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -91,10 +91,11 @@ static void __intel_ring_advance(struct intel_engine_cs *ring)
>   }
>
>   static int
> -gen2_render_ring_flush(struct intel_engine_cs *ring,
> +gen2_render_ring_flush(struct drm_i915_gem_request *req,
>   		       u32	invalidate_domains,
>   		       u32	flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 cmd;
>   	int ret;
>
> @@ -117,10 +118,11 @@ gen2_render_ring_flush(struct intel_engine_cs *ring,
>   }
>
>   static int
> -gen4_render_ring_flush(struct intel_engine_cs *ring,
> +gen4_render_ring_flush(struct drm_i915_gem_request *req,
>   		       u32	invalidate_domains,
>   		       u32	flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_device *dev = ring->dev;
>   	u32 cmd;
>   	int ret;
> @@ -247,9 +249,10 @@ intel_emit_post_sync_nonzero_flush(struct intel_engine_cs *ring)
>   }
>
>   static int
> -gen6_render_ring_flush(struct intel_engine_cs *ring,
> -                         u32 invalidate_domains, u32 flush_domains)
> +gen6_render_ring_flush(struct drm_i915_gem_request *req,
> +		       u32 invalidate_domains, u32 flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 flags = 0;
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
> @@ -318,9 +321,10 @@ gen7_render_ring_cs_stall_wa(struct intel_engine_cs *ring)
>   }
>
>   static int
> -gen7_render_ring_flush(struct intel_engine_cs *ring,
> +gen7_render_ring_flush(struct drm_i915_gem_request *req,
>   		       u32 invalidate_domains, u32 flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 flags = 0;
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
> @@ -400,9 +404,10 @@ gen8_emit_pipe_control(struct intel_engine_cs *ring,
>   }
>
>   static int
> -gen8_render_ring_flush(struct intel_engine_cs *ring,
> +gen8_render_ring_flush(struct drm_i915_gem_request *req,
>   		       u32 invalidate_domains, u32 flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	u32 flags = 0;
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
> @@ -1545,10 +1550,11 @@ i8xx_ring_put_irq(struct intel_engine_cs *ring)
>   }
>
>   static int
> -bsd_ring_flush(struct intel_engine_cs *ring,
> +bsd_ring_flush(struct drm_i915_gem_request *req,
>   	       u32     invalidate_domains,
>   	       u32     flush_domains)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
>   	ret = intel_ring_begin(ring, 2);
> @@ -2351,9 +2357,10 @@ static void gen6_bsd_ring_write_tail(struct intel_engine_cs *ring,
>   		   _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
>   }
>
> -static int gen6_bsd_ring_flush(struct intel_engine_cs *ring,
> +static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
>   			       u32 invalidate, u32 flush)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	uint32_t cmd;
>   	int ret;
>
> @@ -2463,9 +2470,10 @@ gen6_ring_dispatch_execbuffer(struct intel_engine_cs *ring,
>
>   /* Blitter support (SandyBridge+) */
>
> -static int gen6_ring_flush(struct intel_engine_cs *ring,
> +static int gen6_ring_flush(struct drm_i915_gem_request *req,
>   			   u32 invalidate, u32 flush)
>   {
> +	struct intel_engine_cs *ring = req->ring;
>   	struct drm_device *dev = ring->dev;
>   	uint32_t cmd;
>   	int ret;
> @@ -2879,11 +2887,11 @@ intel_ring_flush_all_caches(struct drm_i915_gem_request *req)
>   	if (!ring->gpu_caches_dirty)
>   		return 0;
>
> -	ret = ring->flush(ring, 0, I915_GEM_GPU_DOMAINS);
> +	ret = ring->flush(req, 0, I915_GEM_GPU_DOMAINS);
>   	if (ret)
>   		return ret;
>
> -	trace_i915_gem_ring_flush(ring, 0, I915_GEM_GPU_DOMAINS);
> +	trace_i915_gem_ring_flush(req, 0, I915_GEM_GPU_DOMAINS);
>
>   	ring->gpu_caches_dirty = false;
>   	return 0;
> @@ -2900,11 +2908,11 @@ intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req)
>   	if (ring->gpu_caches_dirty)
>   		flush_domains = I915_GEM_GPU_DOMAINS;
>
> -	ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, flush_domains);
> +	ret = ring->flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
>   	if (ret)
>   		return ret;
>
> -	trace_i915_gem_ring_flush(ring, I915_GEM_GPU_DOMAINS, flush_domains);
> +	trace_i915_gem_ring_flush(req, I915_GEM_GPU_DOMAINS, flush_domains);
>
>   	ring->gpu_caches_dirty = false;
>   	return 0;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 2d059d1..55f6f35 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -150,7 +150,7 @@ struct  intel_engine_cs {
>
>   	void		(*write_tail)(struct intel_engine_cs *ring,
>   				      u32 value);
> -	int __must_check (*flush)(struct intel_engine_cs *ring,
> +	int __must_check (*flush)(struct drm_i915_gem_request *req,
>   				  u32	invalidate_domains,
>   				  u32	flush_domains);
>   	int		(*add_request)(struct intel_engine_cs *ring);
>

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Re: [PATCH 43/59] drm/i915: Update ring->emit_request() to take a request structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the ring->emit_request() implementation to take a request instead of a
> ringbuf/request pair. Also removed it's use of the OLR for obtaining the

Nitpick: "it's" -> "its"
I apparently already r-b:ed this patch. Oh well ;).

Thanks,
Tomas

> request's seqno.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> Reviewed-by: Tomas Elf <tomas.elf@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c         |    2 +-
>   drivers/gpu/drm/i915/intel_lrc.c        |    7 +++----
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    3 +--
>   3 files changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index dd5c1d8..881c6ea 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2378,7 +2378,7 @@ void __i915_add_request(struct drm_i915_gem_request *request,
>   	request->postfix = intel_ring_get_tail(ringbuf);
>
>   	if (i915.enable_execlists)
> -		ret = ring->emit_request(ringbuf, request);
> +		ret = ring->emit_request(request);
>   	else
>   		ret = ring->add_request(request);
>   	/* Not allowed to fail! */
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index ba49f50..24a4816 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1294,9 +1294,9 @@ static void gen8_set_seqno(struct intel_engine_cs *ring, u32 seqno)
>   	intel_write_status_page(ring, I915_GEM_HWS_INDEX, seqno);
>   }
>
> -static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
> -			     struct drm_i915_gem_request *request)
> +static int gen8_emit_request(struct drm_i915_gem_request *request)
>   {
> +	struct intel_ringbuffer *ringbuf = request->ringbuf;
>   	struct intel_engine_cs *ring = ringbuf->ring;
>   	u32 cmd;
>   	int ret;
> @@ -1313,8 +1313,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
>   				(ring->status_page.gfx_addr +
>   				(I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT)));
>   	intel_logical_ring_emit(ringbuf, 0);
> -	intel_logical_ring_emit(ringbuf,
> -		i915_gem_request_get_seqno(ring->outstanding_lazy_request));
> +	intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request));
>   	intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
>   	intel_logical_ring_emit(ringbuf, MI_NOOP);
>   	intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 9641634..87f3b60 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -236,8 +236,7 @@ struct  intel_engine_cs {
>   	struct list_head execlist_retired_req_list;
>   	u8 next_context_status_buffer;
>   	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
> -	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
> -					struct drm_i915_gem_request *request);
> +	int		(*emit_request)(struct drm_i915_gem_request *request);
>   	int		(*emit_flush)(struct drm_i915_gem_request *request,
>   				      u32 invalidate_domains,
>   				      u32 flush_domains);
>

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Re: [PATCH 46/59] drm/i915: Update ring->sync_to() to take a request structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Updated the ring->sync_to() implementations to take a request instead of a ring.
> Also updated the tracer to include the request id.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
>   drivers/gpu/drm/i915/i915_trace.h       |   14 ++++++++------
>   drivers/gpu/drm/i915/intel_ringbuffer.c |    6 ++++--
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    4 ++--
>   4 files changed, 16 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 881c6ea..7304290 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3003,8 +3003,8 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
>   	if (ret)
>   		return ret;
>
> -	trace_i915_gem_ring_sync_to(from, to, obj->last_read_req);
> -	ret = to->semaphore.sync_to(to, from, seqno);
> +	trace_i915_gem_ring_sync_to(*to_req, from, obj->last_read_req);
> +	ret = to->semaphore.sync_to(*to_req, from, seqno);
>   	if (!ret)
>   		/* We use last_read_req because sync_to()
>   		 * might have just caused seqno wrap under
> diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
> index f044e29..8ca536c 100644
> --- a/drivers/gpu/drm/i915/i915_trace.h
> +++ b/drivers/gpu/drm/i915/i915_trace.h
> @@ -326,29 +326,31 @@ TRACE_EVENT(i915_gem_evict_vm,
>   );
>
>   TRACE_EVENT(i915_gem_ring_sync_to,
> -	    TP_PROTO(struct intel_engine_cs *from,
> -		     struct intel_engine_cs *to,
> +	    TP_PROTO(struct drm_i915_gem_request *to_req,
> +		     struct intel_engine_cs *from,
>   		     struct drm_i915_gem_request *req),
> -	    TP_ARGS(from, to, req),
> +	    TP_ARGS(to_req, from, req),
>
>   	    TP_STRUCT__entry(
>   			     __field(u32, dev)
>   			     __field(u32, sync_from)
>   			     __field(u32, sync_to)
> +			     __field(u32, uniq_to)
>   			     __field(u32, seqno)
>   			     ),
>
>   	    TP_fast_assign(
>   			   __entry->dev = from->dev->primary->index;
>   			   __entry->sync_from = from->id;
> -			   __entry->sync_to = to->id;
> +			   __entry->sync_to = to_req->ring->id;
> +			   __entry->uniq_to = to_req->uniq;
>   			   __entry->seqno = i915_gem_request_get_seqno(req);
>   			   ),
>
> -	    TP_printk("dev=%u, sync-from=%u, sync-to=%u, seqno=%u",
> +	    TP_printk("dev=%u, sync-from=%u, sync-to=%u, seqno=%u, to_uniq=%u",
>   		      __entry->dev,
>   		      __entry->sync_from, __entry->sync_to,
> -		      __entry->seqno)
> +		      __entry->seqno, __entry->uniq_to)
>   );
>
>   TRACE_EVENT(i915_gem_ring_dispatch,
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 77d357f..2de43c8 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1284,10 +1284,11 @@ static inline bool i915_gem_has_seqno_wrapped(struct drm_device *dev,
>    */
>
>   static int
> -gen8_ring_sync(struct intel_engine_cs *waiter,
> +gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
>   	       struct intel_engine_cs *signaller,
>   	       u32 seqno)
>   {
> +	struct intel_engine_cs *waiter = waiter_req->ring;
>   	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
>   	int ret;
>
> @@ -1309,10 +1310,11 @@ gen8_ring_sync(struct intel_engine_cs *waiter,
>   }
>
>   static int
> -gen6_ring_sync(struct intel_engine_cs *waiter,
> +gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
>   	       struct intel_engine_cs *signaller,
>   	       u32 seqno)
>   {
> +	struct intel_engine_cs *waiter = waiter_req->ring;
>   	u32 dw1 = MI_SEMAPHORE_MBOX |
>   		  MI_SEMAPHORE_COMPARE |
>   		  MI_SEMAPHORE_REGISTER;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 2d1d8a6..1107f82 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -222,8 +222,8 @@ struct  intel_engine_cs {
>   		};
>
>   		/* AKA wait() */
> -		int	(*sync_to)(struct intel_engine_cs *ring,
> -				   struct intel_engine_cs *to,
> +		int	(*sync_to)(struct drm_i915_gem_request *to_req,
> +				   struct intel_engine_cs *from,
>   				   u32 seqno);
>   		int	(*signal)(struct intel_engine_cs *signaller,
>   				  /* num_dwords needed by caller */
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 49/59] drm/i915: Update intel_ring_begin() to take a request structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that everything above has been converted to use requests, intel_ring_begin()
> can be updated to take a request instead of a ring. This also means that it no
> longer needs to lazily allocate a request if no-one happens to have done it
> earlier.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c            |    2 +-
>   drivers/gpu/drm/i915/i915_gem_context.c    |    2 +-
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    8 +--
>   drivers/gpu/drm/i915/i915_gem_gtt.c        |    6 +--
>   drivers/gpu/drm/i915/intel_display.c       |   10 ++--
>   drivers/gpu/drm/i915/intel_overlay.c       |    8 +--
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |   74 ++++++++++++++--------------
>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    2 +-
>   8 files changed, 55 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 7304290..b047693 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4711,7 +4711,7 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
>   	if (!HAS_L3_DPF(dev) || !remap_info)
>   		return 0;
>
> -	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
> +	ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 2c94c88..369e58d 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -507,7 +507,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
>   	if (INTEL_INFO(ring->dev)->gen >= 7)
>   		len += 2 + (num_rings ? 4*num_rings + 2 : 0);
>
> -	ret = intel_ring_begin(ring, len);
> +	ret = intel_ring_begin(req, len);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index cb24ca7..9345db8 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1076,7 +1076,7 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev,
>   		return -EINVAL;
>   	}
>
> -	ret = intel_ring_begin(ring, 4 * 3);
> +	ret = intel_ring_begin(req, 4 * 3);
>   	if (ret)
>   		return ret;
>
> @@ -1107,7 +1107,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
>   	}
>
>   	if (INTEL_INFO(ring->dev)->gen >= 4) {
> -		ret = intel_ring_begin(ring, 4);
> +		ret = intel_ring_begin(req, 4);
>   		if (ret)
>   			return ret;
>
> @@ -1116,7 +1116,7 @@ i915_emit_box(struct drm_i915_gem_request *req,
>   		intel_ring_emit(ring, ((box->x2 - 1) & 0xffff) | (box->y2 - 1) << 16);
>   		intel_ring_emit(ring, DR4);
>   	} else {
> -		ret = intel_ring_begin(ring, 6);
> +		ret = intel_ring_begin(req, 6);
>   		if (ret)
>   			return ret;
>
> @@ -1287,7 +1287,7 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,
>
>   	if (ring == &dev_priv->ring[RCS] &&
>   			instp_mode != dev_priv->relative_constants_mode) {
> -		ret = intel_ring_begin(ring, 4);
> +		ret = intel_ring_begin(params->request, 4);
>   		if (ret)
>   			goto error;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 5822429..7b656c8 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -382,7 +382,7 @@ static int gen8_write_pdp(struct drm_i915_gem_request *req, unsigned entry,
>
>   	BUG_ON(entry >= 4);
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -889,7 +889,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -926,7 +926,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 277c73a..665e8cc 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9426,7 +9426,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
>   	u32 flip_mask;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -9461,7 +9461,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
>   	u32 flip_mask;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -9494,7 +9494,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
>   	uint32_t pf, pipesrc;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -9533,7 +9533,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
>   	uint32_t pf, pipesrc;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -9609,7 +9609,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, len);
> +	ret = intel_ring_begin(req, len);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
> index 9eea308..2ed4422 100644
> --- a/drivers/gpu/drm/i915/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/intel_overlay.c
> @@ -247,7 +247,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret) {
>   		i915_gem_request_cancel(req);
>   		return ret;
> @@ -288,7 +288,7 @@ static int intel_overlay_continue(struct intel_overlay *overlay,
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret) {
>   		i915_gem_request_cancel(req);
>   		return ret;
> @@ -353,7 +353,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret) {
>   		i915_gem_request_cancel(req);
>   		return ret;
> @@ -428,7 +428,7 @@ static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
>   		if (ret)
>   			return ret;
>
> -		ret = intel_ring_begin(ring, 2);
> +		ret = intel_ring_begin(req, 2);
>   		if (ret) {
>   			i915_gem_request_cancel(req);
>   			return ret;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 9cbc4ef..6f198df 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -106,7 +106,7 @@ gen2_render_ring_flush(struct drm_i915_gem_request *req,
>   	if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER)
>   		cmd |= MI_READ_FLUSH;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -165,7 +165,7 @@ gen4_render_ring_flush(struct drm_i915_gem_request *req,
>   	    (IS_G4X(dev) || IS_GEN5(dev)))
>   		cmd |= MI_INVALIDATE_ISP;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -220,8 +220,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
>   	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;
>   	int ret;
>
> -
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -234,7 +233,7 @@ intel_emit_post_sync_nonzero_flush(struct drm_i915_gem_request *req)
>   	intel_ring_emit(ring, MI_NOOP);
>   	intel_ring_advance(ring);
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -289,7 +288,7 @@ gen6_render_ring_flush(struct drm_i915_gem_request *req,
>   		flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL;
>   	}
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -308,7 +307,7 @@ gen7_render_ring_cs_stall_wa(struct drm_i915_gem_request *req)
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -371,7 +370,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
>   		gen7_render_ring_cs_stall_wa(req);
>   	}
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -391,7 +390,7 @@ gen8_emit_pipe_control(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -726,7 +725,7 @@ static int intel_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_ring_begin(ring, (w->count * 2 + 2));
> +	ret = intel_ring_begin(req, (w->count * 2 + 2));
>   	if (ret)
>   		return ret;
>
> @@ -1136,7 +1135,7 @@ static int gen8_rcs_signal(struct drm_i915_gem_request *signaller_req,
>   	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
>   #undef MBOX_UPDATE_DWORDS
>
> -	ret = intel_ring_begin(signaller, num_dwords);
> +	ret = intel_ring_begin(signaller_req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -1177,7 +1176,7 @@ static int gen8_xcs_signal(struct drm_i915_gem_request *signaller_req,
>   	num_dwords += (num_rings-1) * MBOX_UPDATE_DWORDS;
>   #undef MBOX_UPDATE_DWORDS
>
> -	ret = intel_ring_begin(signaller, num_dwords);
> +	ret = intel_ring_begin(signaller_req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -1216,7 +1215,7 @@ static int gen6_signal(struct drm_i915_gem_request *signaller_req,
>   	num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2);
>   #undef MBOX_UPDATE_DWORDS
>
> -	ret = intel_ring_begin(signaller, num_dwords);
> +	ret = intel_ring_begin(signaller_req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -1254,7 +1253,7 @@ gen6_add_request(struct drm_i915_gem_request *req)
>   	if (ring->semaphore.signal)
>   		ret = ring->semaphore.signal(req, 4);
>   	else
> -		ret = intel_ring_begin(ring, 4);
> +		ret = intel_ring_begin(req, 4);
>
>   	if (ret)
>   		return ret;
> @@ -1292,7 +1291,7 @@ gen8_ring_sync(struct drm_i915_gem_request *waiter_req,
>   	struct drm_i915_private *dev_priv = waiter->dev->dev_private;
>   	int ret;
>
> -	ret = intel_ring_begin(waiter, 4);
> +	ret = intel_ring_begin(waiter_req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1329,7 +1328,7 @@ gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
>
>   	WARN_ON(wait_mbox == MI_SEMAPHORE_SYNC_INVALID);
>
> -	ret = intel_ring_begin(waiter, 4);
> +	ret = intel_ring_begin(waiter_req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1374,7 +1373,7 @@ pc_render_add_request(struct drm_i915_gem_request *req)
>   	 * incoherence by flushing the 6 PIPE_NOTIFY buffers out to
>   	 * memory before requesting an interrupt.
>   	 */
> -	ret = intel_ring_begin(ring, 32);
> +	ret = intel_ring_begin(req, 32);
>   	if (ret)
>   		return ret;
>
> @@ -1559,7 +1558,7 @@ bsd_ring_flush(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -1575,7 +1574,7 @@ i9xx_add_request(struct drm_i915_gem_request *req)
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1720,7 +1719,7 @@ i965_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -1748,7 +1747,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	u32 cs_offset = ring->scratch.gtt_offset;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 6);
> +	ret = intel_ring_begin(req, 6);
>   	if (ret)
>   		return ret;
>
> @@ -1765,7 +1764,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   		if (len > I830_BATCH_LIMIT)
>   			return -ENOSPC;
>
> -		ret = intel_ring_begin(ring, 6 + 2);
> +		ret = intel_ring_begin(req, 6 + 2);
>   		if (ret)
>   			return ret;
>
> @@ -1788,7 +1787,7 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   		offset = cs_offset;
>   	}
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1810,7 +1809,7 @@ i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -2264,13 +2263,17 @@ static int __intel_ring_prepare(struct intel_engine_cs *ring, int bytes)
>   	return 0;
>   }
>
> -int intel_ring_begin(struct intel_engine_cs *ring,
> +int intel_ring_begin(struct drm_i915_gem_request *req,
>   		     int num_dwords)
>   {
> -	struct drm_i915_gem_request *req;
> -	struct drm_i915_private *dev_priv = ring->dev->dev_private;
> +	struct intel_engine_cs *ring;
> +	struct drm_i915_private *dev_priv;
>   	int ret;
>
> +	WARN_ON(req == NULL);
> +	ring = req->ring;
> +	dev_priv = ring->dev->dev_private;
> +
>   	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
>   				   dev_priv->mm.interruptible);
>   	if (ret)
> @@ -2280,11 +2283,6 @@ int intel_ring_begin(struct intel_engine_cs *ring,
>   	if (ret)
>   		return ret;
>
> -	/* Preallocate the olr before touching the ring */
> -	ret = i915_gem_request_alloc(ring, ring->default_context, &req);
> -	if (ret)
> -		return ret;
> -
>   	ring->buffer->space -= num_dwords * sizeof(uint32_t);
>   	return 0;
>   }
> @@ -2300,7 +2298,7 @@ int intel_ring_cacheline_align(struct drm_i915_gem_request *req)
>   		return 0;
>
>   	num_dwords = CACHELINE_BYTES / sizeof(uint32_t) - num_dwords;
> -	ret = intel_ring_begin(ring, num_dwords);
> +	ret = intel_ring_begin(req, num_dwords);
>   	if (ret)
>   		return ret;
>
> @@ -2370,7 +2368,7 @@ static int gen6_bsd_ring_flush(struct drm_i915_gem_request *req,
>   	uint32_t cmd;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -2417,7 +2415,7 @@ gen8_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   			!(dispatch_flags & I915_DISPATCH_SECURE);
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -2439,7 +2437,7 @@ hsw_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -2462,7 +2460,7 @@ gen6_ring_dispatch_execbuffer(struct drm_i915_gem_request *req,
>   	struct intel_engine_cs *ring = req->ring;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 2);
> +	ret = intel_ring_begin(req, 2);
>   	if (ret)
>   		return ret;
>
> @@ -2487,7 +2485,7 @@ static int gen6_ring_flush(struct drm_i915_gem_request *req,
>   	uint32_t cmd;
>   	int ret;
>
> -	ret = intel_ring_begin(ring, 4);
> +	ret = intel_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index e353531..f6ab6bb 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -391,7 +391,7 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring);
>
>   int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request);
>
> -int __must_check intel_ring_begin(struct intel_engine_cs *ring, int n);
> +int __must_check intel_ring_begin(struct drm_i915_gem_request *req, int n);
>   int __must_check intel_ring_cacheline_align(struct drm_i915_gem_request *req);
>   static inline void intel_ring_emit(struct intel_engine_cs *ring,
>   				   u32 data)
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 50/59] drm/i915: Update intel_logical_ring_begin() to take a request structure

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that everything above has been converted to use requests,
> intel_logical_ring_begin() can be updated to take a request instead of a
> ringbuf/context pair. This also means that it no longer needs to lazily allocate
> a request if no-one happens to have done it earlier.
>
> Note that this change makes the execlist signature the same as the legacy
> version. Thus the two functions could be merged into a ring->begin() wrapper if
> required.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c |   36 ++++++++++++++++--------------------
>   1 file changed, 16 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index cdbe514..c16d726 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -796,7 +796,7 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
>   /**
>    * intel_logical_ring_begin() - prepare the logical ringbuffer to accept some commands
>    *
> - * @ringbuf: Logical ringbuffer.
> + * @request: The request to start some new work for
>    * @num_dwords: number of DWORDs that we plan to write to the ringbuffer.
>    *
>    * The ringbuffer might not be ready to accept the commands right away (maybe it needs to
> @@ -806,30 +806,26 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
>    *
>    * Return: non-zero if the ringbuffer is not ready to be written to.
>    */
> -static int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
> -				    struct intel_context *ctx, int num_dwords)
> +static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
> +				    int num_dwords)
>   {
> -	struct drm_i915_gem_request *req;
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_device *dev = ring->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct drm_i915_private *dev_priv;
>   	int ret;
>
> +	WARN_ON(req == NULL);
> +	dev_priv = req->ring->dev->dev_private;
> +
>   	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
>   				   dev_priv->mm.interruptible);
>   	if (ret)
>   		return ret;
>
> -	ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
> -	if (ret)
> -		return ret;
> -
> -	/* Preallocate the olr before touching the ring */
> -	ret = i915_gem_request_alloc(ring, ctx, &req);
> +	ret = logical_ring_prepare(req->ringbuf, req->ctx,
> +				   num_dwords * sizeof(uint32_t));
>   	if (ret)
>   		return ret;
>
> -	ringbuf->space -= num_dwords * sizeof(uint32_t);
> +	req->ringbuf->space -= num_dwords * sizeof(uint32_t);
>   	return 0;
>   }
>
> @@ -915,7 +911,7 @@ int intel_execlists_submission(struct i915_execbuffer_params *params,
>
>   	if (ring == &dev_priv->ring[RCS] &&
>   	    instp_mode != dev_priv->relative_constants_mode) {
> -		ret = intel_logical_ring_begin(ringbuf, params->ctx, 4);
> +		ret = intel_logical_ring_begin(params->request, 4);
>   		if (ret)
>   			return ret;
>
> @@ -1071,7 +1067,7 @@ static int intel_logical_ring_workarounds_emit(struct drm_i915_gem_request *req)
>   	if (ret)
>   		return ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, req->ctx, w->count * 2 + 2);
> +	ret = intel_logical_ring_begin(req, w->count * 2 + 2);
>   	if (ret)
>   		return ret;
>
> @@ -1153,7 +1149,7 @@ static int gen8_emit_bb_start(struct drm_i915_gem_request *req,
>   	bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
>   	int ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, req->ctx, 4);
> +	ret = intel_logical_ring_begin(req, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1211,7 +1207,7 @@ static int gen8_emit_flush(struct drm_i915_gem_request *request,
>   	uint32_t cmd;
>   	int ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, request->ctx, 4);
> +	ret = intel_logical_ring_begin(request, 4);
>   	if (ret)
>   		return ret;
>
> @@ -1269,7 +1265,7 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
>   		flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
>   	}
>
> -	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
> +	ret = intel_logical_ring_begin(request, 6);
>   	if (ret)
>   		return ret;
>
> @@ -1301,7 +1297,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
>   	u32 cmd;
>   	int ret;
>
> -	ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
> +	ret = intel_logical_ring_begin(request, 6);
>   	if (ret)
>   		return ret;
>
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 51/59] drm/i915: Add *_ring_begin() to request allocation

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Now that the *_ring_begin() functions no longer call the request allocation
> code, it is finally safe for the request allocation code to call *_ring_begin().
> This is important to guarantee that the space reserved for the subsequent
> i915_add_request() call does actually get reserved.

This commit message could go into more detail regarding the fact that 
we've split the reserved_space_reserve function into two specific 
functions depending on submission mode.

>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c         |   16 ++++------------
>   drivers/gpu/drm/i915/intel_lrc.c        |   15 +++++++++++++++
>   drivers/gpu/drm/i915/intel_lrc.h        |    1 +
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   28 +++++++++++++++++-----------
>   drivers/gpu/drm/i915/intel_ringbuffer.h |    3 ++-
>   5 files changed, 39 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index b047693..fe2de21 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2561,19 +2561,11 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
>   	 * i915_add_request() call can't fail. Note that the reserve may need
>   	 * to be redone if the request is not actually submitted straight
>   	 * away, e.g. because a GPU scheduler has deferred it.
> -	 *
> -	 * Note further that this call merely notes the reserve request. A
> -	 * subsequent call to *_ring_begin() is required to actually ensure
> -	 * that the reservation is available. Without the begin, if the
> -	 * request creator immediately submitted the request without adding
> -	 * any commands to it then there might not actually be sufficient
> -	 * room for the submission commands. Unfortunately, the current
> -	 * *_ring_begin() implementations potentially call back here to
> -	 * i915_gem_request_alloc(). Thus calling _begin() here would lead to
> -	 * infinite recursion! Until that back call path is removed, it is
> -	 * necessary to do a manual _begin() outside.
>   	 */
> -	ret = intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
> +	if (i915.enable_execlists)
> +		ret = logical_ring_reserved_space_reserve(request);
> +	else
> +		ret = legacy_ring_reserved_space_reserve(request);
>   	if (ret) {
>   		/*
>   		 * At this point, the request is fully allocated even if not
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index c16d726..8cb34c6 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -829,6 +829,21 @@ static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
>   	return 0;
>   }
>
> +int logical_ring_reserved_space_reserve(struct drm_i915_gem_request *request)
> +{
> +	/*
> +	 * The first call merely notes the reserve request and is common for
> +	 * all back ends. The subsequent localised _begin() call actually
> +	 * ensures that the reservation is available. Without the begin, if
> +	 * the request creator immediately submitted the request without
> +	 * adding any commands to it then there might not actually be
> +	 * sufficient room for the submission commands.
> +	 */
> +	intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
> +
> +	return intel_logical_ring_begin(request, 0);
> +}
> +
>   /**
>    * execlists_submission() - submit a batchbuffer for execution, Execlists style
>    * @dev: DRM device.
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
> index 044c0e5..905a83e 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -37,6 +37,7 @@
>
>   /* Logical Rings */
>   int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request);
> +int logical_ring_reserved_space_reserve(struct drm_i915_gem_request *request);
>   void intel_logical_ring_stop(struct intel_engine_cs *ring);
>   void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
>   int intel_logical_rings_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 6f198df..c7dcabd 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2205,21 +2205,27 @@ int intel_ring_alloc_request_extras(struct drm_i915_gem_request *request)
>   	return 0;
>   }
>
> -int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
> +int legacy_ring_reserved_space_reserve(struct drm_i915_gem_request *request)

I'm not completely convinced of this naming convention. In the past when 
we've had to separate implementations based on legacy submission from 
implementations based on execlist submission we've followed the 
convention of intel_ring_* and intel_logical_ring_*. I realise that it 
might not have been very pretty to make this split and I realise that 
the reason we ended up with that convention was simply because we 
already had a bunch of (to be) legacy functions and we added the 
_logical_ring_* ones on top of it so that the legacy was implied and not 
explicitly stated in their respective names. However, now we have that 
convention so it would be nice if we could follow it at least until the 
day comes when we can remove all the legacy/execlists duplication or 
whatever we do in the end.

Could someone more familiar with i915 history tell me how this has been 
dealt with in the past when there's been legacy functions that have had 
to be separated from other flavors of the same functions? I cannot find 
a whole lot of "*_legacy_*" functions in the driver so I assume this is 
not a previously used naming convention. I'm open for other opinions on 
this matter that perhaps take i915 history into account. If there's 
historical precedence I'm willing to opt for it but personally I just 
feel like it's bad form to name something legacy_* since you might up 
end up with a situation where you have a lot of functions called 
legacy_* that have nothing to do with each other aside from the fact 
that they are legacy in relation to something else. The fact that they 
are named legacy_* could imply that they are somehow related (like 
intel_execlists_* functions are all related  in the way that they are 
all part of the execlist implementation).

Thanks,
Tomas

>   {
> -	/* NB: Until request management is fully tidied up and the OLR is
> -	 * removed, there are too many ways for get false hits on this
> -	 * anti-recursion check! */
> -	/*WARN_ON(ringbuf->reserved_size);*/
> +	/*
> +	 * The first call merely notes the reserve request and is common for
> +	 * all back ends. The subsequent localised _begin() call actually
> +	 * ensures that the reservation is available. Without the begin, if
> +	 * the request creator immediately submitted the request without
> +	 * adding any commands to it then there might not actually be
> +	 * sufficient room for the submission commands.
> +	 */
> +	intel_ring_reserved_space_reserve(request->ringbuf, MIN_SPACE_FOR_ADD_REQUEST);
> +
> +	return intel_ring_begin(request, 0);
> +}
> +
> +void intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size)
> +{
> +	WARN_ON(ringbuf->reserved_size);
>   	WARN_ON(ringbuf->reserved_in_use);
>
>   	ringbuf->reserved_size = size;
> -
> -	/*
> -	 * Really need to call _begin() here but that currently leads to
> -	 * recursion problems! So just return zero and hope for the best...
> -	 */
> -	return 0;
>   }
>
>   void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size)
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index f6ab6bb..365b98d 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -442,7 +442,8 @@ intel_ring_get_request(struct intel_engine_cs *ring)
>
>   #define MIN_SPACE_FOR_ADD_REQUEST	128
>
> -int intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size);
> +int legacy_ring_reserved_space_reserve(struct drm_i915_gem_request *request);
> +void intel_ring_reserved_space_reserve(struct intel_ringbuffer *ringbuf, int size);
>   void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size);
>   void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf);
>
>

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Re: [PATCH 53/59] drm/i915: Remove the now obsolete 'outstanding_lazy_request'

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The outstanding_lazy_request is no longer used anywhere in the driver.
> Everything that was looking at it now has a request explicitly passed in from on
> high. Everything that was relying upon it behind the scenes is now explicitly
> creating/passing/submitting it's own private request. Thus the OLR can be

Nitpick "it's own private request" : "it's" -> "its"

Also, there are references to outstanding lazy request in this commit 
even though we've removed OLR in it. However, those references get 
removed further down the patch series and they don't break anything so 
that's pretty much ok.


Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

> removed.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c            |   16 ++--------------
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    4 +---
>   drivers/gpu/drm/i915/intel_lrc.c           |    1 -
>   drivers/gpu/drm/i915/intel_ringbuffer.c    |    8 --------
>   drivers/gpu/drm/i915/intel_ringbuffer.h    |    4 ----
>   5 files changed, 3 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index fe2de21..9ff9bda 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1161,9 +1161,6 @@ i915_gem_check_olr(struct drm_i915_gem_request *req)
>   {
>   	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
>
> -	if (req == req->ring->outstanding_lazy_request)
> -		i915_add_request(req);
> -
>   	return 0;
>   }
>
> @@ -2344,8 +2341,6 @@ void __i915_add_request(struct drm_i915_gem_request *request,
>   	dev_priv = ring->dev->dev_private;
>   	ringbuf = request->ringbuf;
>
> -	WARN_ON(request != ring->outstanding_lazy_request);
> -
>   	/*
>   	 * To ensure that this call will not fail, space for it's emissions
>   	 * should already have been reserved in the ring buffer. Let the ring
> @@ -2412,7 +2407,6 @@ void __i915_add_request(struct drm_i915_gem_request *request,
>   	}
>
>   	trace_i915_gem_request_add(request);
> -	ring->outstanding_lazy_request = NULL;
>
>   	i915_queue_hangcheck(ring->dev);
>
> @@ -2526,8 +2520,7 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
>   	if (!req_out)
>   		return -EINVAL;
>
> -	if ((*req_out = ring->outstanding_lazy_request) != NULL)
> -		return 0;
> +	*req_out = NULL;
>
>   	request = kzalloc(sizeof(*request), GFP_KERNEL);
>   	if (request == NULL)
> @@ -2576,7 +2569,7 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
>   		return ret;
>   	}
>
> -	*req_out = ring->outstanding_lazy_request = request;
> +	*req_out = request;
>   	return 0;
>   }
>
> @@ -2671,9 +2664,6 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
>
>   		i915_gem_free_request(request);
>   	}
> -
> -	/* This may not have been flushed before the reset, so clean it now */
> -	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
>   }
>
>   void i915_gem_restore_fences(struct drm_device *dev)
> @@ -3131,8 +3121,6 @@ int i915_gpu_idle(struct drm_device *dev)
>   			i915_add_request_no_flush(req);
>   		}
>
> -		WARN_ON(ring->outstanding_lazy_request);
> -
>   		ret = intel_ring_idle(ring);
>   		if (ret)
>   			return ret;
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 9345db8..c512979 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1638,10 +1638,8 @@ err:
>   	 * must be freed again. If it was submitted then it is being tracked
>   	 * on the active request list and no clean up is required here.
>   	 */
> -	if (ret && params->request) {
> +	if (ret && params->request)
>   		i915_gem_request_cancel(params->request);
> -		ring->outstanding_lazy_request = NULL;
> -	}
>
>   	mutex_unlock(&dev->struct_mutex);
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 8cb34c6..60bcf9a 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1384,7 +1384,6 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
>
>   	intel_logical_ring_stop(ring);
>   	WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0);
> -	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
>
>   	if (ring->cleanup)
>   		ring->cleanup(ring);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index c7dcabd..c5752c4 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2051,7 +2051,6 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
>
>   	intel_unpin_ringbuffer_obj(ringbuf);
>   	intel_destroy_ringbuffer_obj(ringbuf);
> -	i915_gem_request_assign(&ring->outstanding_lazy_request, NULL);
>
>   	if (ring->cleanup)
>   		ring->cleanup(ring);
> @@ -2182,11 +2181,6 @@ int intel_ring_idle(struct intel_engine_cs *ring)
>   {
>   	struct drm_i915_gem_request *req;
>
> -	/* We need to add any requests required to flush the objects and ring */
> -	WARN_ON(ring->outstanding_lazy_request);
> -	if (ring->outstanding_lazy_request)
> -		i915_add_request(ring->outstanding_lazy_request);
> -
>   	/* Wait upon the last request to be completed */
>   	if (list_empty(&ring->request_list))
>   		return 0;
> @@ -2321,8 +2315,6 @@ void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno)
>   	struct drm_device *dev = ring->dev;
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>
> -	BUG_ON(ring->outstanding_lazy_request);
> -
>   	if (INTEL_INFO(dev)->gen == 6 || INTEL_INFO(dev)->gen == 7) {
>   		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
>   		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 3002338..68097c1 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -261,10 +261,6 @@ struct  intel_engine_cs {
>   	 */
>   	struct list_head request_list;
>
> -	/**
> -	 * Do we have some not yet emitted requests outstanding?
> -	 */
> -	struct drm_i915_gem_request *outstanding_lazy_request;
>   	bool gpu_caches_dirty;
>
>   	wait_queue_head_t irq_queue;
>

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Re: [PATCH 54/59] drm/i915: Move the request/file and request/pid association to creation time

[Tomas Elf]

On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> In _i915_add_request(), the request is associated with a userland client.
> Specifically it is linked to the 'file' structure and the current user process
> is recorded. One problem here is that the current user process is not
> necessarily the same as when the request was submitted to the driver. This is
> especially true when the GPU scheduler arrives and decouples driver submission
> from hardware submission. Note also that it is only in the case where the add
> request comes from an execbuff call that there is a client to associate. Any
> other add request call is kernel only so does not need to do it.
>
> This patch moves the client association into a separate function. This is then
> called from the execbuffer code path itself at a sensible time. It also removes
> the now redundant 'file' pointer from the add request parameter list.
>
> An extra cleanup of the client association is also added to the request clean up
> code for the eventuality where the request is killed after association but
> before being submitted (e.g. due to out of memory error somewhere). Once the
> submission has happened, the request is on the request list and the regular
> request list removal will clear the association. Note that this still needs to
> happen at this point in time because the request might be kept floating around
> much longer (due to someone holding a reference count) and the client should not
> be worrying about this request after it has been retired.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h            |    8 +++--
>   drivers/gpu/drm/i915/i915_gem.c            |   53 ++++++++++++++++++++--------
>   drivers/gpu/drm/i915/i915_gem_execbuffer.c |    6 +++-
>   3 files changed, 48 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 839c185..764ee4f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2127,6 +2127,9 @@ int i915_gem_request_alloc(struct intel_engine_cs *ring,
>   			   struct drm_i915_gem_request **req_out);
>   void i915_gem_request_cancel(struct drm_i915_gem_request *req);
>   void i915_gem_request_free(struct kref *req_ref);
> +void i915_gem_request_remove_from_client(struct drm_i915_gem_request *request);
> +int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
> +				   struct drm_file *file);
>
>   static inline uint32_t
>   i915_gem_request_get_seqno(struct drm_i915_gem_request *req)
> @@ -2752,13 +2755,12 @@ void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
>   int __must_check i915_gpu_idle(struct drm_device *dev);
>   int __must_check i915_gem_suspend(struct drm_device *dev);
>   void __i915_add_request(struct drm_i915_gem_request *req,
> -			struct drm_file *file,
>   			struct drm_i915_gem_object *batch_obj,
>   			bool flush_caches);
>   #define i915_add_request(req) \
> -	__i915_add_request(req, NULL, NULL, true)
> +	__i915_add_request(req, NULL, true)
>   #define i915_add_request_no_flush(req) \
> -	__i915_add_request(req, NULL, NULL, false)
> +	__i915_add_request(req, NULL, false)
>   int __i915_wait_request(struct drm_i915_gem_request *req,
>   			unsigned reset_counter,
>   			bool interruptible,
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 9ff9bda..ecdae34 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2324,7 +2324,6 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
>    * going to happen on the hardware. This would be a Bad Thing(tm).
>    */
>   void __i915_add_request(struct drm_i915_gem_request *request,
> -			struct drm_file *file,
>   			struct drm_i915_gem_object *obj,
>   			bool flush_caches)
>   {
> @@ -2392,19 +2391,6 @@ void __i915_add_request(struct drm_i915_gem_request *request,
>
>   	request->emitted_jiffies = jiffies;
>   	list_add_tail(&request->list, &ring->request_list);
> -	request->file_priv = NULL;
> -
> -	if (file) {
> -		struct drm_i915_file_private *file_priv = file->driver_priv;
> -
> -		spin_lock(&file_priv->mm.lock);
> -		request->file_priv = file_priv;
> -		list_add_tail(&request->client_list,
> -			      &file_priv->mm.request_list);
> -		spin_unlock(&file_priv->mm.lock);
> -
> -		request->pid = get_pid(task_pid(current));
> -	}
>
>   	trace_i915_gem_request_add(request);
>
> @@ -2420,7 +2406,34 @@ void __i915_add_request(struct drm_i915_gem_request *request,
>   	intel_ring_reserved_space_end(ringbuf);
>   }
>
> -static inline void
> +int i915_gem_request_add_to_client(struct drm_i915_gem_request *req,
> +				   struct drm_file *file)

Considering that add_to_client is only used from i915_gem_execbuffer.c 
we could move the definition there and make it static. On the other hand 
it makes sense from a semantic point of view to leave it in i915_gem.c 
and make the function public. Even though it is only called from 
i915_gem_execbuffer and from nowhere else. Semantics vs. scope. I could 
be convinced of either virtue.

Any other opinions on this for either case?

> +{
> +	struct drm_i915_private *dev_private;
> +	struct drm_i915_file_private *file_priv;
> +
> +	WARN_ON(!req || !file || req->file_priv);
> +
> +	if (!req || !file)
> +		return -EINVAL;
> +
> +	if (req->file_priv)
> +		return -EINVAL;
> +
> +	dev_private = req->ring->dev->dev_private;
> +	file_priv = file->driver_priv;
> +
> +	spin_lock(&file_priv->mm.lock);
> +	req->file_priv = file_priv;
> +	list_add_tail(&req->client_list, &file_priv->mm.request_list);
> +	spin_unlock(&file_priv->mm.lock);
> +
> +	req->pid = get_pid(task_pid(current));
> +
> +	return 0;
> +}
> +
> +inline void
>   i915_gem_request_remove_from_client(struct drm_i915_gem_request *request)

i915_gem_request_remove_from_client used to be static and it should 
remain static considering that it's only called from within i915_gem.c .

Thanks,
Tomas

>   {
>   	struct drm_i915_file_private *file_priv = request->file_priv;
> @@ -2495,6 +2508,9 @@ void i915_gem_request_free(struct kref *req_ref)
>   						 typeof(*req), ref);
>   	struct intel_context *ctx = req->ctx;
>
> +	if (req->file_priv)
> +		i915_gem_request_remove_from_client(req);
> +
>   	if (ctx) {
>   		if (i915.enable_execlists) {
>   			struct intel_engine_cs *ring = req->ring;
> @@ -4120,6 +4136,13 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file)
>   		if (time_after_eq(request->emitted_jiffies, recent_enough))
>   			break;
>
> +		/*
> +		 * Note that the request might not have been submitted yet.
> +		 * In which case emitted_jiffies will be zero.
> +		 */
> +		if (!request->emitted_jiffies)
> +			continue;
> +
>   		target = request;
>   	}
>   	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index c512979..8efc7f8 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1060,7 +1060,7 @@ i915_gem_execbuffer_retire_commands(struct i915_execbuffer_params *params)
>   	params->ring->gpu_caches_dirty = true;
>
>   	/* Add a breadcrumb for the completion of the batch buffer */
> -	__i915_add_request(params->request, params->file, params->batch_obj, true);
> +	__i915_add_request(params->request, params->batch_obj, true);
>   }
>
>   static int
> @@ -1603,6 +1603,10 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>   	if (ret)
>   		goto err_batch_unpin;
>
> +	ret = i915_gem_request_add_to_client(params->request, file);
> +	if (ret)
> +		goto err_batch_unpin;
> +
>   	/*
>   	 * Save assorted stuff away to pass through to *_submission().
>   	 * NB: This data should be 'persistent' and not local as it will
>

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Re: [PATCH 55/59] drm/i915: Remove fallback poll for ring buffer space

[Tomas Elf]

On 19/03/2015 12:31, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> When the ring buffer is full, the driver finds an outstanding request that will
> free up sufficient space for the current operation and waits for it to complete.
> If no such request can be found, there is a fall back path of just polling until
> sufficient space is available.
>
> This path should not be required any more. It is a hangover from the bad days of
> OLR such that it was possible for the ring to be completely filled without ever
> having submitted a request. This can no longer happen as requests are now
> submitted in a timely manner. Hence the entire polling path is obsolete. As it
> also causes headaches in LRC land due to nesting faked requests, it is being
> removed entirely.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c        |   65 ++++---------------------------
>   drivers/gpu/drm/i915/intel_ringbuffer.c |   62 +++--------------------------
>   2 files changed, 13 insertions(+), 114 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 60bcf9a..f21f449 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -622,8 +622,9 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
>   	return 0;
>   }
>
> -static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> -				     int bytes)
> +static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> +				       struct intel_context *ctx,
> +				       int bytes)
>   {
>   	struct intel_engine_cs *ring = ringbuf->ring;
>   	struct drm_i915_gem_request *request;
> @@ -652,8 +653,11 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
>   			break;
>   	}
>
> -	if (&request->list == &ring->request_list)
> +	/* It should always be possible to find a suitable request! */
> +	if (&request->list == &ring->request_list) {
> +		WARN_ON(true);

I agree with Thomas Daniel's earlier review comment that WARN_ON(true) 
is not very helpful. You could do something like:
	
	WARN_ON(ret = <expression>);
	if (ret)
		return -ENOSPC;

That way you don't have the redundancy of doing

	WARN_ON(expression);
	if (expression)
		return -ENOSPC;


and you don't have to do if (WARN_ON(expression)) if you don't like it.	

Thanks,
Tomas


>   		return -ENOSPC;
> +	}
>
>   	ret = i915_wait_request(request);
>   	if (ret)
> @@ -663,7 +667,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
>
>   	WARN_ON(intel_ring_space(ringbuf) < new_space);
>
> -	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
> +	return 0;
>   }
>
>   /*
> @@ -690,59 +694,6 @@ intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
>   	execlists_context_queue(ring, ctx, ringbuf->tail, request);
>   }
>
> -static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> -				       struct intel_context *ctx,
> -				       int bytes)
> -{
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_device *dev = ring->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	unsigned long end;
> -	int ret;
> -
> -	/* The whole point of reserving space is to not wait! */
> -	WARN_ON(ringbuf->reserved_in_use);
> -
> -	ret = logical_ring_wait_request(ringbuf, bytes);
> -	if (ret != -ENOSPC)
> -		return ret;
> -
> -	/* Force the context submission in case we have been skipping it */
> -	intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
> -
> -	/* With GEM the hangcheck timer should kick us out of the loop,
> -	 * leaving it early runs the risk of corrupting GEM state (due
> -	 * to running on almost untested codepaths). But on resume
> -	 * timers don't work yet, so prevent a complete hang in that
> -	 * case by choosing an insanely large timeout. */
> -	end = jiffies + 60 * HZ;
> -
> -	ret = 0;
> -	do {
> -		if (intel_ring_space(ringbuf) >= bytes)
> -			break;
> -
> -		msleep(1);
> -
> -		if (dev_priv->mm.interruptible && signal_pending(current)) {
> -			ret = -ERESTARTSYS;
> -			break;
> -		}
> -
> -		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> -					   dev_priv->mm.interruptible);
> -		if (ret)
> -			break;
> -
> -		if (time_after(jiffies, end)) {
> -			ret = -EBUSY;
> -			break;
> -		}
> -	} while (1);
> -
> -	return ret;
> -}
> -
>   static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
>   				    struct intel_context *ctx)
>   {
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index c5752c4..6099fce 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2063,7 +2063,7 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
>   	ring->buffer = NULL;
>   }
>
> -static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
> +static int ring_wait_for_space(struct intel_engine_cs *ring, int n)
>   {
>   	struct intel_ringbuffer *ringbuf = ring->buffer;
>   	struct drm_i915_gem_request *request;
> @@ -2082,8 +2082,11 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
>   			break;
>   	}
>
> -	if (&request->list == &ring->request_list)
> +	/* It should always be possible to find a suitable request! */
> +	if (&request->list == &ring->request_list) {
> +		WARN_ON(true);
>   		return -ENOSPC;
> +	}
>
>   	ret = i915_wait_request(request);
>   	if (ret)
> @@ -2096,61 +2099,6 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
>   	return 0;
>   }
>
> -static int ring_wait_for_space(struct intel_engine_cs *ring, int n)
> -{
> -	struct drm_device *dev = ring->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_ringbuffer *ringbuf = ring->buffer;
> -	unsigned long end;
> -	int ret;
> -
> -	/* The whole point of reserving space is to not wait! */
> -	WARN_ON(ringbuf->reserved_in_use);
> -
> -	ret = intel_ring_wait_request(ring, n);
> -	if (ret != -ENOSPC)
> -		return ret;
> -
> -	/* force the tail write in case we have been skipping them */
> -	__intel_ring_advance(ring);
> -
> -	/* With GEM the hangcheck timer should kick us out of the loop,
> -	 * leaving it early runs the risk of corrupting GEM state (due
> -	 * to running on almost untested codepaths). But on resume
> -	 * timers don't work yet, so prevent a complete hang in that
> -	 * case by choosing an insanely large timeout. */
> -	end = jiffies + 60 * HZ;
> -
> -	ret = 0;
> -	trace_i915_ring_wait_begin(ring);
> -	do {
> -		if (intel_ring_space(ringbuf) >= n)
> -			break;
> -		ringbuf->head = I915_READ_HEAD(ring);
> -		if (intel_ring_space(ringbuf) >= n)
> -			break;
> -
> -		msleep(1);
> -
> -		if (dev_priv->mm.interruptible && signal_pending(current)) {
> -			ret = -ERESTARTSYS;
> -			break;
> -		}
> -
> -		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
> -					   dev_priv->mm.interruptible);
> -		if (ret)
> -			break;
> -
> -		if (time_after(jiffies, end)) {
> -			ret = -EBUSY;
> -			break;
> -		}
> -	} while (1);
> -	trace_i915_ring_wait_end(ring);
> -	return ret;
> -}
> -
>   static int intel_wrap_ring_buffer(struct intel_engine_cs *ring)
>   {
>   	uint32_t __iomem *virt;
>

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Re: [PATCH 56/59] drm/i915: Remove 'faked' request from LRC submission

[Tomas Elf]

On 19/03/2015 12:31, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The LRC submission code requires a request for tracking purposes. It does not
> actually require that request to 'complete' it simply uses it for keeping hold
> of reference counts on contexts and such like.
>
> Previously, the fall back path of polling for space in the ring would start by
> submitting any outstanding work that was sat in the buffer. This submission was
> not done as part of the request that that work was owned by because that would
> lead to complications with the request being submitted twice. Instead, a null
> request structure was passed in to the submit call and a fake one was created.
>
> That fall back path has long since been obsoleted and has now been removed. Thus
> there is never any need to fake up a request structure. This patch removes that
> code. A couple of sanity check warnings are added as well, just in case.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c |   22 +++++-----------------
>   1 file changed, 5 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f21f449..82190ad 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -507,23 +507,11 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
>   	if (to != ring->default_context)
>   		intel_lr_context_pin(ring, to);
>
> -	if (!request) {
> -		/*
> -		 * If there isn't a request associated with this submission,
> -		 * create one as a temporary holder.
> -		 */
> -		request = kzalloc(sizeof(*request), GFP_KERNEL);
> -		if (request == NULL)
> -			return -ENOMEM;
> -		request->ring = ring;
> -		request->ctx = to;
> -		kref_init(&request->ref);
> -		request->uniq = dev_priv->request_uniq++;
> -		i915_gem_context_reference(request->ctx);
> -	} else {
> -		i915_gem_request_reference(request);
> -		WARN_ON(to != request->ctx);
> -	}
> +	WARN_ON(!request);
> +	WARN_ON(to != request->ctx);
> +
> +	i915_gem_request_reference(request);
> +
>   	request->tail = tail;
>
>   	intel_runtime_pm_get(dev_priv);
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

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Re: [PATCH 57/59] drm/i915: Update a bunch of LRC functions to take requests

[Tomas Elf]

On 19/03/2015 12:31, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> A bunch of the low level LRC functions were passing around ringbuf and ctx
> pairs. In a few cases, they took the r/c pair and a request as well. This is all
> quite messy and unnecesary. The context_queue() call is especially bad since the
> fake request code got removed - it takes a request and three extra things that
> must be extracted from the request and then it checks them against what it finds
> in the request. Removing all the derivable data makes the code much simpler all
> round.
>
> This patch updates those functions to just take the request structure.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c |   66 +++++++++++++++++---------------------
>   1 file changed, 29 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 82190ad..ae00054 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -494,25 +494,20 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
>   		   ((u32)ring->next_context_status_buffer & 0x07) << 8);
>   }
>
> -static int execlists_context_queue(struct intel_engine_cs *ring,
> -				   struct intel_context *to,
> -				   u32 tail,
> -				   struct drm_i915_gem_request *request)
> +static int execlists_context_queue(struct drm_i915_gem_request *request)
>   {
> +	struct intel_engine_cs *ring = request->ring;
>   	struct drm_i915_gem_request *cursor;
>   	struct drm_i915_private *dev_priv = ring->dev->dev_private;
>   	unsigned long flags;
>   	int num_elements = 0;
>
> -	if (to != ring->default_context)
> -		intel_lr_context_pin(ring, to);
> -
> -	WARN_ON(!request);
> -	WARN_ON(to != request->ctx);
> +	if (request->ctx != ring->default_context)
> +		intel_lr_context_pin(ring, request->ctx);
>
>   	i915_gem_request_reference(request);
>
> -	request->tail = tail;
> +	request->tail = request->ringbuf->tail;
>
>   	intel_runtime_pm_get(dev_priv);
>
> @@ -529,7 +524,7 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
>   					   struct drm_i915_gem_request,
>   					   execlist_link);
>
> -		if (to == tail_req->ctx) {
> +		if (request->ctx == tail_req->ctx) {
>   			WARN(tail_req->elsp_submitted != 0,
>   				"More than 2 already-submitted reqs queued\n");
>   			list_del(&tail_req->execlist_link);
> @@ -610,12 +605,12 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
>   	return 0;
>   }
>
> -static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
> -				       struct intel_context *ctx,
> +static int logical_ring_wait_for_space(struct drm_i915_gem_request *req,
>   				       int bytes)
>   {
> -	struct intel_engine_cs *ring = ringbuf->ring;
> -	struct drm_i915_gem_request *request;
> +	struct intel_ringbuffer *ringbuf = req->ringbuf;
> +	struct intel_engine_cs *ring = req->ring;
> +	struct drm_i915_gem_request *target;

My only gripe here is that had you not renamed the request variable 
target you wouldn't have had to change anything in this function below 
this point. However, I do also agree that having one variable called req 
and another one called request in the same function is less than optimal.

With that noted...

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas

>   	int ret, new_space;
>
>   	/* The whole point of reserving space is to not wait! */
> @@ -624,30 +619,30 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>   	if (intel_ring_space(ringbuf) >= bytes)
>   		return 0;
>
> -	list_for_each_entry(request, &ring->request_list, list) {
> +	list_for_each_entry(target, &ring->request_list, list) {
>   		/*
>   		 * The request queue is per-engine, so can contain requests
>   		 * from multiple ringbuffers. Here, we must ignore any that
>   		 * aren't from the ringbuffer we're considering.
>   		 */
> -		struct intel_context *ctx = request->ctx;
> +		struct intel_context *ctx = target->ctx;
>   		if (ctx->engine[ring->id].ringbuf != ringbuf)
>   			continue;
>
>   		/* Would completion of this request free enough space? */
> -		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
> +		new_space = __intel_ring_space(target->postfix, ringbuf->tail,
>   				       ringbuf->size);
>   		if (new_space >= bytes)
>   			break;
>   	}
>
>   	/* It should always be possible to find a suitable request! */
> -	if (&request->list == &ring->request_list) {
> +	if (&target->list == &ring->request_list) {
>   		WARN_ON(true);
>   		return -ENOSPC;
>   	}
>
> -	ret = i915_wait_request(request);
> +	ret = i915_wait_request(target);
>   	if (ret)
>   		return ret;
>
> @@ -660,7 +655,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>
>   /*
>    * intel_logical_ring_advance_and_submit() - advance the tail and submit the workload
> - * @ringbuf: Logical Ringbuffer to advance.
> + * @request: Request to advance the logical ringbuffer of.
>    *
>    * The tail is updated in our logical ringbuffer struct, not in the actual context. What
>    * really happens during submission is that the context and current tail will be placed
> @@ -668,23 +663,21 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
>    * point, the tail *inside* the context is updated and the ELSP written to.
>    */
>   static void
> -intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
> -				      struct intel_context *ctx,
> -				      struct drm_i915_gem_request *request)
> +intel_logical_ring_advance_and_submit(struct drm_i915_gem_request *request)
>   {
> -	struct intel_engine_cs *ring = ringbuf->ring;
> +	struct intel_engine_cs *ring = request->ring;
>
> -	intel_logical_ring_advance(ringbuf);
> +	intel_logical_ring_advance(request->ringbuf);
>
>   	if (intel_ring_stopped(ring))
>   		return;
>
> -	execlists_context_queue(ring, ctx, ringbuf->tail, request);
> +	execlists_context_queue(request);
>   }
>
> -static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
> -				    struct intel_context *ctx)
> +static int logical_ring_wrap_buffer(struct drm_i915_gem_request *req)
>   {
> +	struct intel_ringbuffer *ringbuf = req->ringbuf;
>   	uint32_t __iomem *virt;
>   	int rem = ringbuf->size - ringbuf->tail;
>
> @@ -692,7 +685,7 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
>   	WARN_ON(ringbuf->reserved_in_use);
>
>   	if (ringbuf->space < rem) {
> -		int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
> +		int ret = logical_ring_wait_for_space(req, rem);
>
>   		if (ret)
>   			return ret;
> @@ -709,22 +702,22 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
>   	return 0;
>   }
>
> -static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
> -				struct intel_context *ctx, int bytes)
> +static int logical_ring_prepare(struct drm_i915_gem_request *req, int bytes)
>   {
> +	struct intel_ringbuffer *ringbuf = req->ringbuf;
>   	int ret;
>
>   	if (!ringbuf->reserved_in_use)
>   		bytes += ringbuf->reserved_size;
>
>   	if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
> -		ret = logical_ring_wrap_buffer(ringbuf, ctx);
> +		ret = logical_ring_wrap_buffer(req);
>   		if (unlikely(ret))
>   			return ret;
>   	}
>
>   	if (unlikely(ringbuf->space < bytes)) {
> -		ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
> +		ret = logical_ring_wait_for_space(req, bytes);
>   		if (unlikely(ret))
>   			return ret;
>   	}
> @@ -759,8 +752,7 @@ static int intel_logical_ring_begin(struct drm_i915_gem_request *req,
>   	if (ret)
>   		return ret;
>
> -	ret = logical_ring_prepare(req->ringbuf, req->ctx,
> -				   num_dwords * sizeof(uint32_t));
> +	ret = logical_ring_prepare(req, num_dwords * sizeof(uint32_t));
>   	if (ret)
>   		return ret;
>
> @@ -1266,7 +1258,7 @@ static int gen8_emit_request(struct drm_i915_gem_request *request)
>   	intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request));
>   	intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
>   	intel_logical_ring_emit(ringbuf, MI_NOOP);
> -	intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
> +	intel_logical_ring_advance_and_submit(request);
>
>   	return 0;
>   }
>

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Re: [PATCH 58/59] drm/i915: Remove the now obsolete 'i915_gem_check_olr()'

[Tomas Elf]

On 19/03/2015 12:31, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> As there is no OLR to check, the check_olr() function is now a no-op and can be
> removed.
>
> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h |    1 -
>   drivers/gpu/drm/i915/i915_gem.c |   28 ----------------------------
>   2 files changed, 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 764ee4f..0a68dbc 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2713,7 +2713,6 @@ bool i915_gem_retire_requests(struct drm_device *dev);
>   void i915_gem_retire_requests_ring(struct intel_engine_cs *ring);
>   int __must_check i915_gem_check_wedge(struct i915_gpu_error *error,
>   				      bool interruptible);
> -int __must_check i915_gem_check_olr(struct drm_i915_gem_request *req);
>
>   static inline bool i915_reset_in_progress(struct i915_gpu_error *error)
>   {
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index ecdae34..acb824c 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1153,17 +1153,6 @@ i915_gem_check_wedge(struct i915_gpu_error *error,
>   	return 0;
>   }
>
> -/*
> - * Compare arbitrary request against outstanding lazy request. Emit on match.
> - */
> -int
> -i915_gem_check_olr(struct drm_i915_gem_request *req)
> -{
> -	WARN_ON(!mutex_is_locked(&req->ring->dev->struct_mutex));
> -
> -	return 0;
> -}
> -
>   static void fake_irq(unsigned long data)
>   {
>   	wake_up_process((struct task_struct *)data);
> @@ -1338,10 +1327,6 @@ i915_wait_request(struct drm_i915_gem_request *req)
>   	if (ret)
>   		return ret;
>
> -	ret = i915_gem_check_olr(req);
> -	if (ret)
> -		return ret;
> -
>   	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
>   	i915_gem_request_reference(req);
>   	ret = __i915_wait_request(req, reset_counter,
> @@ -1415,10 +1400,6 @@ i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj,
>   	if (ret)
>   		return ret;
>
> -	ret = i915_gem_check_olr(req);
> -	if (ret)
> -		return ret;
> -
>   	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
>   	i915_gem_request_reference(req);
>   	mutex_unlock(&dev->struct_mutex);
> @@ -2852,15 +2833,10 @@ static int
>   i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
>   {
>   	struct intel_engine_cs *ring;
> -	int ret;
>
>   	if (obj->active) {
>   		ring = i915_gem_request_get_ring(obj->last_read_req);
>
> -		ret = i915_gem_check_olr(obj->last_read_req);
> -		if (ret)
> -			return ret;
> -
>   		i915_gem_retire_requests_ring(ring);
>   	}
>
> @@ -2997,10 +2973,6 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
>   			return ret;
>   	}
>
> -	ret = i915_gem_check_olr(obj->last_read_req);
> -	if (ret)
> -		return ret;
> -
>   	trace_i915_gem_ring_sync_to(*to_req, from, obj->last_read_req);
>   	ret = to->semaphore.sync_to(*to_req, from, seqno);
>   	if (!ret)
>

Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Thanks,
Tomas
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Re: [PATCH 59/59] drm/i915: Remove the almost obsolete i915_gem_object_flush_active()

[Tomas Elf]

On 19/03/2015 12:31, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> The i915_gem_object_flush_active() call used to do lots. Over time it has done
> less and less. Now all it does call i915_gem_retire_requests_ring(). Hence it is
> pretty much redundant as the two callers could just call retire directly. This
> patch makes that change.
>

This commit message tells us that we're removing the 
i915_gem_object_flush_active() function and inlining its remaining code 
at its former call sites. What it does not mention is that we also 
replace obj->active with obj->last_read_req because this is functionally 
equivalent and is preferably in this case for whatever reason.

If you don't already know the relationship between obj->active and 
obj->last_read_req and that they are always equivalent without exception 
and that obj->active == 0 always corresponds to obj->last_read_req == 
NULL and not just some dead request or whatever, then this inlined, 
undocumented change is less than trivial.

How about mentioning it in the commit message and point out that this is 
perfectly fine.

> For: VIZ-5115
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
>   drivers/gpu/drm/i915/i915_gem.c |   43 +++++++++++----------------------------
>   1 file changed, 12 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index acb824c..aef4748 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2825,25 +2825,6 @@ i915_gem_idle_work_handler(struct work_struct *work)
>   }
>
>   /**
> - * Ensures that an object will eventually get non-busy by flushing any required
> - * write domains, emitting any outstanding lazy request and retiring and
> - * completed requests.
> - */
> -static int
> -i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
> -{
> -	struct intel_engine_cs *ring;
> -
> -	if (obj->active) {
> -		ring = i915_gem_request_get_ring(obj->last_read_req);
> -
> -		i915_gem_retire_requests_ring(ring);
> -	}
> -
> -	return 0;
> -}
> -
> -/**
>    * i915_gem_wait_ioctl - implements DRM_IOCTL_I915_GEM_WAIT
>    * @DRM_IOCTL_ARGS: standard ioctl arguments
>    *
> @@ -2888,10 +2869,12 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>   		return -ENOENT;
>   	}
>
> -	/* Need to make sure the object gets inactive eventually. */
> -	ret = i915_gem_object_flush_active(obj);
> -	if (ret)
> -		goto out;
> +	/* Make sure the object is not pending cleanup. */
> +	if (obj->last_read_req) {
> +		struct intel_engine_cs *ring;
> +		ring = i915_gem_request_get_ring(obj->last_read_req);
> +		i915_gem_retire_requests_ring(ring);
> +	}
>
>   	if (!obj->active || !obj->last_read_req)
>   		goto out;
> @@ -4335,19 +4318,17 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
>   		goto unlock;
>   	}
>
> -	/* Count all active objects as busy, even if they are currently not used
> -	 * by the gpu. Users of this interface expect objects to eventually
> -	 * become non-busy without any further actions, therefore emit any
> -	 * necessary flushes here.
> -	 */
> -	ret = i915_gem_object_flush_active(obj);
> -
>   	args->busy = obj->active;
>   	if (obj->last_read_req) {
>   		struct intel_engine_cs *ring;
>   		BUILD_BUG_ON(I915_NUM_RINGS > 16);
>   		ring = i915_gem_request_get_ring(obj->last_read_req);
> -		args->busy |= intel_ring_flag(ring) << 16;
> +
> +		/* Check that the object wasn't simply pending cleanup */
> +		i915_gem_retire_requests_ring(ring);
> +
> +		if (obj->last_read_req)
> +			args->busy |= intel_ring_flag(ring) << 16;
>   	}
>

Having an if case like:

if (expression) {
	...
	if (expression) {	
		...
	}
	...
}

Doesn't sit super-well with me since it's not entirely obvious how the 
state changed inside the if statement. Obviously there must have been a 
side-effect at some point but it would be nicer to have that spelled out 
explicitly instead of having it implied. I'm not saying that you should 
restructure anything but how about just embellishing the comment before 
the i915_gem_retire_requests_ring a bit saying something like:

"Check that the object wasn't simply pending cleanup, in which case 
obj->last_read_req is cleared"

or add a comment before if (obj->last_read_req) saying

"if object was pending cleanup don't update args->busy" or whatever?

Or am I being overly lazy now? Is this really trivial?

Thanks,
Tomas

>   	drm_gem_object_unreference(&obj->base);
>

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Re: [PATCH 04/59] drm/i915: Fix for ringbuf space wait in LRC mode

[Daniel Vetter]

On Tue, Mar 31, 2015 at 04:50:10PM +0100, Tomas Elf wrote:
> On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> >From: John Harrison <John.C.Harrison@Intel.com>
> >
> >The legacy and LRC code paths have an almost identical procedure for waiting for
> >space in the ring buffer. They both search for a request in the free list that
> >will advance the tail to a point where sufficient space is available. They then
> >wait for that request, retire it and recalculate the free space value.
> >
> >Unfortunately, a bug in the LRC side meant that the resulting free space might
> >not be as large as expected and indeed, might not be sufficient. This is because
> >it was testing against the value of request->tail not request->postfix. Whereas,
> >when a request is retired, ringbuf->tail is updated to req->postfix not
> >req->tail.
> >
> >Another significant difference between the two is that the LRC one did not trust
> >the wait for request to work! It redid the is there enough space available test
> >and would fail the call if insufficient. Whereas, the legacy version just said
> >'return 0' - it assumed the preceeding code works. This difference meant that
> >the LRC version still worked even with the bug - it just fell back to the
> >polling wait path.
> >
> >For: VIZ-5115
> >Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> >---
> >  drivers/gpu/drm/i915/intel_lrc.c        |   10 ++++++----
> >  drivers/gpu/drm/i915/intel_ringbuffer.c |   10 ++++++----
> >  2 files changed, 12 insertions(+), 8 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> >index 6504689..1c3834fc 100644
> >--- a/drivers/gpu/drm/i915/intel_lrc.c
> >+++ b/drivers/gpu/drm/i915/intel_lrc.c
> >@@ -634,7 +634,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> >  {
> >  	struct intel_engine_cs *ring = ringbuf->ring;
> >  	struct drm_i915_gem_request *request;
> >-	int ret;
> >+	int ret, new_space;
> >
> >  	if (intel_ring_space(ringbuf) >= bytes)
> >  		return 0;
> >@@ -650,10 +650,10 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> >  			continue;
> >
> >  		/* Would completion of this request free enough space? */
> >-		if (__intel_ring_space(request->tail, ringbuf->tail,
> >-				       ringbuf->size) >= bytes) {
> >+		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
> >+				       ringbuf->size);
> >+		if (new_space >= bytes)
> >  			break;
> >-		}
> >  	}
> >
> >  	if (&request->list == &ring->request_list)
> >@@ -665,6 +665,8 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> >
> >  	i915_gem_retire_requests_ring(ring);
> >
> >+	WARN_ON(intel_ring_space(ringbuf) < new_space);
> >+
> >  	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
> >  }
> >
> >diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >index 99fb2f0..a26bdf8 100644
> >--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> >+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> >@@ -2059,16 +2059,16 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
> >  {
> >  	struct intel_ringbuffer *ringbuf = ring->buffer;
> >  	struct drm_i915_gem_request *request;
> >-	int ret;
> >+	int ret, new_space;
> >
> >  	if (intel_ring_space(ringbuf) >= n)
> >  		return 0;
> >
> >  	list_for_each_entry(request, &ring->request_list, list) {
> >-		if (__intel_ring_space(request->postfix, ringbuf->tail,
> >-				       ringbuf->size) >= n) {
> >+		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
> >+				       ringbuf->size);
> >+		if (new_space >= n)
> >  			break;
> >-		}
> >  	}
> >
> >  	if (&request->list == &ring->request_list)
> >@@ -2080,6 +2080,8 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
> >
> >  	i915_gem_retire_requests_ring(ring);
> >
> >+	WARN_ON(intel_ring_space(ringbuf) < new_space);
> >+
> >  	return 0;
> >  }
> >
> >
> 
> Reviewed-by: Tomas Elf <tomas.elf@intel.com>

Merged up to this one here, thanks for patches&review. I still like to get
to the bottom of the reservation discussion before proceeding (totally
forgot that we still have an open question there).
-Daniel
-- 
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Software Engineer, Intel Corporation
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Re: [PATCH 16/59] drm/i915: Add flag to i915_add_request() to skip the cache flush

[Daniel Vetter]

On Tue, Mar 31, 2015 at 05:32:07PM +0100, Tomas Elf wrote:
> On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> >@@ -2361,12 +2362,14 @@ void __i915_add_request(struct intel_engine_cs *ring,
> >  	 * is that the flush _must_ happen before the next request, no matter
> >  	 * what.
> >  	 */
> >-	if (i915.enable_execlists)
> >-		ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
> >-	else
> >-		ret = intel_ring_flush_all_caches(ring);
> >-	/* Not allowed to fail! */
> >-	WARN_ON(ret);
> >+	if (flush_caches) {
> >+		if (i915.enable_execlists)
> >+			ret = logical_ring_flush_all_caches(ringbuf, request->ctx);
> >+		else
> >+			ret = intel_ring_flush_all_caches(ring);
> >+		/* Not allowed to fail! */
> >+		WARN_ON(ret);
> 
> There has been a discussion about whether it's ok to use
> WARN_ON(<variable/constant>) since it doesn't add any useful information
> about the actual failure case to the kernel log. By that logic you should
> add WARN_ON to each individual call to _flush_all_caches above but I would
> be inclined to say that that would be slightly redundant. It could be argued
> that if you get a WARN stack_dump in the kernel log at this point you pretty
> much know from where it came.
> 
> Although, if you want to be able to rely entirely on the kernel log and
> don't want to read the source code to figure out what function call failed
> then you would have to either add WARN_ONs to each individual function call
> or replace WARN_ON(ret) with something like WARN(ret, "flush_all_caches
> returned %d", ret) or something.
> 
> Any other opinion on how we should do this from anyone? What pattern should
> we be following here?

WARN_ON dumps the full backtrace plus current EIP/RIP including basic
decoding using debug information (if compiled in). Maybe you don't have
that enabled in Android builds? Or is there additional information you
want to dump?
-Daniel
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Re: [PATCH 55/59] drm/i915: Remove fallback poll for ring buffer space

[Daniel Vetter]

On Tue, Mar 31, 2015 at 07:13:40PM +0100, Tomas Elf wrote:
> On 19/03/2015 12:31, John.C.Harrison@Intel.com wrote:
> >From: John Harrison <John.C.Harrison@Intel.com>
> >@@ -652,8 +653,11 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
> >  			break;
> >  	}
> >
> >-	if (&request->list == &ring->request_list)
> >+	/* It should always be possible to find a suitable request! */
> >+	if (&request->list == &ring->request_list) {
> >+		WARN_ON(true);
> 
> I agree with Thomas Daniel's earlier review comment that WARN_ON(true) is
> not very helpful. You could do something like:
> 	
> 	WARN_ON(ret = <expression>);
> 	if (ret)
> 		return -ENOSPC;
> 
> That way you don't have the redundancy of doing
> 
> 	WARN_ON(expression);
> 	if (expression)
> 		return -ENOSPC;
> 
> 
> and you don't have to do if (WARN_ON(expression)) if you don't like it.	

if (WARN_ON(expression)) is prefectly acceptable style in i915 (there's
lots more of these) and what I'd go with here.
-Daniel
-- 
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Re: [PATCH 59/59] drm/i915: Remove the almost obsolete i915_gem_object_flush_active()

[Daniel Vetter]

On Tue, Mar 31, 2015 at 07:32:41PM +0100, Tomas Elf wrote:
> On 19/03/2015 12:31, John.C.Harrison@Intel.com wrote:
> >@@ -4335,19 +4318,17 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
> >  		goto unlock;
> >  	}
> >
> >-	/* Count all active objects as busy, even if they are currently not used
> >-	 * by the gpu. Users of this interface expect objects to eventually
> >-	 * become non-busy without any further actions, therefore emit any
> >-	 * necessary flushes here.
> >-	 */
> >-	ret = i915_gem_object_flush_active(obj);
> >-
> >  	args->busy = obj->active;
> >  	if (obj->last_read_req) {
> >  		struct intel_engine_cs *ring;
> >  		BUILD_BUG_ON(I915_NUM_RINGS > 16);
> >  		ring = i915_gem_request_get_ring(obj->last_read_req);
> >-		args->busy |= intel_ring_flag(ring) << 16;
> >+
> >+		/* Check that the object wasn't simply pending cleanup */
> >+		i915_gem_retire_requests_ring(ring);
> >+
> >+		if (obj->last_read_req)
> >+			args->busy |= intel_ring_flag(ring) << 16;
> >  	}
> >
> 
> Having an if case like:
> 
> if (expression) {
> 	...
> 	if (expression) {	
> 		...
> 	}
> 	...
> }
> 
> Doesn't sit super-well with me since it's not entirely obvious how the state
> changed inside the if statement. Obviously there must have been a
> side-effect at some point but it would be nicer to have that spelled out
> explicitly instead of having it implied. I'm not saying that you should
> restructure anything but how about just embellishing the comment before the
> i915_gem_retire_requests_ring a bit saying something like:
> 
> "Check that the object wasn't simply pending cleanup, in which case
> obj->last_read_req is cleared"
> 
> or add a comment before if (obj->last_read_req) saying
> 
> "if object was pending cleanup don't update args->busy" or whatever?
> 
> Or am I being overly lazy now? Is this really trivial?

Maybe:

+		/* Check that the object wasn't simply pending cleanup */
+		i915_gem_retire_requests_ring(ring);
+
+		/* ... and only set busy if it really is so. */
+		if (obj->last_read_req)
+			args->busy |= intel_ring_flag(ring) << 16;

Cheers, Daniel
-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH 55/59] drm/i915: Remove fallback poll for ring buffer space

[Chris Wilson]

On Tue, Mar 31, 2015 at 07:13:40PM +0100, Tomas Elf wrote:
> On 19/03/2015 12:31, John.C.Harrison@Intel.com wrote:
> >From: John Harrison <John.C.Harrison@Intel.com>
> >
> >When the ring buffer is full, the driver finds an outstanding request that will
> >free up sufficient space for the current operation and waits for it to complete.
> >If no such request can be found, there is a fall back path of just polling until
> >sufficient space is available.
> >
> >This path should not be required any more. It is a hangover from the bad days of
> >OLR such that it was possible for the ring to be completely filled without ever
> >having submitted a request.

No. This is wrong. It is from DRI1. We never could have touched the ring
without an OLR.
-Chris

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Re: [PATCH 16/59] drm/i915: Add flag to i915_add_request() to skip the cache flush

[Chris Wilson]

On Tue, Mar 31, 2015 at 05:32:07PM +0100, Tomas Elf wrote:
> On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> >From: John Harrison <John.C.Harrison@Intel.com>
> >
> >In order to explcitly track all GPU work (and completely remove the outstanding
> >lazy request), it is necessary to add extra i915_add_request() calls to various
> >places. Some of these do not need the implicit cache flush done as part of the
> >standard batch buffer submission process.
> >
> >This patch adds a flag to _add_request() to specify whether the flush is
> >required or not.

No. Please do cache emission on the request explicitly, do not start
overloading add_request.
-Chris

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Re: [PATCH 04/59] drm/i915: Fix for ringbuf space wait in LRC mode

[Chris Wilson]

On Tue, Mar 31, 2015 at 04:50:10PM +0100, Tomas Elf wrote:
> On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
> >From: John Harrison <John.C.Harrison@Intel.com>
> >
> >The legacy and LRC code paths have an almost identical procedure for waiting for
> >space in the ring buffer. They both search for a request in the free list that
> >will advance the tail to a point where sufficient space is available. They then
> >wait for that request, retire it and recalculate the free space value.
> >
> >Unfortunately, a bug in the LRC side meant that the resulting free space might
> >not be as large as expected and indeed, might not be sufficient. This is because
> >it was testing against the value of request->tail not request->postfix. Whereas,
> >when a request is retired, ringbuf->tail is updated to req->postfix not
> >req->tail.

req->postfix is garbage, please fix.
-Chris

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Re: [PATCH 04/59] drm/i915: Fix for ringbuf space wait in LRC mode

[John Harrison]

On 01/04/2015 06:56, Daniel Vetter wrote:
> On Tue, Mar 31, 2015 at 04:50:10PM +0100, Tomas Elf wrote:
>> On 19/03/2015 12:30, John.C.Harrison@Intel.com wrote:
>>> From: John Harrison <John.C.Harrison@Intel.com>
>>>
>>> The legacy and LRC code paths have an almost identical procedure for waiting for
>>> space in the ring buffer. They both search for a request in the free list that
>>> will advance the tail to a point where sufficient space is available. They then
>>> wait for that request, retire it and recalculate the free space value.
>>>
>>> Unfortunately, a bug in the LRC side meant that the resulting free space might
>>> not be as large as expected and indeed, might not be sufficient. This is because
>>> it was testing against the value of request->tail not request->postfix. Whereas,
>>> when a request is retired, ringbuf->tail is updated to req->postfix not
>>> req->tail.
>>>
>>> Another significant difference between the two is that the LRC one did not trust
>>> the wait for request to work! It redid the is there enough space available test
>>> and would fail the call if insufficient. Whereas, the legacy version just said
>>> 'return 0' - it assumed the preceeding code works. This difference meant that
>>> the LRC version still worked even with the bug - it just fell back to the
>>> polling wait path.
>>>
>>> For: VIZ-5115
>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/intel_lrc.c        |   10 ++++++----
>>>   drivers/gpu/drm/i915/intel_ringbuffer.c |   10 ++++++----
>>>   2 files changed, 12 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
>>> index 6504689..1c3834fc 100644
>>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>>> @@ -634,7 +634,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
>>>   {
>>>   	struct intel_engine_cs *ring = ringbuf->ring;
>>>   	struct drm_i915_gem_request *request;
>>> -	int ret;
>>> +	int ret, new_space;
>>>
>>>   	if (intel_ring_space(ringbuf) >= bytes)
>>>   		return 0;
>>> @@ -650,10 +650,10 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
>>>   			continue;
>>>
>>>   		/* Would completion of this request free enough space? */
>>> -		if (__intel_ring_space(request->tail, ringbuf->tail,
>>> -				       ringbuf->size) >= bytes) {
>>> +		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
>>> +				       ringbuf->size);
>>> +		if (new_space >= bytes)
>>>   			break;
>>> -		}
>>>   	}
>>>
>>>   	if (&request->list == &ring->request_list)
>>> @@ -665,6 +665,8 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
>>>
>>>   	i915_gem_retire_requests_ring(ring);
>>>
>>> +	WARN_ON(intel_ring_space(ringbuf) < new_space);
>>> +
>>>   	return intel_ring_space(ringbuf) >= bytes ? 0 : -ENOSPC;
>>>   }
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> index 99fb2f0..a26bdf8 100644
>>> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
>>> @@ -2059,16 +2059,16 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
>>>   {
>>>   	struct intel_ringbuffer *ringbuf = ring->buffer;
>>>   	struct drm_i915_gem_request *request;
>>> -	int ret;
>>> +	int ret, new_space;
>>>
>>>   	if (intel_ring_space(ringbuf) >= n)
>>>   		return 0;
>>>
>>>   	list_for_each_entry(request, &ring->request_list, list) {
>>> -		if (__intel_ring_space(request->postfix, ringbuf->tail,
>>> -				       ringbuf->size) >= n) {
>>> +		new_space = __intel_ring_space(request->postfix, ringbuf->tail,
>>> +				       ringbuf->size);
>>> +		if (new_space >= n)
>>>   			break;
>>> -		}
>>>   	}
>>>
>>>   	if (&request->list == &ring->request_list)
>>> @@ -2080,6 +2080,8 @@ static int intel_ring_wait_request(struct intel_engine_cs *ring, int n)
>>>
>>>   	i915_gem_retire_requests_ring(ring);
>>>
>>> +	WARN_ON(intel_ring_space(ringbuf) < new_space);
>>> +
>>>   	return 0;
>>>   }
>>>
>>>
>> Reviewed-by: Tomas Elf <tomas.elf@intel.com>
> Merged up to this one here, thanks for patches&review. I still like to get
> to the bottom of the reservation discussion before proceeding (totally
> forgot that we still have an open question there).
> -Daniel
Yeah, I've been busy with Android issues lately and haven't had chance 
to look at this yet.

John.

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Re: [PATCH 00/59] Remove the outstanding_lazy_request

[Jesse Barnes]

John, Tomas, where are we with this series?  I believe this is a
prerequisite for the request->fence conversion, and also the native sync
work, both of which I need for some stuff I'm doing.

Thanks,
Jesse

On 03/19/2015 05:30 AM, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
> 
> The driver tracks GPU work using request structures. Unfortunately, this
> tracking is not currently explicit but is done by means of a catch-all request
> that floats around in the background hoovering up work until it gets submitted.
> This background request (ring->outstanding_lazy_request or OLR) is created at
> the point of actually writing to the ring rather than when a particular piece of
> GPU work is started. This scheme sort of hangs together but causes a number of
> issues. It can mean that multiple pieces of independent work are lumped together
> in the same request or that work is not officially submitted until much later
> than it was created.
> 
> This patch series completely removes the OLR and explicitly tracks each piece of
> work with it's own personal request structure from start to submission.
> 
> The patch set seems to fix the "'gem_ringfill --r render' + ctrl-c straight
> after boot" issue logged as BZ:88865. I haven't done any analysis of that
> particular issue but the descriptions I've seen appear to blame an inconsistent
> or mangled OLR.
> 
> Note also that by the end of this series, a number of differences between the
> legacy and execlist code paths have been removed. For example add_request() and
> emit_request() now have the same signature thus could be merged back to a single
> function pointer. Merging some of these together would also allow the removal of
> a bunch of 'if(execlists)' tests where the difference is simply to call the
> legacy function or the execlist one.
> 
> v2: Rebased to newer nightly tree, fixed up a few minor issues, added two extra
> patches - one to move the LRC ring begin around in the vein of other recent
> reshuffles, the other to clean up some issues with i915_add_request().
> 
> v3: Large re-work due to feedback from code review. Some patches have been
> removed, extra ones have been added and others have been changed significantly.
> It is recommended that all patches are reviewed from scratch rather than
> assuming only certain ones have changed and need re-inspecting. The exceptions
> are where the 'reviewed-by' tag has been kept because that patch was not
> significantly affected.
> 
> [Patches against drm-intel-nightly tree fetched 18/03/2015]
> 
> John Harrison (59):
>   drm/i915: Rename 'do_execbuf' to 'execbuf_submit'
>   drm/i915: Make intel_logical_ring_begin() static
>   drm/i915: Move common request allocation code into a common function
>   drm/i915: Fix for ringbuf space wait in LRC mode
>   drm/i915: Reserve ring buffer space for i915_add_request() commands
>   drm/i915: i915_add_request must not fail
>   drm/i915: Early alloc request in execbuff
>   drm/i915: Set context in request from creation even in legacy mode
>   drm/i915: Merged the many do_execbuf() parameters into a structure
>   drm/i915: Simplify i915_gem_execbuffer_retire_commands() parameters
>   drm/i915: Update alloc_request to return the allocated request
>   drm/i915: Add request to execbuf params and add explicit cleanup
>   drm/i915: Update the dispatch tracepoint to use params->request
>   drm/i915: Update move_to_gpu() to take a request structure
>   drm/i915: Update execbuffer_move_to_active() to take a request structure
>   drm/i915: Add flag to i915_add_request() to skip the cache flush
>   drm/i915: Update i915_gpu_idle() to manage its own request
>   drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring
>   drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()
>   drm/i915: Don't tag kernel batches as user batches
>   drm/i915: Add explicit request management to i915_gem_init_hw()
>   drm/i915: Update ppgtt_init_ring() & context_enable() to take requests
>   drm/i915: Update i915_switch_context() to take a request structure
>   drm/i915: Update do_switch() to take a request structure
>   drm/i915: Update deferred context creation to do explicit request management
>   drm/i915: Update init_context() to take a request structure
>   drm/i915: Update render_state_init() to take a request structure
>   drm/i915: Update i915_gem_object_sync() to take a request structure
>   drm/i915: Update overlay code to do explicit request management
>   drm/i915: Update queue_flip() to take a request structure
>   drm/i915: Update add_request() to take a request structure
>   drm/i915: Update [vma|object]_move_to_active() to take request structures
>   drm/i915: Update l3_remap to take a request structure
>   drm/i915: Update mi_set_context() to take a request structure
>   drm/i915: Update a bunch of execbuffer helpers to take request structures
>   drm/i915: Update workarounds_emit() to take request structures
>   drm/i915: Update flush_all_caches() to take request structures
>   drm/i915: Update switch_mm() to take a request structure
>   drm/i915: Update ring->flush() to take a requests structure
>   drm/i915: Update some flush helpers to take request structures
>   drm/i915: Update ring->emit_flush() to take a request structure
>   drm/i915: Update ring->add_request() to take a request structure
>   drm/i915: Update ring->emit_request() to take a request structure
>   drm/i915: Update ring->dispatch_execbuffer() to take a request structure
>   drm/i915: Update ring->emit_bb_start() to take a request structure
>   drm/i915: Update ring->sync_to() to take a request structure
>   drm/i915: Update ring->signal() to take a request structure
>   drm/i915: Update cacheline_align() to take a request structure
>   drm/i915: Update intel_ring_begin() to take a request structure
>   drm/i915: Update intel_logical_ring_begin() to take a request structure
>   drm/i915: Add *_ring_begin() to request allocation
>   drm/i915: Remove the now obsolete intel_ring_get_request()
>   drm/i915: Remove the now obsolete 'outstanding_lazy_request'
>   drm/i915: Move the request/file and request/pid association to creation time
>   drm/i915: Remove fallback poll for ring buffer space
>   drm/i915: Remove 'faked' request from LRC submission
>   drm/i915: Update a bunch of LRC functions to take requests
>   drm/i915: Remove the now obsolete 'i915_gem_check_olr()'
>   drm/i915: Remove the almost obsolete i915_gem_object_flush_active()
> 
>  drivers/gpu/drm/i915/i915_drv.h              |   78 ++--
>  drivers/gpu/drm/i915/i915_gem.c              |  388 ++++++++++-------
>  drivers/gpu/drm/i915/i915_gem_context.c      |   76 ++--
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c   |  126 ++++--
>  drivers/gpu/drm/i915/i915_gem_gtt.c          |   61 +--
>  drivers/gpu/drm/i915/i915_gem_gtt.h          |    3 +-
>  drivers/gpu/drm/i915/i915_gem_render_state.c |   15 +-
>  drivers/gpu/drm/i915/i915_gem_render_state.h |    2 +-
>  drivers/gpu/drm/i915/i915_trace.h            |   28 +-
>  drivers/gpu/drm/i915/intel_display.c         |   62 +--
>  drivers/gpu/drm/i915/intel_drv.h             |    3 +-
>  drivers/gpu/drm/i915/intel_fbdev.c           |    2 +-
>  drivers/gpu/drm/i915/intel_lrc.c             |  585 +++++++++++---------------
>  drivers/gpu/drm/i915/intel_lrc.h             |   17 +-
>  drivers/gpu/drm/i915/intel_overlay.c         |   64 ++-
>  drivers/gpu/drm/i915/intel_ringbuffer.c      |  374 ++++++++--------
>  drivers/gpu/drm/i915/intel_ringbuffer.h      |   54 ++-
>  17 files changed, 1005 insertions(+), 933 deletions(-)
> 

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Re: [PATCH 00/59] Remove the outstanding_lazy_request

[Chris Wilson]

On Thu, May 28, 2015 at 01:02:51PM -0700, Jesse Barnes wrote:
> John, Tomas, where are we with this series?  I believe this is a
> prerequisite for the request->fence conversion, and also the native sync
> work, both of which I need for some stuff I'm doing.

It's a 60 patch series for ~800 line patch performing a single API
conversion. I call that unreviewable.

It also misses the *bugfixes* and improvements from the original.
-Chris

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Re: [PATCH 00/59] Remove the outstanding_lazy_request

[John Harrison]

I am currently rebasing (yet again) onto a newer nightly tree and going 
through the large number of merge conflicts. I have the anti-OLR and 
fence patches rebased but am still in the middle of the scheduler ones. 
I am hoping to post an updated patch set for anti-OLR at least later today.


On 28/05/2015 21:02, Jesse Barnes wrote:
> John, Tomas, where are we with this series?  I believe this is a
> prerequisite for the request->fence conversion, and also the native sync
> work, both of which I need for some stuff I'm doing.
>
> Thanks,
> Jesse
>
> On 03/19/2015 05:30 AM, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> The driver tracks GPU work using request structures. Unfortunately, this
>> tracking is not currently explicit but is done by means of a catch-all request
>> that floats around in the background hoovering up work until it gets submitted.
>> This background request (ring->outstanding_lazy_request or OLR) is created at
>> the point of actually writing to the ring rather than when a particular piece of
>> GPU work is started. This scheme sort of hangs together but causes a number of
>> issues. It can mean that multiple pieces of independent work are lumped together
>> in the same request or that work is not officially submitted until much later
>> than it was created.
>>
>> This patch series completely removes the OLR and explicitly tracks each piece of
>> work with it's own personal request structure from start to submission.
>>
>> The patch set seems to fix the "'gem_ringfill --r render' + ctrl-c straight
>> after boot" issue logged as BZ:88865. I haven't done any analysis of that
>> particular issue but the descriptions I've seen appear to blame an inconsistent
>> or mangled OLR.
>>
>> Note also that by the end of this series, a number of differences between the
>> legacy and execlist code paths have been removed. For example add_request() and
>> emit_request() now have the same signature thus could be merged back to a single
>> function pointer. Merging some of these together would also allow the removal of
>> a bunch of 'if(execlists)' tests where the difference is simply to call the
>> legacy function or the execlist one.
>>
>> v2: Rebased to newer nightly tree, fixed up a few minor issues, added two extra
>> patches - one to move the LRC ring begin around in the vein of other recent
>> reshuffles, the other to clean up some issues with i915_add_request().
>>
>> v3: Large re-work due to feedback from code review. Some patches have been
>> removed, extra ones have been added and others have been changed significantly.
>> It is recommended that all patches are reviewed from scratch rather than
>> assuming only certain ones have changed and need re-inspecting. The exceptions
>> are where the 'reviewed-by' tag has been kept because that patch was not
>> significantly affected.
>>
>> [Patches against drm-intel-nightly tree fetched 18/03/2015]
>>
>> John Harrison (59):
>>    drm/i915: Rename 'do_execbuf' to 'execbuf_submit'
>>    drm/i915: Make intel_logical_ring_begin() static
>>    drm/i915: Move common request allocation code into a common function
>>    drm/i915: Fix for ringbuf space wait in LRC mode
>>    drm/i915: Reserve ring buffer space for i915_add_request() commands
>>    drm/i915: i915_add_request must not fail
>>    drm/i915: Early alloc request in execbuff
>>    drm/i915: Set context in request from creation even in legacy mode
>>    drm/i915: Merged the many do_execbuf() parameters into a structure
>>    drm/i915: Simplify i915_gem_execbuffer_retire_commands() parameters
>>    drm/i915: Update alloc_request to return the allocated request
>>    drm/i915: Add request to execbuf params and add explicit cleanup
>>    drm/i915: Update the dispatch tracepoint to use params->request
>>    drm/i915: Update move_to_gpu() to take a request structure
>>    drm/i915: Update execbuffer_move_to_active() to take a request structure
>>    drm/i915: Add flag to i915_add_request() to skip the cache flush
>>    drm/i915: Update i915_gpu_idle() to manage its own request
>>    drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring
>>    drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()
>>    drm/i915: Don't tag kernel batches as user batches
>>    drm/i915: Add explicit request management to i915_gem_init_hw()
>>    drm/i915: Update ppgtt_init_ring() & context_enable() to take requests
>>    drm/i915: Update i915_switch_context() to take a request structure
>>    drm/i915: Update do_switch() to take a request structure
>>    drm/i915: Update deferred context creation to do explicit request management
>>    drm/i915: Update init_context() to take a request structure
>>    drm/i915: Update render_state_init() to take a request structure
>>    drm/i915: Update i915_gem_object_sync() to take a request structure
>>    drm/i915: Update overlay code to do explicit request management
>>    drm/i915: Update queue_flip() to take a request structure
>>    drm/i915: Update add_request() to take a request structure
>>    drm/i915: Update [vma|object]_move_to_active() to take request structures
>>    drm/i915: Update l3_remap to take a request structure
>>    drm/i915: Update mi_set_context() to take a request structure
>>    drm/i915: Update a bunch of execbuffer helpers to take request structures
>>    drm/i915: Update workarounds_emit() to take request structures
>>    drm/i915: Update flush_all_caches() to take request structures
>>    drm/i915: Update switch_mm() to take a request structure
>>    drm/i915: Update ring->flush() to take a requests structure
>>    drm/i915: Update some flush helpers to take request structures
>>    drm/i915: Update ring->emit_flush() to take a request structure
>>    drm/i915: Update ring->add_request() to take a request structure
>>    drm/i915: Update ring->emit_request() to take a request structure
>>    drm/i915: Update ring->dispatch_execbuffer() to take a request structure
>>    drm/i915: Update ring->emit_bb_start() to take a request structure
>>    drm/i915: Update ring->sync_to() to take a request structure
>>    drm/i915: Update ring->signal() to take a request structure
>>    drm/i915: Update cacheline_align() to take a request structure
>>    drm/i915: Update intel_ring_begin() to take a request structure
>>    drm/i915: Update intel_logical_ring_begin() to take a request structure
>>    drm/i915: Add *_ring_begin() to request allocation
>>    drm/i915: Remove the now obsolete intel_ring_get_request()
>>    drm/i915: Remove the now obsolete 'outstanding_lazy_request'
>>    drm/i915: Move the request/file and request/pid association to creation time
>>    drm/i915: Remove fallback poll for ring buffer space
>>    drm/i915: Remove 'faked' request from LRC submission
>>    drm/i915: Update a bunch of LRC functions to take requests
>>    drm/i915: Remove the now obsolete 'i915_gem_check_olr()'
>>    drm/i915: Remove the almost obsolete i915_gem_object_flush_active()
>>
>>   drivers/gpu/drm/i915/i915_drv.h              |   78 ++--
>>   drivers/gpu/drm/i915/i915_gem.c              |  388 ++++++++++-------
>>   drivers/gpu/drm/i915/i915_gem_context.c      |   76 ++--
>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c   |  126 ++++--
>>   drivers/gpu/drm/i915/i915_gem_gtt.c          |   61 +--
>>   drivers/gpu/drm/i915/i915_gem_gtt.h          |    3 +-
>>   drivers/gpu/drm/i915/i915_gem_render_state.c |   15 +-
>>   drivers/gpu/drm/i915/i915_gem_render_state.h |    2 +-
>>   drivers/gpu/drm/i915/i915_trace.h            |   28 +-
>>   drivers/gpu/drm/i915/intel_display.c         |   62 +--
>>   drivers/gpu/drm/i915/intel_drv.h             |    3 +-
>>   drivers/gpu/drm/i915/intel_fbdev.c           |    2 +-
>>   drivers/gpu/drm/i915/intel_lrc.c             |  585 +++++++++++---------------
>>   drivers/gpu/drm/i915/intel_lrc.h             |   17 +-
>>   drivers/gpu/drm/i915/intel_overlay.c         |   64 ++-
>>   drivers/gpu/drm/i915/intel_ringbuffer.c      |  374 ++++++++--------
>>   drivers/gpu/drm/i915/intel_ringbuffer.h      |   54 ++-
>>   17 files changed, 1005 insertions(+), 933 deletions(-)
>>

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Re: [PATCH 00/59] Remove the outstanding_lazy_request

[Jesse Barnes]

On 05/28/2015 02:20 PM, Chris Wilson wrote:
> On Thu, May 28, 2015 at 01:02:51PM -0700, Jesse Barnes wrote:
>> John, Tomas, where are we with this series?  I believe this is a
>> prerequisite for the request->fence conversion, and also the native sync
>> work, both of which I need for some stuff I'm doing.
> 
> It's a 60 patch series for ~800 line patch performing a single API
> conversion. I call that unreviewable.
> 
> It also misses the *bugfixes* and improvements from the original.

Can you be more specific?  The patches are relatively small, is it the
interactions that are tough to review?  And what bugfixes are missing?
Maybe you mentioned them on the previous thread, but I don't have it
handy to dig them out...

Jesse


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Re: [PATCH 00/59] Remove the outstanding_lazy_request

[Chris Wilson]

On Fri, May 29, 2015 at 07:37:19AM -0700, Jesse Barnes wrote:
> On 05/28/2015 02:20 PM, Chris Wilson wrote:
> > On Thu, May 28, 2015 at 01:02:51PM -0700, Jesse Barnes wrote:
> >> John, Tomas, where are we with this series?  I believe this is a
> >> prerequisite for the request->fence conversion, and also the native sync
> >> work, both of which I need for some stuff I'm doing.
> > 
> > It's a 60 patch series for ~800 line patch performing a single API
> > conversion. I call that unreviewable.
> > 
> > It also misses the *bugfixes* and improvements from the original.
> 
> Can you be more specific?  The patches are relatively small, is it the
> interactions that are tough to review?  And what bugfixes are missing?
> Maybe you mentioned them on the previous thread, but I don't have it
> handy to dig them out...

The point is that the new API is never demonstrated, there is no natural
cascade of consequences of why it should be so and so the overview of
what the API should be is lost in the noise of so many patches. The
purpose here is to review the API, not the mechanical adaptation of the
code.

If you have been reading the patches, or even reviewing bug reports and
looking at regressions, the missing pieces from the first patch would be
fairly clear. The major point is that some of the bugs only become obvious
when the API is not changed piecemeal, because the new API should enforce
correctness and hence require the code to be fixed. The patch series fails
in that regard.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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