From mboxrd@z Thu Jan  1 00:00:00 1970
From: Julien Grall <julien.grall.oss@gmail.com>
Subject: Re: [PATCH 18/19] xen: arm: Annotate registers trapped
 when CNTHCTL_EL2.EL1PCEN == 0
Date: Mon, 06 Apr 2015 15:58:48 +0200
Message-ID: <55229118.7000405@gmail.com>
References: <1427796446.2115.34.camel@citrix.com>
	<1427796462-24376-18-git-send-email-ian.campbell@citrix.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"; Format="flowed"
Content-Transfer-Encoding: 7bit
Return-path: <xen-devel-bounces@lists.xen.org>
In-Reply-To: <1427796462-24376-18-git-send-email-ian.campbell@citrix.com>
List-Unsubscribe: <http://lists.xen.org/cgi-bin/mailman/options/xen-devel>,
	<mailto:xen-devel-request@lists.xen.org?subject=unsubscribe>
List-Post: <mailto:xen-devel@lists.xen.org>
List-Help: <mailto:xen-devel-request@lists.xen.org?subject=help>
List-Subscribe: <http://lists.xen.org/cgi-bin/mailman/listinfo/xen-devel>,
	<mailto:xen-devel-request@lists.xen.org?subject=subscribe>
Sender: xen-devel-bounces@lists.xen.org
Errors-To: xen-devel-bounces@lists.xen.org
To: Ian Campbell <ian.campbell@citrix.com>, xen-devel@lists.xen.org
Cc: julien.grall@linaro.org, tim@xen.org, stefano.stabellini@eu.citrix.com
List-Id: xen-devel@lists.xenproject.org

Hi Ian,

On 31/03/2015 12:07, Ian Campbell wrote:
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> ---
>   xen/arch/arm/traps.c |   20 ++++++++++++++++++--
>   1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index 1c9cf21..cc5b8dd 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -1642,6 +1642,12 @@ static void do_cp15_32(struct cpu_user_regs *regs,
>
>       switch ( hsr.bits & HSR_CP32_REGS_MASK )
>       {
> +    /*
> +     * !CNTHCTL_EL2.EL1PCEN / !CNTHCTL.PL1PCEN

I will be picky. The listing here is ARMv8 (AArch64) / ARMv7, but below 
it's ARMv7 / ARMv8.

> +     *
> +     * ARMv7 (DDI 0406C.b): B4.1.22
> +     * ARMv8 (DDI 0487A.d): D1-1510 Table D1-60
> +     */
>       case HSR_CPREG32(CNTP_CTL):
>       case HSR_CPREG32(CNTP_TVAL):
>           if ( !vtimer_emulate(regs, hsr) )
> @@ -1757,6 +1763,12 @@ static void do_cp15_64(struct cpu_user_regs *regs,
>
>       switch ( hsr.bits & HSR_CP64_REGS_MASK )
>       {
> +    /*
> +     * !CNTHCTL_EL2.EL1PCEN / !CNTHCTL.PL1PCEN
> +     *
> +     * ARMv7 (DDI 0406C.b): B4.1.22
> +     * ARMv8 (DDI 0487A.d): D1-1510 Table D1-60
> +     */
>       case HSR_CPREG64(CNTP_CVAL):
>           if ( !vtimer_emulate(regs, hsr) )
>               return inject_undef_exception(regs, hsr);
> @@ -2120,14 +2132,18 @@ static void do_sysreg(struct cpu_user_regs *regs,
>            */
>           return handle_raz_wi(regs, x, hsr.sysreg.read, hsr, 1);
>
> -    /* Write only, Write ignore registers: */
> -

This comment should have been dropped in patch #14.

Regards,

-- 
Julien Grall