From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jan Kiszka Subject: Re: x86: Question regarding the reset value of LINT0 Date: Wed, 08 Apr 2015 19:06:12 +0200 Message-ID: <55256004.8030403@siemens.com> References: <2B474EEE-85C9-47C3-89FF-C56754CFEC0D@gmail.com> <55255AF2.2070706@siemens.com> <06513D06-1629-4AC0-9014-C6D13C29A1FC@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: kvm list To: Nadav Amit , Avi Kivity Return-path: Received: from goliath.siemens.de ([192.35.17.28]:52711 "EHLO goliath.siemens.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753519AbbDHRGQ (ORCPT ); Wed, 8 Apr 2015 13:06:16 -0400 In-Reply-To: <06513D06-1629-4AC0-9014-C6D13C29A1FC@gmail.com> Sender: kvm-owner@vger.kernel.org List-ID: On 2015-04-08 18:59, Nadav Amit wrote: > Jan Kiszka wrote: >=20 >> On 2015-04-08 18:40, Nadav Amit wrote: >>> Hi, >>> >>> I would appreciate if someone explains the reason for enabling LINT= 0 during >>> APIC reset. This does not correspond with Intel SDM Figure 10-8: =E2= =80=9CLocal >>> Vector Table=E2=80=9D that says all LVT registers are reset to 0x10= 000. >>> >>> In kvm_lapic_reset, I see: >>> >>> apic_set_reg(apic, APIC_LVT0, >>> SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT)); >>> >>> Which is actually pretty similar to QEMU=E2=80=99s apic_reset_commo= n: >>> >>> if (bsp) { >>> /* >>> * LINT0 delivery mode on CPU #0 is set to ExtInt at initial= ization >>> * time typically by BIOS, so PIC interrupt can be delivered= to the >>> * processor when local APIC is enabled. >>> */ >>> s->lvt[APIC_LVT_LINT0] =3D 0x700; >>> } >>> >>> Yet, in both cases, I miss the point - if it is typically done by t= he BIOS, >>> why does QEMU or KVM enable it? >>> >>> BTW: KVM seems to run fine without it, and I think setting it cause= s me >>> problems in certain cases. >> >> I suspect it has some historic BIOS backgrounds. Already tried to fi= nd >> more information in the git logs of both code bases? Or something th= at >> indicates of SeaBIOS or BochsBIOS once didn't do this initialization= ? > Thanks. I found no indication of such thing. >=20 > QEMU=E2=80=99s commit message (0e21e12bb311c4c1095d0269dc2ef81196ccb6= 0a) says: >=20 > Don't route PIC interrupts through the local APIC if the local AP= IC > config says so. By Ari Kivity. > =20 > Maybe Avi Kivity knows this guy. ths? That should have been Thiemo Seufer (IIRC), but he just committed the code back then (and is no longer with us, sadly). But if that commit went in without any BIOS changes around it, QEMU simply had to do the job of the latter to keep things working. Jan --=20 Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux