From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030682AbbD1SBF (ORCPT ); Tue, 28 Apr 2015 14:01:05 -0400 Received: from mail-am1on0078.outbound.protection.outlook.com ([157.56.112.78]:28448 "EHLO emea01-am1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1030316AbbD1SBC (ORCPT ); Tue, 28 Apr 2015 14:01:02 -0400 Authentication-Results: redhat.com; dkim=none (message not signed) header.d=none; Message-ID: <553FCAD0.9090403@ezchip.com> Date: Tue, 28 Apr 2015 14:00:48 -0400 From: Chris Metcalf User-Agent: Mozilla/5.0 (X11; Linux i686 on x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Peter Zijlstra CC: "Paul E. McKenney" , Manfred Spraul , Oleg Nesterov , Kirill Tkhai , , Ingo Molnar , Josh Poimboeuf Subject: Re: [PATCH 2/2] [PATCH] sched: Add smp_rmb() in task rq locking cycles References: <20150218224317.GC5029@twins.programming.kicks-ass.net> <20150219141905.GA11018@redhat.com> <54E77CC0.5030401@colorfullife.com> <20150220184551.GQ2896@worktop.programming.kicks-ass.net> <20150425195602.GA26676@linux.vnet.ibm.com> <20150426105213.GA27191@linux.vnet.ibm.com> <20150428143357.GF23123@twins.programming.kicks-ass.net> <553FACF1.2020405@ezchip.com> <20150428164033.GJ5029@twins.programming.kicks-ass.net> <553FBC4F.3070104@ezchip.com> <20150428174323.GL5029@twins.programming.kicks-ass.net> In-Reply-To: <20150428174323.GL5029@twins.programming.kicks-ass.net> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [12.216.194.146] X-ClientProxiedBy: BN1PR12CA0034.namprd12.prod.outlook.com (25.160.77.44) To HE1PR02MB0777.eurprd02.prod.outlook.com (25.161.118.141) X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:HE1PR02MB0777; X-Forefront-Antispam-Report: BMV:1;SFV:NSPM;SFS:(10009020)(6009001)(6049001)(479174004)(377454003)(24454002)(51704005)(87266999)(77156002)(65806001)(62966003)(23746002)(47776003)(64126003)(65956001)(66066001)(50466002)(19580395003)(54356999)(50986999)(15975445007)(76176999)(65816999)(122386002)(40100003)(42186005)(46102003)(77096005)(36756003)(110136001)(83506001)(92566002)(2950100001)(33656002)(59896002)(87976001)(93886004)(4001350100001)(86362001)(21314002)(18886065003);DIR:OUT;SFP:1101;SCL:1;SRVR:HE1PR02MB0777;H:[10.7.0.41];FPR:;SPF:None;MLV:sfv;LANG:en; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5002010)(5005006)(3002001);SRVR:HE1PR02MB0777;BCL:0;PCL:0;RULEID:;SRVR:HE1PR02MB0777; X-Forefront-PRVS: 0560A2214D X-OriginatorOrg: ezchip.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Apr 2015 18:00:57.8766 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR02MB0777 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/28/2015 01:43 PM, Peter Zijlstra wrote: > On Tue, Apr 28, 2015 at 12:58:55PM -0400, Chris Metcalf wrote: >> On 04/28/2015 12:40 PM, Peter Zijlstra wrote: >>> On Tue, Apr 28, 2015 at 11:53:21AM -0400, Chris Metcalf wrote: >>> >>>> The reason we use two 32-bit fields on tilepro is that the only available >>>> atomic instruction is tns (test and set), which sets a 32-bit "1" value >>>> into the target memory and returns the old 32-bit value. >>> And you want a ticket lock as opposed to the test-and-set lock because >>> with 64 tiles starvation under contention is a real worry? >> We see substantial unfairness under load with a plain spinlock, >> basically because nearer cores on the mesh network can exponentially >> crowd out further cores. The ticket lock avoids that, though we >> have to be careful to do backoff when checking the lock to avoid >> DDoS in the mesh network. > Does your arch have 16bit atomic load/stores ? If so, would something > like the below not make sense? Yes, tilepro can do 16-bit atomic load/stores. The reason we didn't use your approach (basically having tns provide locking for the head/tail) is just a perceived efficiency gain from rolling the tns lock into the head. The current tilepro arch_spin_lock() is just three mesh network transactions (tns, store, load). Your proposed spin lock is five (tns, load, store, store, load). Or, looking it from a core-centric perspective, the current arch_spin_lock() only has to wait on requests from the mesh network twice (tns, load), basically once for each member of the lock structure; your proposed version is three (tns, load, load). I don't honestly know how critical this difference is, but that's why I designed it the way I did. I think your goal with your proposed redesign is being able to atomically read head and tail together for arch_spin_unlock_wait(), but I don't see why that's better than just reading head, checking it's not equal to tail with a separate read, then spinning waiting for head to change. > > typedef struct { > union { > struct { > unsigned short head; > unsigned short tail; > }; > unsigned int tickets; > }; > unsigned int lock; > } arch_spinlock_t; > > static inline void ___tns_lock(unsigned int *lock) > { > while (tns(lock)) > cpu_relax(); > } > > static inline void ___tns_unlock(unsigned int *lock) > { > WRITE_ONCE(*lock, 0); > } > > static inline void arch_spin_lock(arch_spinlock_t *lock) > { > unsigned short head, tail; > > ___tns_lock(&lock->lock); /* XXX does the TNS imply a ___sync? */ > head = lock->head; > lock->head++; > ___tns_unlock(&lock->lock); > > while (READ_ONCE(lock->tail) != head) > cpu_relax(); > } > > static inline void arch_spin_unlock(arch_spinlock_t *lock) > { > /* > * can do with regular load/store because the lock owner > * is the only one going to do stores to the tail > */ > unsigned short tail = READ_ONCE(lock->tail); > smp_mb(); /* MB is stronger than RELEASE */ > WRITE_ONCE(lock->tail, tail + 1); > } > > static inline void arch_spin_unlock_wait(arch_spinlock_t *lock) > { > union { > struct { > unsigned short head; > unsigned short tail; > }; > unsigned int tickets; > } x; > > for (;;) { > x.tickets = READ_ONCE(lock->tickets); > if (x.head == x.tail) > break; > cpu_relax(); > } > } -- Chris Metcalf, EZChip Semiconductor http://www.ezchip.com