From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Subject: Re: [PATCH v8 14/16] ARM: dts: Introduce STM32F429 MCU Date: Fri, 22 May 2015 15:09:30 +0200 Message-ID: <555F2A8A.5020205@suse.de> References: <1431158038-3813-1-git-send-email-mcoquelin.stm32@gmail.com> <2282066.NWoIT9ZyLc@wuerfel> <13641152.Yt4ZI3oT6L@wuerfel> <1432285588.3929.28.camel@pengutronix.de> <20150522091822.GF8557@lukather> <1432289231.3929.60.camel@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Maxime Coquelin Cc: Mark Rutland , "linux-doc@vger.kernel.org" , Linus Walleij , Will Deacon , Stefan Agner , Nikolay Borisov , Peter Meerwald , "linux-api@vger.kernel.org" , Lee Jones , Mauro Carvalho Chehab , Linux-Arch , Daniel Thompson , Russell King , Pawel Moll , Jonathan Corbet , Jiri Slaby , Daniel Lezcano , Nicolae Rosia , Chanwoo Choi , Andy Shevchenko , Antti Palosaari , Geert Uytterhoeven List-Id: linux-gpio@vger.kernel.org QW0gMjIuMDUuMjAxNSB1bSAxNDozMiBzY2hyaWViIE1heGltZSBDb3F1ZWxpbjoKPiAyMDE1LTA1 LTIyIDEyOjA3IEdNVCswMjowMCBQaGlsaXBwIFphYmVsIDxwLnphYmVsQHBlbmd1dHJvbml4LmRl PjoKPj4gVGhlIFNUTTMyRjQyN3h4L1NUTTMyRjQyOXh4IG1hbnVhbCwgVGFibGUgMTMuICJTVE0z MkY0Mjd4eCBhbmQKPj4gU1RNMzJGNDI5eHggcmVnaXN0ZXIgYm91bmRhcnkgYWRkcmVzc2VzIiBj b250YWlucyB0aGlzIGVudHJ5Ogo+PiAgICAgQnVzICAgIEJvdW5kYXJ5IGFkZHJlc3MgICAgICAg UGVyaXBoZXJhbAo+PiAgICAgQUhCMSAgIDB4NDAwMjM4MDAtMHg0MDAyMzhiZiAgUkNDCj4+Cj4+ IEFuZCB0aGF0J3MgaG93IEknZCBleHBlY3QgaXQgdG8gYmUgZGVzY3JpYmVkIGJ5IHRoZSBkZXZp Y2UgdHJlZToKPj4KPj4gICAgIHJjYzogcmNjQDQwMDIzODAwIHsKPj4gICAgICAgICBjb21wYXRp YmxlID0gInN0LHN0bTMyLXJjYyI7Cj4+ICAgICAgICAgcmVnID0gPDB4NDAwMjM4MDAgMHhjMD47 Cj4+ICAgICB9Owo+Pgo+IAo+IERvaW5nIHRoYXQsIHNpbmNlIHRoaXMgcmVnaXN0ZXIgYmFuayBj b250YWlucyBib3RoIHJlc2V0IGFuZCBjbG9jawo+IHJlZ2lzdGVycywgdGhlIHJlc2V0IGRldmlj ZSBjYW5ub3QgZ2V0IHRoZSBJTyByZXNvdXJjZSBhdCBwcm9iZSB0aW1lCj4gYmVjYXVzZSB0aGUg Y2xvY2sgZHJpdmVyIGhhcyBhbHJlYWR5IHJlc2VydmVkIGl0Lgo+IERhbmllbCwgd2hvIGhhcyBz dGFydGVkIHRvIHdvcmsgb24gdGhlIGNsb2NrIGRyaXZlciBpcyBmYWNpbmcgdGhpcyBpc3N1ZS4K PiBUaGlzIGlzIHdoeSBJIHByb3Bvc2VkIHRoaXMgYmluZGluZyBmb3IgInJlZyIgcHJvcGVydHku CgpBcyB5b3Ugc2hvdWxkIGtub3csIEkgZGlkIGhhdmUgYW4gUkNDIGNsayBkcml2ZXIsIGFuZCB0 aGVyZSBpcyBubyBzdWNoCmlzc3VlLiBUaGUgdHdvIGRyaXZlcnMgdXNlIGRpZmZlcmVudCBtZWNo YW5pc21zIGZvciBpbml0aWFsaXphdGlvbi4gQW5kCkknbSBwcmV0dHkgc3VyZSB0aGF0IEkndmUg YWxyZWFkeSByZW1hcmtlZCB0aGF0IG9uIHRoZSBsaXN0LCB0b28uCgpSZWdhcmRzLApBbmRyZWFz CgotLSAKU1VTRSBMaW51eCBHbWJILCBNYXhmZWxkc3RyLiA1LCA5MDQwOSBOw7xybmJlcmcsIEdl cm1hbnkKR0Y6IEZlbGl4IEltZW5kw7ZyZmZlciwgSmFuZSBTbWl0aGFyZCwgRGlsaXAgVXBtYW55 dSwgR3JhaGFtIE5vcnRvbjsgSFJCCjIxMjg0IChBRyBOw7xybmJlcmcpCgpfX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2VybmVsIG1haWxp bmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3Rz LmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: afaerber@suse.de (=?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?=) Date: Fri, 22 May 2015 15:09:30 +0200 Subject: [PATCH v8 14/16] ARM: dts: Introduce STM32F429 MCU In-Reply-To: References: <1431158038-3813-1-git-send-email-mcoquelin.stm32@gmail.com> <2282066.NWoIT9ZyLc@wuerfel> <13641152.Yt4ZI3oT6L@wuerfel> <1432285588.3929.28.camel@pengutronix.de> <20150522091822.GF8557@lukather> <1432289231.3929.60.camel@pengutronix.de> Message-ID: <555F2A8A.5020205@suse.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Am 22.05.2015 um 14:32 schrieb Maxime Coquelin: > 2015-05-22 12:07 GMT+02:00 Philipp Zabel : >> The STM32F427xx/STM32F429xx manual, Table 13. "STM32F427xx and >> STM32F429xx register boundary addresses" contains this entry: >> Bus Boundary address Peripheral >> AHB1 0x40023800-0x400238bf RCC >> >> And that's how I'd expect it to be described by the device tree: >> >> rcc: rcc at 40023800 { >> compatible = "st,stm32-rcc"; >> reg = <0x40023800 0xc0>; >> }; >> > > Doing that, since this register bank contains both reset and clock > registers, the reset device cannot get the IO resource at probe time > because the clock driver has already reserved it. > Daniel, who has started to work on the clock driver is facing this issue. > This is why I proposed this binding for "reg" property. As you should know, I did have an RCC clk driver, and there is no such issue. The two drivers use different mechanisms for initialization. And I'm pretty sure that I've already remarked that on the list, too. Regards, Andreas -- SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Felix Imend?rffer, Jane Smithard, Dilip Upmanyu, Graham Norton; HRB 21284 (AG N?rnberg)