From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: [PATCH v3 07/10] x86/vMSI-X: support qword MMIO access Date: Fri, 05 Jun 2015 12:24:18 +0100 Message-ID: <5571A302020000780008146E@mail.emea.novell.com> References: <55719F9D0200007800081425@mail.emea.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="=__Part380C11F2.1__=" Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Z0pjZ-000437-S8 for xen-devel@lists.xenproject.org; Fri, 05 Jun 2015 11:24:22 +0000 In-Reply-To: <55719F9D0200007800081425@mail.emea.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel Cc: Andrew Cooper , Keir Fraser List-Id: xen-devel@lists.xenproject.org This is a MIME message. If you are reading this text, you may want to consider changing to a mail reader or gateway that understands how to properly handle MIME multipart messages. --=__Part380C11F2.1__= Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Content-Disposition: inline The specification explicitly provides for this, so we should have supported this from the beginning. Signed-off-by: Jan Beulich --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -209,7 +209,7 @@ static int msixtbl_read( unsigned int nr_entry, index; int r =3D X86EMUL_UNHANDLEABLE; =20 - if ( len !=3D 4 || (address & 3) ) + if ( (len !=3D 4 && len !=3D 8) || (address & (len - 1)) ) return r; =20 rcu_read_lock(&msixtbl_rcu_lock); @@ -227,15 +227,28 @@ static int msixtbl_read( !acc_bit(test, entry, nr_entry, index) ) goto out; *pval =3D entry->gentries[nr_entry].msi_ad[index]; + if ( len =3D=3D 8 ) + { + if ( index ) + offset =3D PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET; + else if ( acc_bit(test, entry, nr_entry, 1) ) + *pval |=3D (u64)entry->gentries[nr_entry].msi_ad[1] << = 32; + else + goto out; + } } - else=20 + if ( offset =3D=3D PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET ) { const struct msi_desc *msi_desc =3D msixtbl_addr_to_desc(entry, = address); =20 if ( !msi_desc ) goto out; - *pval =3D MASK_INSR(msi_desc->msi_attrib.guest_masked, - PCI_MSIX_VECTOR_BITMASK); + if ( len =3D=3D 4 ) + *pval =3D MASK_INSR(msi_desc->msi_attrib.guest_masked, + PCI_MSIX_VECTOR_BITMASK); + else + *pval |=3D (u64)MASK_INSR(msi_desc->msi_attrib.guest_masked, + PCI_MSIX_VECTOR_BITMASK) << 32; } =20 r =3D X86EMUL_OKAY; @@ -255,7 +268,7 @@ static int msixtbl_write(struct vcpu *v, unsigned long flags; struct irq_desc *desc; =20 - if ( len !=3D 4 || (address & 3) ) + if ( (len !=3D 4 && len !=3D 8) || (address & (len - 1)) ) return r; =20 rcu_read_lock(&msixtbl_rcu_lock); @@ -266,16 +279,23 @@ static int msixtbl_write(struct vcpu *v, nr_entry =3D (address - entry->gtable) / PCI_MSIX_ENTRY_SIZE; =20 offset =3D address & (PCI_MSIX_ENTRY_SIZE - 1); - if ( offset !=3D PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET) + if ( offset !=3D PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET ) { + index =3D offset / sizeof(uint32_t); if ( nr_entry < MAX_MSIX_ACC_ENTRIES )=20 { - index =3D offset / sizeof(uint32_t); entry->gentries[nr_entry].msi_ad[index] =3D val; acc_bit(set, entry, nr_entry, index); + if ( len =3D=3D 8 && !index ) + { + entry->gentries[nr_entry].msi_ad[1] =3D val >> 32; + acc_bit(set, entry, nr_entry, 1); + } } set_bit(nr_entry, &entry->table_flags); - goto out; + if ( len !=3D 8 || !index ) + goto out; + val >>=3D 32; } =20 /* Exit to device model when unmasking and address/data got modified. = */ @@ -305,7 +325,8 @@ static int msixtbl_write(struct vcpu *v, =20 unlock: spin_unlock_irqrestore(&desc->lock, flags); - r =3D X86EMUL_OKAY; + if ( len =3D=3D 4 ) + r =3D X86EMUL_OKAY; =20 out: rcu_read_unlock(&msixtbl_rcu_lock); --=__Part380C11F2.1__= Content-Type: text/plain; name="x86-vMSI-X-rw-qword.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="x86-vMSI-X-rw-qword.patch" x86/vMSI-X: support qword MMIO access=0A=0AThe specification explicitly = provides for this, so we should have=0Asupported this from the beginning.= =0A=0ASigned-off-by: Jan Beulich =0A=0A--- a/xen/arch/x8= 6/hvm/vmsi.c=0A+++ b/xen/arch/x86/hvm/vmsi.c=0A@@ -209,7 +209,7 @@ static = int msixtbl_read(=0A unsigned int nr_entry, index;=0A int r =3D = X86EMUL_UNHANDLEABLE;=0A =0A- if ( len !=3D 4 || (address & 3) )=0A+ = if ( (len !=3D 4 && len !=3D 8) || (address & (len - 1)) )=0A = return r;=0A =0A rcu_read_lock(&msixtbl_rcu_lock);=0A@@ -227,15 = +227,28 @@ static int msixtbl_read(=0A !acc_bit(test, entry, = nr_entry, index) )=0A goto out;=0A *pval =3D entry->gen= tries[nr_entry].msi_ad[index];=0A+ if ( len =3D=3D 8 )=0A+ = {=0A+ if ( index )=0A+ offset =3D PCI_MSIX_ENTRY_= VECTOR_CTRL_OFFSET;=0A+ else if ( acc_bit(test, entry, = nr_entry, 1) )=0A+ *pval |=3D (u64)entry->gentries[nr_entry]= .msi_ad[1] << 32;=0A+ else=0A+ goto out;=0A+ = }=0A }=0A- else =0A+ if ( offset =3D=3D PCI_MSIX_ENTRY_VECTOR_= CTRL_OFFSET )=0A {=0A const struct msi_desc *msi_desc =3D = msixtbl_addr_to_desc(entry, address);=0A =0A if ( !msi_desc )=0A = goto out;=0A- *pval =3D MASK_INSR(msi_desc->msi_attrib.gue= st_masked,=0A- PCI_MSIX_VECTOR_BITMASK);=0A+ = if ( len =3D=3D 4 )=0A+ *pval =3D MASK_INSR(msi_desc->msi_attr= ib.guest_masked,=0A+ PCI_MSIX_VECTOR_BITMASK);= =0A+ else=0A+ *pval |=3D (u64)MASK_INSR(msi_desc->msi_att= rib.guest_masked,=0A+ PCI_MSIX_VECTOR_BI= TMASK) << 32;=0A }=0A =0A r =3D X86EMUL_OKAY;=0A@@ -255,7 = +268,7 @@ static int msixtbl_write(struct vcpu *v,=0A unsigned long = flags;=0A struct irq_desc *desc;=0A =0A- if ( len !=3D 4 || = (address & 3) )=0A+ if ( (len !=3D 4 && len !=3D 8) || (address & (len = - 1)) )=0A return r;=0A =0A rcu_read_lock(&msixtbl_rcu_lock);= =0A@@ -266,16 +279,23 @@ static int msixtbl_write(struct vcpu *v,=0A = nr_entry =3D (address - entry->gtable) / PCI_MSIX_ENTRY_SIZE;=0A =0A = offset =3D address & (PCI_MSIX_ENTRY_SIZE - 1);=0A- if ( offset !=3D = PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET)=0A+ if ( offset !=3D PCI_MSIX_ENTRY_V= ECTOR_CTRL_OFFSET )=0A {=0A+ index =3D offset / sizeof(uint32_t)= ;=0A if ( nr_entry < MAX_MSIX_ACC_ENTRIES ) =0A {=0A- = index =3D offset / sizeof(uint32_t);=0A entry->gentries[n= r_entry].msi_ad[index] =3D val;=0A acc_bit(set, entry, = nr_entry, index);=0A+ if ( len =3D=3D 8 && !index )=0A+ = {=0A+ entry->gentries[nr_entry].msi_ad[1] =3D val >> = 32;=0A+ acc_bit(set, entry, nr_entry, 1);=0A+ = }=0A }=0A set_bit(nr_entry, &entry->table_flags);=0A- = goto out;=0A+ if ( len !=3D 8 || !index )=0A+ goto = out;=0A+ val >>=3D 32;=0A }=0A =0A /* Exit to device model = when unmasking and address/data got modified. */=0A@@ -305,7 +325,8 @@ = static int msixtbl_write(struct vcpu *v,=0A =0A unlock:=0A spin_unlock_= irqrestore(&desc->lock, flags);=0A- r =3D X86EMUL_OKAY;=0A+ if ( len = =3D=3D 4 )=0A+ r =3D X86EMUL_OKAY;=0A =0A out:=0A rcu_read_unloc= k(&msixtbl_rcu_lock);=0A --=__Part380C11F2.1__= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --=__Part380C11F2.1__=--