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From: Julien Grall <julien.grall@citrix.com>
To: Ian Campbell <ian.campbell@citrix.com>, Chen Baozi <cbz@baozis.org>
Cc: Julien Grall <julien.grall@citrix.com>,
	xen-devel@lists.xenproject.org, Chen Baozi <baozich@gmail.com>
Subject: Re: [PATCH V6 05/10] xen/arm64: gicv3: Use AFF1 when translating ICC_SGI1R_EL1 to cpumask
Date: Fri, 5 Jun 2015 19:25:32 +0100	[thread overview]
Message-ID: <5571E99C.9050803@citrix.com> (raw)
In-Reply-To: <1433520573.7108.337.camel@citrix.com>



On 05/06/2015 17:09, Ian Campbell wrote:
>> +         * injection, ignoring level 2 & 3.
>> +         */
>> +        if ( gicv3_sgir_to_cpumask(&vcpu_mask, sgir) )
>> +        {
>> +            gprintk(XENLOG_WARNING, "Wrong affinity in SGI1R_EL register\n");
>
> I don't think we need to log this. The guest has asked to send an SGI to
> a VCPU which we know can't possibly exist. I'm not sure what real h/w
> would do, but if it is e.g. UNPREDICTABLE then we should consider
> killing the guest here. I suspect it's actually just ignored, in which
> case we can silently do the same.

 From the spec:

"Note: if a bit is one and the bit does not correspond to a valid target 
processor, the bit must be ignored by the Distributor. In such cases, a 
Distributor may optionally generate an SEI."

The implementation of SEI is implementation defined. I'm not sure what 
would be the right behavior to adopt here.

Regards,

-- 
Julien Grall

  reply	other threads:[~2015-06-05 18:25 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-01 12:56 [PATCH V6 00/10] Support more than 8 vcpus on arm64 with GICv3 Chen Baozi
2015-06-01 12:56 ` [PATCH V6 01/10] xen/arm: gic-v3: Increase the size of GICR in address space for guest Chen Baozi
2015-06-05 15:49   ` Ian Campbell
2015-06-05 16:04     ` Julien Grall
2015-06-05 16:31       ` Ian Campbell
2015-06-05 18:07         ` Julien Grall
2015-06-01 12:56 ` [PATCH V6 02/10] xen/arm: Add functions of mapping between vCPUID and virtual affinity Chen Baozi
2015-06-05 15:54   ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 03/10] xen/arm: Use the new functions for vCPUID/vaffinity transformation Chen Baozi
2015-06-05 15:56   ` Ian Campbell
2015-06-05 18:18     ` Julien Grall
2015-06-08 10:05       ` Ian Campbell
2015-06-08 13:00         ` Julien Grall
2015-06-01 12:56 ` [PATCH V6 04/10] xen/arm: Use cpumask_t type for vcpu_mask in vgic_to_sgi Chen Baozi
2015-06-05 16:05   ` Ian Campbell
2015-06-10 10:21     ` Chen Baozi
2015-06-10 10:27       ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 05/10] xen/arm64: gicv3: Use AFF1 when translating ICC_SGI1R_EL1 to cpumask Chen Baozi
2015-06-05 16:09   ` Ian Campbell
2015-06-05 18:25     ` Julien Grall [this message]
2015-06-08 10:06       ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 06/10] tools/libxl: Set 'reg' of cpu node equal to MPIDR affinity for domU Chen Baozi
2015-06-05 16:11   ` Ian Campbell
2015-06-05 16:12   ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 07/10] xen/arm: Set 'reg' of cpu node for dom0 to match MPIDR's affinity Chen Baozi
2015-06-05 16:13   ` Ian Campbell
2015-06-01 12:56 ` [PATCH V6 08/10] xen: Add arch_domain_preinit to initialise vGIC before evtchn_init Chen Baozi
2015-06-05 16:22   ` Ian Campbell
2015-06-11  9:20     ` Chen Baozi
2015-06-11  9:37       ` Ian Campbell
2015-06-11 11:16         ` Chen Baozi
2015-06-11 11:47           ` Julien Grall
2015-06-11 12:45             ` Chen Baozi
2015-06-01 12:56 ` [PATCH V6 09/10] xen/arm: make domain_max_vcpus return value from vgic_ops Chen Baozi
2015-06-05 16:26   ` Ian Campbell
2015-06-05 16:39     ` Julien Grall
2015-06-01 12:56 ` [PATCH V6 10/10] xen/arm64: increase MAX_VIRT_CPUS to 128 on arm64 Chen Baozi
2015-06-05 16:27   ` Ian Campbell
2015-06-05 14:08 ` [PATCH V6 00/10] Support more than 8 vcpus on arm64 with GICv3 Ian Campbell
2015-06-05 14:37   ` Julien Grall
2015-06-05 15:15     ` Ian Campbell
2015-06-05 14:23 ` Ian Campbell

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