From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A06CC433EF for ; Thu, 17 Mar 2022 20:25:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229667AbiCQU0j (ORCPT ); Thu, 17 Mar 2022 16:26:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229595AbiCQU0g (ORCPT ); Thu, 17 Mar 2022 16:26:36 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D6DA114CD08; Thu, 17 Mar 2022 13:25:19 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 941081FB; Thu, 17 Mar 2022 13:25:19 -0700 (PDT) Received: from [10.57.43.230] (unknown [10.57.43.230]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7FC503F766; Thu, 17 Mar 2022 13:25:17 -0700 (PDT) Message-ID: <558f0c92-c499-daca-e1ad-2b16137f8c06@arm.com> Date: Thu, 17 Mar 2022 20:25:12 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH v2 2/3] dt-bindings: timer: Document arm, cortex-a7-timer in arch timer Content-Language: en-GB To: Kuldeep Singh , Marc Zyngier , Daniel Lezcano , Thomas Gleixner , Rob Herring , Marc Zyngier , Mark Rutland Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20220317191527.96237-1-singh.kuldeep87k@gmail.com> <20220317191527.96237-3-singh.kuldeep87k@gmail.com> From: Robin Murphy In-Reply-To: <20220317191527.96237-3-singh.kuldeep87k@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022-03-17 19:15, Kuldeep Singh wrote: > Renesas RZ/N1D platform uses compatible "arm,cortex-a7-timer" in > conjugation with "arm,armv7-timer". Since, initial entry is not > documented, it start raising dtbs_check warnings. > > ['arm,cortex-a7-timer', 'arm,armv7-timer'] is too long > 'arm,cortex-a7-timer' is not one of ['arm,armv7-timer', 'arm,armv8-timer'] > 'arm,cortex-a7-timer' is not one of ['arm,cortex-a15-timer'] > > Document this compatible to address it. The motivation to add this > change is taken from an already existing entry "arm,cortex-a15-timer". > Please note, this will not hurt any arch timer users. Eh, if it's never been documented or supported, I say just get rid of it. The arch timer interface is by definition part of a CPU, and we can tell what the CPU is by reading its ID registers. Indeed that's how the driver handles the non-zero number of CPU-specific errata that already exist - we don't need compatibles for that. In some ways it might have been nice to have *SoC-specific* compatibles given the difficulty some integrators seem to have had in wiring up a stable count *to* the interface, but it's not like they could be magically added to already-deployed DTs after a bug is discovered, and nor could we have mandated them from day 1 just in case and subsequently maintained a binding that is just an ever-growing list of every SoC. Oh well. Robin. > Signed-off-by: Kuldeep Singh > --- > Documentation/devicetree/bindings/timer/arm,arch_timer.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml > index ba2910f0a7b2..ea390e5df71d 100644 > --- a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml > +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml > @@ -26,6 +26,7 @@ properties: > - arm,armv8-timer > - items: > - enum: > + - arm,cortex-a7-timer > - arm,cortex-a15-timer > - const: arm,armv7-timer > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 815F0C433F5 for ; Thu, 17 Mar 2022 20:26:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UZpjDX2dWczSbyCa4wtrxjuK47BOzS0DIxqdRER1nu4=; b=fRgdnHwvsC9Zsc S1dPuYUXrevKzYDE4I0WKjgi1B9ODwjyxArQIhyJLif9RsHzKzko8SEfU/nzx/YeFUVtfM4FWWpuF 7AVi2qRR/uANYKtMH4bImblhtxjdx+HbNq6nIcGip85lEWzG17gusVKQbgEvqsAePmHQE7HsFEKe+ 6l1rt+qcI6kPfUrdmiwXLr1v9HWMfkpsSBHGmSoRwoioCyvqidHraPjggPg4mpLm3jdY7ArIohHcf nIjYGpmZM2g7xAiaKXMh/0iZGOgvam968v2mSNMYSgux+b3S0sKBoWRkQSnCQujlx7KNR8xlI15yQ PCjKOh/N9+2wNPkW42mw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUwgV-00HH0O-QV; Thu, 17 Mar 2022 20:25:23 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUwgS-00HGzN-HW for linux-arm-kernel@lists.infradead.org; Thu, 17 Mar 2022 20:25:22 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 941081FB; Thu, 17 Mar 2022 13:25:19 -0700 (PDT) Received: from [10.57.43.230] (unknown [10.57.43.230]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7FC503F766; Thu, 17 Mar 2022 13:25:17 -0700 (PDT) Message-ID: <558f0c92-c499-daca-e1ad-2b16137f8c06@arm.com> Date: Thu, 17 Mar 2022 20:25:12 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH v2 2/3] dt-bindings: timer: Document arm, cortex-a7-timer in arch timer Content-Language: en-GB To: Kuldeep Singh , Marc Zyngier , Daniel Lezcano , Thomas Gleixner , Rob Herring , Marc Zyngier , Mark Rutland Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20220317191527.96237-1-singh.kuldeep87k@gmail.com> <20220317191527.96237-3-singh.kuldeep87k@gmail.com> From: Robin Murphy In-Reply-To: <20220317191527.96237-3-singh.kuldeep87k@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220317_132520_665900_7AD39BAF X-CRM114-Status: GOOD ( 18.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2022-03-17 19:15, Kuldeep Singh wrote: > Renesas RZ/N1D platform uses compatible "arm,cortex-a7-timer" in > conjugation with "arm,armv7-timer". Since, initial entry is not > documented, it start raising dtbs_check warnings. > > ['arm,cortex-a7-timer', 'arm,armv7-timer'] is too long > 'arm,cortex-a7-timer' is not one of ['arm,armv7-timer', 'arm,armv8-timer'] > 'arm,cortex-a7-timer' is not one of ['arm,cortex-a15-timer'] > > Document this compatible to address it. The motivation to add this > change is taken from an already existing entry "arm,cortex-a15-timer". > Please note, this will not hurt any arch timer users. Eh, if it's never been documented or supported, I say just get rid of it. The arch timer interface is by definition part of a CPU, and we can tell what the CPU is by reading its ID registers. Indeed that's how the driver handles the non-zero number of CPU-specific errata that already exist - we don't need compatibles for that. In some ways it might have been nice to have *SoC-specific* compatibles given the difficulty some integrators seem to have had in wiring up a stable count *to* the interface, but it's not like they could be magically added to already-deployed DTs after a bug is discovered, and nor could we have mandated them from day 1 just in case and subsequently maintained a binding that is just an ever-growing list of every SoC. Oh well. Robin. > Signed-off-by: Kuldeep Singh > --- > Documentation/devicetree/bindings/timer/arm,arch_timer.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml > index ba2910f0a7b2..ea390e5df71d 100644 > --- a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml > +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml > @@ -26,6 +26,7 @@ properties: > - arm,armv8-timer > - items: > - enum: > + - arm,cortex-a7-timer > - arm,cortex-a15-timer > - const: arm,armv7-timer > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel