From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59757) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAHuc-00027A-PU for qemu-devel@nongnu.org; Wed, 01 Jul 2015 09:18:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZAHuZ-00082n-A5 for qemu-devel@nongnu.org; Wed, 01 Jul 2015 09:18:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39228) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAHuZ-00082b-00 for qemu-devel@nongnu.org; Wed, 01 Jul 2015 09:18:47 -0400 References: <1432686576-14816-1-git-send-email-pcacjr@zytor.com> <1435514338-20227-1-git-send-email-pcacjr@zytor.com> <1435514338-20227-3-git-send-email-pcacjr@zytor.com> From: Paolo Bonzini Message-ID: <5593E8B1.6000300@redhat.com> Date: Wed, 1 Jul 2015 15:18:41 +0200 MIME-Version: 1.0 In-Reply-To: <1435514338-20227-3-git-send-email-pcacjr@zytor.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v8 3/3] ich9: implement strap SPKR pin logic List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paulo Alcantara , qemu-devel@nongnu.org Cc: seabios@seabios.org, Paulo Alcantara , kraxel@redhat.com, mst@redhat.com On 28/06/2015 19:58, Paulo Alcantara wrote: > If the signal is sampled high, this indicates that the system is > strapped to the "No Reboot" mode (ICH9 will disable the TCO Timer syste= m > reboot feature). The status of this strap is readable via the NO_REBOOT > bit (CC: offset 0x3410:bit 5). >=20 > The NO_REBOOT bit is set when SPKR pin on ICH9 is sampled high. This bi= t > may be set or cleared by software if the strap is sampled low but may > not override the strap when it indicates "No Reboot". >=20 > This patch implements the logic where hardware has ability to set SPKR > pin through a property named "noreboot" and it's sampled high by > default. I know Michael suggested this, but I think default high is a worse default. It does not allow recovering from a hard lockup where you cannot process an NMI, unlike all other watchdogs implemented by QEMU. In fact, the Linux driver fails to start if the strap is high. My theory is that hardware manufacturers should only set the strap high if they want the firmware to have total control of the watchdog via SMIs (TCO_EN). If it is just a matter of being late in 2.4, just delay everything to 2.5. It doesn't require any more work from Paulo, as you can just flip the default yourself without adding a new machine type (in fact I'm still not sure why machine types for Q35 are versioned, since migration is not supported...). Paolo > Signed-off-by: Paulo Alcantara > --- > v7 -> v8: > * change property name to "noreboot" > * default "noreboot" property to high > * define property in dc->props > * update tco tests to support and exercise "noreboot" property > --- > hw/acpi/tco.c | 2 +- > hw/isa/lpc_ich9.c | 6 ++++++ > include/hw/i386/ich9.h | 5 +++++ > tests/tco-test.c | 18 ++++++++++++++++-- > 4 files changed, 28 insertions(+), 3 deletions(-) >=20 > diff --git a/hw/acpi/tco.c b/hw/acpi/tco.c > index 1794a54..7a026c2 100644 > --- a/hw/acpi/tco.c > +++ b/hw/acpi/tco.c > @@ -64,7 +64,7 @@ static void tco_timer_expired(void *opaque) > tr->tco.sts2 |=3D TCO_BOOT_STS; > tr->timeouts_no =3D 0; > =20 > - if (!(gcs & ICH9_CC_GCS_NO_REBOOT)) { > + if (!lpc->pin_strap.spkr_hi && !(gcs & ICH9_CC_GCS_NO_REBOOT))= { > watchdog_perform_action(); > tco_timer_stop(tr); > return; > diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c > index b547002..3b460d4 100644 > --- a/hw/isa/lpc_ich9.c > +++ b/hw/isa/lpc_ich9.c > @@ -688,6 +688,11 @@ static const VMStateDescription vmstate_ich9_lpc =3D= { > } > }; > =20 > +static Property ich9_lpc_properties[] =3D { > + DEFINE_PROP_BOOL("noreboot", ICH9LPCState, pin_strap.spkr_hi, true= ), > + DEFINE_PROP_END_OF_LIST(), > +}; > + > static void ich9_lpc_class_init(ObjectClass *klass, void *data) > { > DeviceClass *dc =3D DEVICE_CLASS(klass); > @@ -699,6 +704,7 @@ static void ich9_lpc_class_init(ObjectClass *klass,= void *data) > dc->reset =3D ich9_lpc_reset; > k->init =3D ich9_lpc_init; > dc->vmsd =3D &vmstate_ich9_lpc; > + dc->props =3D ich9_lpc_properties; > k->config_write =3D ich9_lpc_config_write; > dc->desc =3D "ICH9 LPC bridge"; > k->vendor_id =3D PCI_VENDOR_ID_INTEL; > diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h > index f5681a3..63c5cd8 100644 > --- a/include/hw/i386/ich9.h > +++ b/include/hw/i386/ich9.h > @@ -46,6 +46,11 @@ typedef struct ICH9LPCState { > ICH9LPCPMRegs pm; > uint32_t sci_level; /* track sci level */ > =20 > + /* 2.24 Pin Straps */ > + struct { > + bool spkr_hi; > + } pin_strap; > + > /* 10.1 Chipset Configuration registers(Memory Space) > which is pointed by RCBA */ > uint8_t chip_config[ICH9_CC_SIZE]; > diff --git a/tests/tco-test.c b/tests/tco-test.c > index 1a2fe3d..6a48188 100644 > --- a/tests/tco-test.c > +++ b/tests/tco-test.c > @@ -42,6 +42,7 @@ enum { > =20 > typedef struct { > const char *args; > + bool noreboot; > QPCIDevice *dev; > void *lpc_base; > void *tco_io_base; > @@ -53,7 +54,9 @@ static void test_init(TestData *d) > QTestState *qs; > char *s; > =20 > - s =3D g_strdup_printf("-machine q35 %s", !d->args ? "" : d->args); > + s =3D g_strdup_printf("-machine q35 %s %s", > + d->noreboot ? "" : "-global ICH9-LPC.noreboot=3D= false", > + !d->args ? "" : d->args); > qs =3D qtest_start(s); > qtest_irq_intercept_in(qs, "ioapic"); > g_free(s); > @@ -135,6 +138,7 @@ static void test_tco_defaults(void) > TestData d; > =20 > d.args =3D NULL; > + d.noreboot =3D true; > test_init(&d); > g_assert_cmpint(qpci_io_readw(d.dev, d.tco_io_base + TCO_RLD), =3D= =3D, > TCO_RLD_DEFAULT); > @@ -167,6 +171,7 @@ static void test_tco_timeout(void) > int ret; > =20 > d.args =3D NULL; > + d.noreboot =3D true; > test_init(&d); > =20 > stop_tco(&d); > @@ -210,6 +215,7 @@ static void test_tco_max_timeout(void) > int ret; > =20 > d.args =3D NULL; > + d.noreboot =3D true; > test_init(&d); > =20 > stop_tco(&d); > @@ -253,6 +259,7 @@ static void test_tco_second_timeout_pause(void) > QDict *ad; > =20 > td.args =3D "-watchdog-action pause"; > + td.noreboot =3D false; > test_init(&td); > =20 > stop_tco(&td); > @@ -277,6 +284,7 @@ static void test_tco_second_timeout_reset(void) > QDict *ad; > =20 > td.args =3D "-watchdog-action reset"; > + td.noreboot =3D false; > test_init(&td); > =20 > stop_tco(&td); > @@ -301,6 +309,7 @@ static void test_tco_second_timeout_shutdown(void) > QDict *ad; > =20 > td.args =3D "-watchdog-action shutdown"; > + td.noreboot =3D false; > test_init(&td); > =20 > stop_tco(&td); > @@ -325,6 +334,7 @@ static void test_tco_second_timeout_none(void) > QDict *ad; > =20 > td.args =3D "-watchdog-action none"; > + td.noreboot =3D false; > test_init(&td); > =20 > stop_tco(&td); > @@ -349,6 +359,7 @@ static void test_tco_ticks_counter(void) > uint16_t rld; > =20 > d.args =3D NULL; > + d.noreboot =3D true; > test_init(&d); > =20 > stop_tco(&d); > @@ -375,6 +386,7 @@ static void test_tco1_control_bits(void) > uint16_t val; > =20 > d.args =3D NULL; > + d.noreboot =3D true; > test_init(&d); > =20 > val =3D TCO_LOCK; > @@ -394,6 +406,7 @@ static void test_tco1_status_bits(void) > int ret; > =20 > d.args =3D NULL; > + d.noreboot =3D true; > test_init(&d); > =20 > stop_tco(&d); > @@ -421,7 +434,8 @@ static void test_tco2_status_bits(void) > uint16_t val; > int ret; > =20 > - d.args =3D "-watchdog-action none"; > + d.args =3D NULL; > + d.noreboot =3D true; > test_init(&d); > =20 > stop_tco(&d); >=20