From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH v4 0/4] virtio: Clean up scatterlists and use the DMA API Date: Tue, 28 Jul 2015 14:46:20 +0200 Message-ID: <55B7799C.3060908__18411.6141208962$1438087687$gmane$org@redhat.com> References: <55B73A49.9050206@redhat.com> <1438078345.7562.133.camel@kernel.crashing.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1438078345.7562.133.camel@kernel.crashing.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Benjamin Herrenschmidt Cc: "linux-s390@vger.kernel.org" , xen-devel , "Michael S. Tsirkin" , Stefan Hajnoczi , Rusty Russell , Andy Lutomirski , Christian Borntraeger , Cornelia Huck , "linux390@de.ibm.com" , Linux Virtualization List-Id: xen-devel@lists.xenproject.org On 28/07/2015 12:12, Benjamin Herrenschmidt wrote: >> > That is an experimental feature (it's x-iommu), so it can change. >> > >> > The plan was: >> > >> > - for PPC, virtio never honors IOMMU >> > >> > - for non-PPC, either have virtio always honor IOMMU, or enforce that >> > virtio is not under IOMMU. >> > > I dislike having PPC special cased. > > In fact, today x86 guests also assume that virtio bypasses IOMMU I > believe. In fact *all* guests do. This doesn't matter much, since the only guests that implement an IOMMU in QEMU are (afaik) PPC and x86, and x86 does not yet promise any kind of stability. > I would much prefer if the information as to whether it honors or not > gets passed to the guest somewhat. My preference goes for passing it via > the virtio config space but there were objections that it should be a > bus property (which is tricky to do with PCI and doesn't properly > reflect the fact that in qemu you can mix & match IOMMU-honoring devices > and bypassing-virtio on the same bus). Yes, for example on x86 it must be passed through the DMAR table. virtio-pci device must have a separate DRHD for them. In QEMU, you could add an "under-iommu" property to PCI bridges, and walk the hierarchy of bridges to build the DRHDs. Paolo