From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755681AbbHYONd (ORCPT ); Tue, 25 Aug 2015 10:13:33 -0400 Received: from foss.arm.com ([217.140.101.70]:41290 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754784AbbHYONc (ORCPT ); Tue, 25 Aug 2015 10:13:32 -0400 Message-ID: <55DC7806.2010003@arm.com> Date: Tue, 25 Aug 2015 15:13:26 +0100 From: Sudeep Holla User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.8.0 MIME-Version: 1.0 To: Leo Yan CC: Sudeep Holla , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "guodong.xu@linaro.org" , Jian Zhang , Zhenwei Wang , Haoju Mo , Dan Zhao , "kongfei@hisilicon.com" , Guangyue Zeng , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , Jassi Brar , Bintian Wang , Haojian Zhuang , Yiping Xu , Wei Xu Subject: Re: [PATCH v1 3/3] arm64: dts: add Hi6220 mailbox node References: <1439977055-1747-1-git-send-email-leo.yan@linaro.org> <1439977055-1747-4-git-send-email-leo.yan@linaro.org> <55DC532C.3020005@arm.com> <20150825140450.GB28262@leoy-linaro> In-Reply-To: <20150825140450.GB28262@leoy-linaro> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25/08/15 15:04, Leo Yan wrote: > Hi Sudeep, > > On Tue, Aug 25, 2015 at 12:36:12PM +0100, Sudeep Holla wrote: >> >> >> On 19/08/15 10:37, Leo Yan wrote: >>> On Hi6220, below memory regions in DDR have specific purpose: >>> >>> 0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime; >>> 0x0740,f000 - 0x0740,ffff: For MCU firmware's section; >>> 0x06df,f000 - 0x06df,ffff: For mailbox message data. >>> >> >> Unless I am reading the DTS file completely wrong, I don't think the >> above memory regions are in DDR as per the memory node. > > i'm not sure if understand correctly for your question; Hikey board > has DDR 1GB@0x0, but there have some memory regions are used for MCU. > Ah, I misread the address range, left the leading zero and assumed they are not in DDR range. Sorry for the noise. Regards, Sudeep From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sudeep Holla Subject: Re: [PATCH v1 3/3] arm64: dts: add Hi6220 mailbox node Date: Tue, 25 Aug 2015 15:13:26 +0100 Message-ID: <55DC7806.2010003@arm.com> References: <1439977055-1747-1-git-send-email-leo.yan@linaro.org> <1439977055-1747-4-git-send-email-leo.yan@linaro.org> <55DC532C.3020005@arm.com> <20150825140450.GB28262@leoy-linaro> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20150825140450.GB28262@leoy-linaro> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Leo Yan Cc: Sudeep Holla , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , "guodong.xu-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" , Jian Zhang , Zhenwei Wang , Haoju Mo , Dan Zhao , "kongfei-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org" , Guangyue Zeng , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , Jassi Brar , Bintian Wang List-Id: devicetree@vger.kernel.org On 25/08/15 15:04, Leo Yan wrote: > Hi Sudeep, > > On Tue, Aug 25, 2015 at 12:36:12PM +0100, Sudeep Holla wrote: >> >> >> On 19/08/15 10:37, Leo Yan wrote: >>> On Hi6220, below memory regions in DDR have specific purpose: >>> >>> 0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime; >>> 0x0740,f000 - 0x0740,ffff: For MCU firmware's section; >>> 0x06df,f000 - 0x06df,ffff: For mailbox message data. >>> >> >> Unless I am reading the DTS file completely wrong, I don't think the >> above memory regions are in DDR as per the memory node. > > i'm not sure if understand correctly for your question; Hikey board > has DDR 1GB@0x0, but there have some memory regions are used for MCU. > Ah, I misread the address range, left the leading zero and assumed they are not in DDR range. Sorry for the noise. Regards, Sudeep -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: sudeep.holla@arm.com (Sudeep Holla) Date: Tue, 25 Aug 2015 15:13:26 +0100 Subject: [PATCH v1 3/3] arm64: dts: add Hi6220 mailbox node In-Reply-To: <20150825140450.GB28262@leoy-linaro> References: <1439977055-1747-1-git-send-email-leo.yan@linaro.org> <1439977055-1747-4-git-send-email-leo.yan@linaro.org> <55DC532C.3020005@arm.com> <20150825140450.GB28262@leoy-linaro> Message-ID: <55DC7806.2010003@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 25/08/15 15:04, Leo Yan wrote: > Hi Sudeep, > > On Tue, Aug 25, 2015 at 12:36:12PM +0100, Sudeep Holla wrote: >> >> >> On 19/08/15 10:37, Leo Yan wrote: >>> On Hi6220, below memory regions in DDR have specific purpose: >>> >>> 0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime; >>> 0x0740,f000 - 0x0740,ffff: For MCU firmware's section; >>> 0x06df,f000 - 0x06df,ffff: For mailbox message data. >>> >> >> Unless I am reading the DTS file completely wrong, I don't think the >> above memory regions are in DDR as per the memory node. > > i'm not sure if understand correctly for your question; Hikey board > has DDR 1GB at 0x0, but there have some memory regions are used for MCU. > Ah, I misread the address range, left the leading zero and assumed they are not in DDR range. Sorry for the noise. Regards, Sudeep