From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751983AbbJLGyY (ORCPT ); Mon, 12 Oct 2015 02:54:24 -0400 Received: from mailout4.w1.samsung.com ([210.118.77.14]:52624 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751682AbbJLGyU (ORCPT ); Mon, 12 Oct 2015 02:54:20 -0400 X-AuditID: cbfec7f5-f794b6d000001495-25-561b59199a0d Subject: Re: [PATCH v7 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range To: Yakir Yang , Inki Dae , Andrzej Hajda , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Jingoo Han , Thierry Reding , Rob Herring , joe@perches.com, Heiko Stuebner , Mark Yao References: <1444491357-26095-1-git-send-email-ykk@rock-chips.com> <1444624149-16180-1-git-send-email-ykk@rock-chips.com> Cc: Russell King , djkurtz@chromium.org, dianders@chromium.org, Sean Paul , Kukjin Kim , Kumar Gala , emil.l.velikov@gmail.com, Ian Campbell , Gustavo Padovan , Kishon Vijay Abraham I , Pawel Moll , ajaynumb@gmail.com, robherring2@gmail.com, javier@osg.samsung.com, Andy Yan , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org From: Krzysztof Kozlowski Message-id: <561B590B.6090806@samsung.com> Date: Mon, 12 Oct 2015 15:54:03 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-version: 1.0 In-reply-to: <1444624149-16180-1-git-send-email-ykk@rock-chips.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA02SfUyMcRzA/Z7f89ZxPB7ip/5gZ2bLRLJ8vQzLZs9f3muY4dKzq+nldlcm Zo6wHFdHTA5FS5FD69qQUo7KW28uhdadKUQl4xJuSo8Y/32++3y+2/ePL4/Fk0wAH5uQJBsS tHEaVkU/HqhpmjlpQ2Dk7GdXRXh5rY6Bou4LGDLqXyDIuT801ubfZWFfVg4DTX29LJQ9c1OQ 0X2Bgc9XDnIw+LqLgboPlxEc91hp6O6xU3DJe5qDM552GjrdjTR0dYZARnsXhoY3R1mo3d/N QXF7MwOu0rMsfH41iCGr/g4FrS413DxRSYH11FUaDpbf56D/61cW2opqEWRlvmeh1Tca6kyZ 3FKNZM+2I+lA6lFWOmNqpCVXuoWSfr5roaVbtjZOulzgZaXiwsOs5DlSQ0mOvL2SJfUjK5Vk DElvYTOWftoqaCm9pBBJN5qz8Spxo2pRtBwXu0M2zFq8VRXje1xD6SvVO91dzzkT+q4yI54n wlwycGCyGfkN4QTS4L7OmpGKF4WLiDjfnvwzeBExddRzSjVOiCP9135gRYwXHJi8+lTxW4jC btJZk80pAgtOhuyzpGFFsEIocRTksQqrhSBScMvKKEwL00ju2wGksL+wnhyzmpjhZiz5lumm lfP8hGXEVzVGQSwEE09jkFJgYTJx2HuwFQm2/xZs/yrbf9V5hAuRv5y8TW+M0sXPCTZq443J CbrgbYnxxWj4WfpuoovVC5xI4JFmlJovCYgUGe0OY0q8ExEea8ary9cERorqaG3KLtmQuMWQ HCcbnSiQpzUT1adLe9eJgk6bJG+XZb1s+Gsp3i/AhMaETMe9/Q9mrZi/59Cb1FLv9c1N94rC NWXLbT5PxKYvi6wj9Zurdlcs/D5azB8RFRiz5Jxv0m1H9aPI56vz8+12rXl28/aOhzGwUXes x/3UYgrPw1H80/fwJCzNdXZK+MK1EYebLE+qVzZMPbSlo32eLsw8g3UFUyOmlZXnhq7Qt2ho Y4w2JAgbjNpfcgaTkigDAAA= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12.10.2015 13:29, Yakir Yang wrote: > Both hsync/vsync polarity and interlace mode can be parsed from > drm display mode, and dynamic_range and ycbcr_coeff can be judge > by the video code. > > But presumably Exynos still relies on the DT properties, so take > good use of mode_fixup() in to achieve the compatibility hacks. > > Signed-off-by: Yakir Yang > --- > *just add a note that this is v7 of only fifth patch.* > > Changes in v7: > - Back to use the of_property_read_bool() interfacs to provoid backward > compatibility of "hsync-active-high" "vsync-active-high" "interlaced" > to avoid -EOVERFLOW error (Krzysztof) > > Changes in v6: None > Changes in v5: > - Switch video timing type to "u32", so driver could use "of_property_read_u32" > to get the backword timing values. Krzysztof suggest me that driver could use > the "of_property_read_bool" to get backword timing values, but that interfacs > would modify the original drm_display_mode timing directly (whether those > properties exists or not). > > Changes in v4: > - Provide backword compatibility with samsung. (Krzysztof) > > Changes in v3: > - Dynamic parse video timing info from struct drm_display_mode and > struct drm_display_info. (Thierry) > > Changes in v2: None > > drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 148 +++++++++++++-------- > drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +- > drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 14 +- > 3 files changed, 103 insertions(+), 61 deletions(-) > Looks good and backward compatible to me: Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 From: k.kozlowski@samsung.com (Krzysztof Kozlowski) Date: Mon, 12 Oct 2015 15:54:03 +0900 Subject: [PATCH v7 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range In-Reply-To: <1444624149-16180-1-git-send-email-ykk@rock-chips.com> References: <1444491357-26095-1-git-send-email-ykk@rock-chips.com> <1444624149-16180-1-git-send-email-ykk@rock-chips.com> Message-ID: <561B590B.6090806@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 12.10.2015 13:29, Yakir Yang wrote: > Both hsync/vsync polarity and interlace mode can be parsed from > drm display mode, and dynamic_range and ycbcr_coeff can be judge > by the video code. > > But presumably Exynos still relies on the DT properties, so take > good use of mode_fixup() in to achieve the compatibility hacks. > > Signed-off-by: Yakir Yang > --- > *just add a note that this is v7 of only fifth patch.* > > Changes in v7: > - Back to use the of_property_read_bool() interfacs to provoid backward > compatibility of "hsync-active-high" "vsync-active-high" "interlaced" > to avoid -EOVERFLOW error (Krzysztof) > > Changes in v6: None > Changes in v5: > - Switch video timing type to "u32", so driver could use "of_property_read_u32" > to get the backword timing values. Krzysztof suggest me that driver could use > the "of_property_read_bool" to get backword timing values, but that interfacs > would modify the original drm_display_mode timing directly (whether those > properties exists or not). > > Changes in v4: > - Provide backword compatibility with samsung. (Krzysztof) > > Changes in v3: > - Dynamic parse video timing info from struct drm_display_mode and > struct drm_display_info. (Thierry) > > Changes in v2: None > > drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 148 +++++++++++++-------- > drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 2 +- > drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 14 +- > 3 files changed, 103 insertions(+), 61 deletions(-) > Looks good and backward compatible to me: Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof