From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751667AbbJLJv6 (ORCPT ); Mon, 12 Oct 2015 05:51:58 -0400 Received: from foss.arm.com ([217.140.101.70]:46500 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751308AbbJLJv5 (ORCPT ); Mon, 12 Oct 2015 05:51:57 -0400 Message-ID: <561B82BA.30809@arm.com> Date: Mon, 12 Oct 2015 10:51:54 +0100 From: Marc Zyngier Organization: ARM Ltd User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Icedove/31.7.0 MIME-Version: 1.0 To: Markos Chandras , linux-mips@linux-mips.org CC: Alex Smith , Thomas Gleixner , Jason Cooper , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/3] irqchip: irq-mips-gic: Provide function to map GIC user section References: <1443435117-17144-1-git-send-email-markos.chandras@imgtec.com> <1444642843-16375-1-git-send-email-markos.chandras@imgtec.com> In-Reply-To: <1444642843-16375-1-git-send-email-markos.chandras@imgtec.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/10/15 10:40, Markos Chandras wrote: > From: Alex Smith > > The GIC provides a "user-mode visible" section containing a mirror of > the counter registers which can be mapped into user memory. This will > be used by the VDSO time function implementations, so provide a > function to map it in. > > When the GIC is not enabled in Kconfig a dummy inline version of this > function is provided, along with "#define gic_present 0", so that we > don't have to litter the VDSO code with ifdefs. > > [markos.chandras@imgtec.com: > - Move mapping code to arch/mips/kernel/vdso.c and use a resource > type to get the GIC usermode information > - Avoid renaming function arguments and use __gic_base_addr to hold > the base GIC address prior to ioremap.] > > Cc: Thomas Gleixner > Cc: Jason Cooper > Cc: Marc Zyngier > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Alex Smith > Signed-off-by: Markos Chandras > --- > Changes since v1: > - Move mapping code to arch/mips/kernel/vdso.c and use a resource > type to get the GIC usermode information > - Avoid renaming function arguments and use __gic_base_addr to hold > the base GIC address prior to ioremap. > > http://www.linux-mips.org/archives/linux-mips/2015-09/msg00316.html > --- > drivers/irqchip/irq-mips-gic.c | 14 ++++++++++++++ > include/linux/irqchip/mips-gic.h | 17 +++++++++++++++++ > 2 files changed, 31 insertions(+) > > diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c > index af2f16bb8a94..392beebb81ee 100644 > --- a/drivers/irqchip/irq-mips-gic.c > +++ b/drivers/irqchip/irq-mips-gic.c > @@ -29,6 +29,7 @@ struct gic_pcpu_mask { > DECLARE_BITMAP(pcpu_mask, GIC_MAX_INTRS); > }; > > +static unsigned long __gic_base_addr; > static void __iomem *gic_base; > static struct gic_pcpu_mask pcpu_masks[NR_CPUS]; > static DEFINE_SPINLOCK(gic_lock); > @@ -301,6 +302,17 @@ int gic_get_c0_fdc_int(void) > GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_FDC)); > } > > +int gic_get_usm_range(struct resource *gic_usm_res) > +{ > + if (!gic_present) > + return -1; > + > + gic_usm_res->start = __gic_base_addr + USM_VISIBLE_SECTION_OFS; > + gic_usm_res->end = gic_usm_res->start + (USM_VISIBLE_SECTION_SIZE - 1); > + > + return 0; > +} > + > static void gic_handle_shared_int(bool chained) > { > unsigned int i, intr, virq, gic_reg_step = mips_cm_is64 ? 8 : 4; > @@ -790,6 +802,8 @@ static void __init __gic_init(unsigned long gic_base_addr, > { > unsigned int gicconfig; > > + __gic_base_addr = gic_base_addr; > + > gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size); > > gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG)); > diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h > index 4e6861605050..71ab7c548550 100644 > --- a/include/linux/irqchip/mips-gic.h > +++ b/include/linux/irqchip/mips-gic.h > @@ -9,6 +9,7 @@ > #define __LINUX_IRQCHIP_MIPS_GIC_H > > #include > +#include > > #define GIC_MAX_INTRS 256 > > @@ -245,6 +246,8 @@ > #define GIC_SHARED_TO_HWIRQ(x) (GIC_SHARED_HWIRQ_BASE + (x)) > #define GIC_HWIRQ_TO_SHARED(x) ((x) - GIC_SHARED_HWIRQ_BASE) > > +#ifdef CONFIG_MIPS_GIC > + > extern unsigned int gic_present; > > extern void gic_init(unsigned long gic_base_addr, > @@ -264,4 +267,18 @@ extern unsigned int plat_ipi_resched_int_xlate(unsigned int); > extern int gic_get_c0_compare_int(void); > extern int gic_get_c0_perfcount_int(void); > extern int gic_get_c0_fdc_int(void); > +extern int gic_get_usm_range(struct resource *gic_usm_res); > + > +#else /* CONFIG_MIPS_GIC */ > + > +#define gic_present 0 > + > +static int gic_get_usm_range(struct resource *gic_usm_res) > +{ > + /* Shouldn't be called. */ > + return -1 > +} > + > +#endif /* CONFIG_MIPS_GIC */ > + > #endif /* __LINUX_IRQCHIP_MIPS_GIC_H */ > This looks much better than the previous version (though I cannot find the two other patches on LKML just yet). FWIW: Reviewed-by: Marc Zyngier M. -- Jazz is not dead. It just smells funny...