From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752715AbbJLW3h (ORCPT ); Mon, 12 Oct 2015 18:29:37 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:40487 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751601AbbJLW3f (ORCPT ); Mon, 12 Oct 2015 18:29:35 -0400 Subject: Re: [PATCH v6 11/17] Documentation: phy: add document for rockchip dp phy To: Yakir Yang , Inki Dae , Andrzej Hajda , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Jingoo Han , Thierry Reding , Krzysztof Kozlowski , Rob Herring , , Heiko Stuebner , Mark Yao References: <1444491357-26095-1-git-send-email-ykk@rock-chips.com> <1444492695-27241-1-git-send-email-ykk@rock-chips.com> CC: Russell King , , , Sean Paul , Kukjin Kim , Kumar Gala , , Ian Campbell , Gustavo Padovan , Pawel Moll , , , , Andy Yan , , , , , , From: Kishon Vijay Abraham I Message-ID: <561C3410.8090600@ti.com> Date: Tue, 13 Oct 2015 03:58:32 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <1444492695-27241-1-git-send-email-ykk@rock-chips.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Saturday 10 October 2015 09:28 PM, Yakir Yang wrote: > This phy driver is binded with the Rockchip DisplayPort > driver, here are the brief properties: > edp_phy: edp-phy@ff770274 { > compatible = "rockchip,rk3288-dp-phy"; > rockchip,grf = <&grf>; > clocks = <&cru SCLK_EDP_24M>; > clock-names = "24m"; > #phy-cells = <0>; > }; The commit message can simply be "Add dt binding documentation for rockchip display port PHY". Thanks Kishon > > Signed-off-by: Yakir Yang > --- > Changes in v6: None > Changes in v5: > - Split binding doc's from driver changes. (Rob) > - Update the rockchip,grf explain in document, and correct the clock required > elemets in document. (Rob & Heiko) > > Changes in v4: None > Changes in v3: None > Changes in v2: None > > .../devicetree/bindings/phy/rockchip-dp-phy.txt | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > > diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > new file mode 100644 > index 0000000..505194e > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > @@ -0,0 +1,22 @@ > +Rockchip Soc Seroes Display Port PHY > +------------------------------------ > + > +Required properties: > +- compatible : should be one of the following supported values: > + - "rockchip.rk3288-dp-phy" > +- clocks: from common clock binding: handle to dp clock. > + of memory mapped region. > +- clock-names: from common clock binding: > + Required elements: "24m" > +- rockchip,grf: phandle to the syscon managing the "general register files" > +- #phy-cells : from the generic PHY bindings, must be 0; > + > +Example: > + > +edp_phy: edp-phy@ff770274 { > + compatible = "rockchip,rk3288-dp-phy"; > + rockchip,grf = <&grf>; > + clocks = <&cru SCLK_EDP_24M>; > + clock-names = "24m"; > + #phy-cells = <0>; > +}; > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kishon Vijay Abraham I Subject: Re: [PATCH v6 11/17] Documentation: phy: add document for rockchip dp phy Date: Tue, 13 Oct 2015 03:58:32 +0530 Message-ID: <561C3410.8090600@ti.com> References: <1444491357-26095-1-git-send-email-ykk@rock-chips.com> <1444492695-27241-1-git-send-email-ykk@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1444492695-27241-1-git-send-email-ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Yakir Yang , Inki Dae , Andrzej Hajda , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Jingoo Han , Thierry Reding , Krzysztof Kozlowski , Rob Herring , joe-6d6DIl74uiNBDgjK7y7TUQ@public.gmane.org, Heiko Stuebner , Mark Yao Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Russell King , Pawel Moll , Ian Campbell , linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org, djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, javier-JPH+aEBZ4P+UEJcrhfAQsw@public.gmane.org, Kukjin Kim , Sean Paul , dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Kumar Gala , ajaynumb-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, Andy Yan , Gustavo Padovan , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org Hi, On Saturday 10 October 2015 09:28 PM, Yakir Yang wrote: > This phy driver is binded with the Rockchip DisplayPort > driver, here are the brief properties: > edp_phy: edp-phy@ff770274 { > compatible = "rockchip,rk3288-dp-phy"; > rockchip,grf = <&grf>; > clocks = <&cru SCLK_EDP_24M>; > clock-names = "24m"; > #phy-cells = <0>; > }; The commit message can simply be "Add dt binding documentation for rockchip display port PHY". Thanks Kishon > > Signed-off-by: Yakir Yang > --- > Changes in v6: None > Changes in v5: > - Split binding doc's from driver changes. (Rob) > - Update the rockchip,grf explain in document, and correct the clock required > elemets in document. (Rob & Heiko) > > Changes in v4: None > Changes in v3: None > Changes in v2: None > > .../devicetree/bindings/phy/rockchip-dp-phy.txt | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > > diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > new file mode 100644 > index 0000000..505194e > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > @@ -0,0 +1,22 @@ > +Rockchip Soc Seroes Display Port PHY > +------------------------------------ > + > +Required properties: > +- compatible : should be one of the following supported values: > + - "rockchip.rk3288-dp-phy" > +- clocks: from common clock binding: handle to dp clock. > + of memory mapped region. > +- clock-names: from common clock binding: > + Required elements: "24m" > +- rockchip,grf: phandle to the syscon managing the "general register files" > +- #phy-cells : from the generic PHY bindings, must be 0; > + > +Example: > + > +edp_phy: edp-phy@ff770274 { > + compatible = "rockchip,rk3288-dp-phy"; > + rockchip,grf = <&grf>; > + clocks = <&cru SCLK_EDP_24M>; > + clock-names = "24m"; > + #phy-cells = <0>; > +}; > From mboxrd@z Thu Jan 1 00:00:00 1970 From: kishon@ti.com (Kishon Vijay Abraham I) Date: Tue, 13 Oct 2015 03:58:32 +0530 Subject: [PATCH v6 11/17] Documentation: phy: add document for rockchip dp phy In-Reply-To: <1444492695-27241-1-git-send-email-ykk@rock-chips.com> References: <1444491357-26095-1-git-send-email-ykk@rock-chips.com> <1444492695-27241-1-git-send-email-ykk@rock-chips.com> Message-ID: <561C3410.8090600@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, On Saturday 10 October 2015 09:28 PM, Yakir Yang wrote: > This phy driver is binded with the Rockchip DisplayPort > driver, here are the brief properties: > edp_phy: edp-phy at ff770274 { > compatible = "rockchip,rk3288-dp-phy"; > rockchip,grf = <&grf>; > clocks = <&cru SCLK_EDP_24M>; > clock-names = "24m"; > #phy-cells = <0>; > }; The commit message can simply be "Add dt binding documentation for rockchip display port PHY". Thanks Kishon > > Signed-off-by: Yakir Yang > --- > Changes in v6: None > Changes in v5: > - Split binding doc's from driver changes. (Rob) > - Update the rockchip,grf explain in document, and correct the clock required > elemets in document. (Rob & Heiko) > > Changes in v4: None > Changes in v3: None > Changes in v2: None > > .../devicetree/bindings/phy/rockchip-dp-phy.txt | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > > diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > new file mode 100644 > index 0000000..505194e > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > @@ -0,0 +1,22 @@ > +Rockchip Soc Seroes Display Port PHY > +------------------------------------ > + > +Required properties: > +- compatible : should be one of the following supported values: > + - "rockchip.rk3288-dp-phy" > +- clocks: from common clock binding: handle to dp clock. > + of memory mapped region. > +- clock-names: from common clock binding: > + Required elements: "24m" > +- rockchip,grf: phandle to the syscon managing the "general register files" > +- #phy-cells : from the generic PHY bindings, must be 0; > + > +Example: > + > +edp_phy: edp-phy at ff770274 { > + compatible = "rockchip,rk3288-dp-phy"; > + rockchip,grf = <&grf>; > + clocks = <&cru SCLK_EDP_24M>; > + clock-names = "24m"; > + #phy-cells = <0>; > +}; >