From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44882) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZzRgb-00079r-EO for qemu-devel@nongnu.org; Thu, 19 Nov 2015 11:03:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZzRgV-0004XP-Oq for qemu-devel@nongnu.org; Thu, 19 Nov 2015 11:03:49 -0500 Received: from e19.ny.us.ibm.com ([129.33.205.209]:51186) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZzRgV-0004Wi-LF for qemu-devel@nongnu.org; Thu, 19 Nov 2015 11:03:43 -0500 Received: from localhost by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 19 Nov 2015 11:03:41 -0500 Message-ID: <564DF2AD.4080901@linux.vnet.ibm.com> Date: Thu, 19 Nov 2015 21:32:53 +0530 From: Aravinda Prasad MIME-Version: 1.0 References: <20151111171135.4328.41819.stgit@aravindap> <20151111171602.4328.34006.stgit@aravindap> <56444957.9080003@redhat.com> <5644D931.1070407@linux.vnet.ibm.com> <564D2C4D.7000202@ozlabs.ru> In-Reply-To: <564D2C4D.7000202@ozlabs.ru> Content-Type: text/plain; charset=KOI8-R Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 4/4] target-ppc: Handle NMI guest exit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexey Kardashevskiy Cc: Thomas Huth , benh@au1.ibm.com, agraf@suse.de, qemu-devel@nongnu.org, paulus@samba.org, qemu-ppc@nongnu.org, sam.bobroff@au1.ibm.com, david@gibson.dropbear.id.au On Thursday 19 November 2015 07:26 AM, Alexey Kardashevskiy wrote: > On 11/13/2015 05:23 AM, Aravinda Prasad wrote: > >>>> + >>>> +/* >>>> + * Currently KVM only passes on the uncorrected machine >>>> + * check memory error to guest. Other machine check errors >>>> + * such as SLB multi-hit and TLB multi-hit are recovered >>>> + * in KVM and are not passed on to guest. >>>> + * >>>> + * DSISR Bit for uncorrected machine check error. Based >>>> + * on arch/powerpc/include/asm/mce.h >>>> + */ >>>> +#define PPC_BIT(bit) (0x8000000000000000ULL >> bit) >>>> +#define P7_DSISR_MC_UE (PPC_BIT(48)) /* P8 too */ >>>> + >>>> +/* Adopted from kernel source arch/powerpc/include/asm/rtas.h */ >>>> +struct rtas_error_log { >>>> + /* Byte 0 */ >>>> + uint8_t byte0; /* Architectural version */ >>>> + >>>> + /* Byte 1 */ >>>> + uint8_t byte1; >>>> + /* XXXXXXXX >>>> + * XXX 3: Severity level of error >>>> + * XX 2: Degree of recovery >>>> + * X 1: Extended log present? >>>> + * XX 2: Reserved >>>> + */ >>>> + >>>> + /* Byte 2 */ >>>> + uint8_t byte2; >>>> + /* XXXXXXXX >>>> + * XXXX 4: Initiator of event >>>> + * XXXX 4: Target of failed operation >>>> + */ >>>> + uint8_t byte3; /* General event or error*/ >>>> + __be32 extended_log_length; /* length in bytes */ >>>> + unsigned char buffer[1]; /* Start of extended log */ >>>> + /* Variable length. */ >>>> +}; >>>> + >>>> +/* >>>> + * Data format in RTAS-Blob >>>> + * >>>> + * This structure contains error information related to Machine >>>> + * Check exception. This is filled up and copied to rtas-blob >>>> + * upon machine check exception. The address of rtas-blob is >>>> + * passed on to OS registered machine check notification >>>> + * routines upon machine check exception >>>> + */ >>>> +struct rtas_mc_log { >>>> + target_ulong r3; >>>> + struct rtas_error_log err_log; >>>> +}; >>>> + >>> >>> QEMU coding style is normally to use CamelCase for type names, see >>> chapter 3 in CODING_STYLE. >> >> Will take care in the next revision. > > Just to make it clear - the CamelCase comment is valid for the new > rtas_mc_log type but not for rtas_error_log which is a copy of kernel's > arch/powerpc/include/asm/rtas.h sure. Thanks. > > > > -- Regards, Aravinda