From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1162403AbbKTI5U (ORCPT ); Fri, 20 Nov 2015 03:57:20 -0500 Received: from regular1.263xmail.com ([211.150.99.135]:33428 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161167AbbKTI5S (ORCPT ); Fri, 20 Nov 2015 03:57:18 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: mark.yao@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: mark.yao@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Message-ID: <564EE060.5040404@rock-chips.com> Date: Fri, 20 Nov 2015 16:57:04 +0800 From: Mark yao User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.8.0 MIME-Version: 1.0 To: Chris Zhong , heiko@sntech.de, linux-rockchip@lists.infradead.org, treding@nvidia.com, emil.l.velikov@gmail.com CC: airlied@linux.ie, ajaykumar.rs@samsung.com, rmk+kernel@arm.linux.org.uk, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 03/13] drm/rockchip: return a true clock rate to adjusted_mode References: <1448007339-10966-1-git-send-email-zyw@rock-chips.com> <1448007339-10966-4-git-send-email-zyw@rock-chips.com> In-Reply-To: <1448007339-10966-4-git-send-email-zyw@rock-chips.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015年11月20日 16:15, Chris Zhong wrote: > Since the mipi dsi driver need to use the clock of vop to make the > calculation of Blanking. But sometimes the clock driver can not set a > accurate clock_rate for vop, get it by clk_round_rate before mode_set, > so we can get the true value. > > Signed-off-by: Chris Zhong > > --- > > Changes in v4: > use clk_round_rate to check the clock rate in vop_crtc_mode_fixup > > Changes in v3: None > Changes in v2: None > > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > index 5d8ae5e..eff545b 100644 > --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > @@ -1136,9 +1136,14 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, > const struct drm_display_mode *mode, > struct drm_display_mode *adjusted_mode) > { > + struct vop *vop = to_vop(crtc); > + > if (adjusted_mode->htotal == 0 || adjusted_mode->vtotal == 0) > return false; > > + adjusted_mode->clock = > + clk_round_rate(vop->dclk, mode->clock * 1000) / 1000; > + > return true; > } > Looks good for me, so Acked-by: Mark Yao -- Ｍark Yao From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark yao Subject: Re: [PATCH v4 03/13] drm/rockchip: return a true clock rate to adjusted_mode Date: Fri, 20 Nov 2015 16:57:04 +0800 Message-ID: <564EE060.5040404@rock-chips.com> References: <1448007339-10966-1-git-send-email-zyw@rock-chips.com> <1448007339-10966-4-git-send-email-zyw@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1448007339-10966-4-git-send-email-zyw@rock-chips.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Chris Zhong , heiko@sntech.de, linux-rockchip@lists.infradead.org, treding@nvidia.com, emil.l.velikov@gmail.com Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, rmk+kernel@arm.linux.org.uk, ajaykumar.rs@samsung.com, linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org T24gMjAxNeW5tDEx5pyIMjDml6UgMTY6MTUsIENocmlzIFpob25nIHdyb3RlOgo+IFNpbmNlIHRo ZSBtaXBpIGRzaSBkcml2ZXIgbmVlZCB0byB1c2UgdGhlIGNsb2NrIG9mIHZvcCB0byBtYWtlIHRo ZQo+IGNhbGN1bGF0aW9uIG9mIEJsYW5raW5nLiBCdXQgc29tZXRpbWVzIHRoZSBjbG9jayBkcml2 ZXIgY2FuIG5vdCBzZXQgYQo+IGFjY3VyYXRlIGNsb2NrX3JhdGUgZm9yIHZvcCwgZ2V0IGl0IGJ5 IGNsa19yb3VuZF9yYXRlIGJlZm9yZSBtb2RlX3NldCwKPiBzbyB3ZSBjYW4gZ2V0IHRoZSB0cnVl IHZhbHVlLgo+Cj4gU2lnbmVkLW9mZi1ieTogQ2hyaXMgWmhvbmcgPHp5d0Byb2NrLWNoaXBzLmNv bT4KPgo+IC0tLQo+Cj4gQ2hhbmdlcyBpbiB2NDoKPiB1c2UgY2xrX3JvdW5kX3JhdGUgdG8gY2hl Y2sgdGhlIGNsb2NrIHJhdGUgaW4gdm9wX2NydGNfbW9kZV9maXh1cAo+Cj4gQ2hhbmdlcyBpbiB2 MzogTm9uZQo+IENoYW5nZXMgaW4gdjI6IE5vbmUKPgo+ICAgZHJpdmVycy9ncHUvZHJtL3JvY2tj aGlwL3JvY2tjaGlwX2RybV92b3AuYyB8IDUgKysrKysKPiAgIDEgZmlsZSBjaGFuZ2VkLCA1IGlu c2VydGlvbnMoKykKPgo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvcm9j a2NoaXBfZHJtX3ZvcC5jIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV92 b3AuYwo+IGluZGV4IDVkOGFlNWUuLmVmZjU0NWIgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9ncHUv ZHJtL3JvY2tjaGlwL3JvY2tjaGlwX2RybV92b3AuYwo+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9y b2NrY2hpcC9yb2NrY2hpcF9kcm1fdm9wLmMKPiBAQCAtMTEzNiw5ICsxMTM2LDE0IEBAIHN0YXRp YyBib29sIHZvcF9jcnRjX21vZGVfZml4dXAoc3RydWN0IGRybV9jcnRjICpjcnRjLAo+ICAgCQkJ CWNvbnN0IHN0cnVjdCBkcm1fZGlzcGxheV9tb2RlICptb2RlLAo+ICAgCQkJCXN0cnVjdCBkcm1f ZGlzcGxheV9tb2RlICphZGp1c3RlZF9tb2RlKQo+ICAgewo+ICsJc3RydWN0IHZvcCAqdm9wID0g dG9fdm9wKGNydGMpOwo+ICsKPiAgIAlpZiAoYWRqdXN0ZWRfbW9kZS0+aHRvdGFsID09IDAgfHwg YWRqdXN0ZWRfbW9kZS0+dnRvdGFsID09IDApCj4gICAJCXJldHVybiBmYWxzZTsKPiAgIAo+ICsJ YWRqdXN0ZWRfbW9kZS0+Y2xvY2sgPQo+ICsJCWNsa19yb3VuZF9yYXRlKHZvcC0+ZGNsaywgbW9k ZS0+Y2xvY2sgKiAxMDAwKSAvIDEwMDA7Cj4gKwo+ICAgCXJldHVybiB0cnVlOwo+ICAgfQo+ICAg Ckxvb2tzIGdvb2QgZm9yIG1lLCBzbwogICAgIEFja2VkLWJ5OiBNYXJrIFlhbyA8bWFyay55YW9A cm9jay1jaGlwcy5jb20+CgoKLS0gCu+8rWFyayBZYW8KCgpfX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZl bEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWls bWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: mark.yao@rock-chips.com (Mark yao) Date: Fri, 20 Nov 2015 16:57:04 +0800 Subject: [PATCH v4 03/13] drm/rockchip: return a true clock rate to adjusted_mode In-Reply-To: <1448007339-10966-4-git-send-email-zyw@rock-chips.com> References: <1448007339-10966-1-git-send-email-zyw@rock-chips.com> <1448007339-10966-4-git-send-email-zyw@rock-chips.com> Message-ID: <564EE060.5040404@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2015?11?20? 16:15, Chris Zhong wrote: > Since the mipi dsi driver need to use the clock of vop to make the > calculation of Blanking. But sometimes the clock driver can not set a > accurate clock_rate for vop, get it by clk_round_rate before mode_set, > so we can get the true value. > > Signed-off-by: Chris Zhong > > --- > > Changes in v4: > use clk_round_rate to check the clock rate in vop_crtc_mode_fixup > > Changes in v3: None > Changes in v2: None > > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > index 5d8ae5e..eff545b 100644 > --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > @@ -1136,9 +1136,14 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, > const struct drm_display_mode *mode, > struct drm_display_mode *adjusted_mode) > { > + struct vop *vop = to_vop(crtc); > + > if (adjusted_mode->htotal == 0 || adjusted_mode->vtotal == 0) > return false; > > + adjusted_mode->clock = > + clk_round_rate(vop->dclk, mode->clock * 1000) / 1000; > + > return true; > } > Looks good for me, so Acked-by: Mark Yao -- ?ark Yao