From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752429AbbLJDRb (ORCPT ); Wed, 9 Dec 2015 22:17:31 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:22635 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751856AbbLJDR3 (ORCPT ); Wed, 9 Dec 2015 22:17:29 -0500 X-AuditID: cbfec7f5-f79b16d000005389-55-5668eec62769 Subject: Re: [PATCH v2 13/19] ARM: dts: Add bus nodes using VDD_MIF for Exynos4x12 To: Chanwoo Choi , myungjoo.ham@samsung.com, kgene@kernel.org References: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> <1449634091-1842-14-git-send-email-cw00.choi@samsung.com> Cc: kyungmin.park@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, linux.amoon@gmail.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org From: Krzysztof Kozlowski X-Enigmail-Draft-Status: N1110 Message-id: <5668EEC0.80403@samsung.com> Date: Thu, 10 Dec 2015 12:17:20 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-version: 1.0 In-reply-to: <1449634091-1842-14-git-send-email-cw00.choi@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrJIsWRmVeSWpSXmKPExsVy+t/xa7rH3mWEGfR+FbC4/uU5q8X8I+dY LfrfLGS1OPdqJaPF6xeGFv2PXzNbnG16w25xedccNovPvUcYLWac38dksW7jLXaL25d5LZZe v8hkcbtxBZvFhOlrWSxa9x5ht2hb/YHVQdBjzbw1jB4tzT1sHpf7epk8ds66y+6xcvkXNo9N qzrZPP4dY/fo27KK0ePzJrkAzigum5TUnMyy1CJ9uwSujMZJU1gLjvFXTJ71n7GBcRZPFyMn h4SAiUTvwomsELaYxIV769m6GLk4hASWMkq8/bifDSQhJPCUUWJWdwaILSwQInFz7glGEFtE IExi9owfzBANDYwSTRemMII4zAJ3mSQuvn8C1s0mYCyxefkSNogVchK93ZNYQGxeAQ2J42dO gcVZBFQl3h84CGRzcIgKREgs2pEJUSIo8WPyPbByTgE3ia65e8FKmAX0JO5f1AIJMwvIS2xe 85Z5AqPgLCQdsxCqZiGpWsDIvIpRNLU0uaA4KT3XSK84Mbe4NC9dLzk/dxMjJAK/7mBceszq EKMAB6MSD2+FU3qYEGtiWXFl7iFGCQ5mJRFe5ucZYUK8KYmVValF+fFFpTmpxYcYpTlYlMR5 Z+56HyIkkJ5YkpqdmlqQWgSTZeLglGpgDDCbqnlt1hHT7Wsjudevu33sR3WPruSuM3J/Lp5h ZysoSOH+ZvZj+hGd0sgGqy3/Viw6dYDvf9S8h6UnQ4uc3/TPj2NavWJR6d6Aqdct+4U+2V/Z dP9pHmNz8MJLBUpWerM8ujcf2K78c+Vl8RUpyRfuuPl/F9fmnPFnGdsBw/aP2o+0DgQ//aXE UpyRaKjFXFScCADLKKaQvAIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09.12.2015 13:08, Chanwoo Choi wrote: > This patch adds the bus noes using VDD_MIF for Exynos4x12 SoC. s/noes/nodes/ > Exynos4x12 has the following AXI buses to translate data > between DRAM and DMC/ACP/C2C. > > Signed-off-by: Chanwoo Choi > --- > arch/arm/boot/dts/exynos4x12.dtsi | 72 +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 72 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi > index b77dac61ffb5..3bcf0939755e 100644 > --- a/arch/arm/boot/dts/exynos4x12.dtsi > +++ b/arch/arm/boot/dts/exynos4x12.dtsi > @@ -282,6 +282,78 @@ > clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>; > #iommu-cells = <0>; > }; > + > + bus_dmc: bus_dmc { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DIV_DMC>; > + clock-names = "bus"; > + operating-points-v2 = <&bus_dmc_opp_table>; > + status = "disabled"; > + }; > + > + bus_acp: bus_acp { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DIV_ACP>; > + clock-names = "bus"; > + operating-points-v2 = <&bus_acp_opp_table>; > + status = "disabled"; > + }; > + > + bus_c2c: bus_c2c { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DIV_C2C>; > + clock-names = "bus"; > + operating-points-v2 = <&bus_dmc_opp_table>; > + status = "disabled"; > + }; > + > + bus_dmc_opp_table: opp_table1 { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp00 { > + opp-hz = /bits/ 64 <100000000>; > + opp-microvolt = <900000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <134000000>; > + opp-microvolt = <900000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <160000000>; > + opp-microvolt = <900000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <200000000>; > + opp-microvolt = <950000>; The exyno4_bus.c (from mainline) uses 267 MHz here. Why choosing 200 MHz? Best regards, Krzysztof