From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mario Smarduch Subject: Re: [PATCH v3 07/22] arm64: KVM: Implement system register save/restore Date: Thu, 10 Dec 2015 19:24:59 -0800 Message-ID: <566A420B.2080406@samsung.com> References: <1449485618-9443-1-git-send-email-marc.zyngier@arm.com> <1449485618-9443-8-git-send-email-marc.zyngier@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Ard Biesheuvel To: Marc Zyngier , Christoffer Dall Return-path: In-reply-to: <1449485618-9443-8-git-send-email-marc.zyngier@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu List-Id: kvm.vger.kernel.org Hi Marc, On 12/7/2015 2:53 AM, Marc Zyngier wrote: > Implement the system register save/restore as a direct translation of > the assembly code version. > > Signed-off-by: Marc Zyngier > Reviewed-by: Christoffer Dall > --- > arch/arm64/kvm/hyp/Makefile | 1 + > arch/arm64/kvm/hyp/hyp.h | 3 ++ > arch/arm64/kvm/hyp/sysreg-sr.c | 90 ++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 94 insertions(+) > create mode 100644 arch/arm64/kvm/hyp/sysreg-sr.c > > diff --git a/arch/arm64/kvm/hyp/Makefile b/arch/arm64/kvm/hyp/Makefile > index 455dc0a..ec94200 100644 > --- a/arch/arm64/kvm/hyp/Makefile > +++ b/arch/arm64/kvm/hyp/Makefile > @@ -5,3 +5,4 @@ > obj-$(CONFIG_KVM_ARM_HOST) += vgic-v2-sr.o > obj-$(CONFIG_KVM_ARM_HOST) += vgic-v3-sr.o > obj-$(CONFIG_KVM_ARM_HOST) += timer-sr.o > +obj-$(CONFIG_KVM_ARM_HOST) += sysreg-sr.o > diff --git a/arch/arm64/kvm/hyp/hyp.h b/arch/arm64/kvm/hyp/hyp.h > index f213e46..778d56d 100644 > --- a/arch/arm64/kvm/hyp/hyp.h > +++ b/arch/arm64/kvm/hyp/hyp.h > @@ -38,5 +38,8 @@ void __vgic_v3_restore_state(struct kvm_vcpu *vcpu); > void __timer_save_state(struct kvm_vcpu *vcpu); > void __timer_restore_state(struct kvm_vcpu *vcpu); > > +void __sysreg_save_state(struct kvm_cpu_context *ctxt); > +void __sysreg_restore_state(struct kvm_cpu_context *ctxt); > + > #endif /* __ARM64_KVM_HYP_H__ */ > > diff --git a/arch/arm64/kvm/hyp/sysreg-sr.c b/arch/arm64/kvm/hyp/sysreg-sr.c > new file mode 100644 > index 0000000..add8fcb > --- /dev/null > +++ b/arch/arm64/kvm/hyp/sysreg-sr.c > @@ -0,0 +1,90 @@ > +/* > + * Copyright (C) 2012-2015 - ARM Ltd > + * Author: Marc Zyngier > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program. If not, see . > + */ > + > +#include > +#include > + > +#include > + > +#include "hyp.h" > + I looked closer on some other ways to get better performance out of the compiler. This code sequence performs about 35% faster for __sysreg_save_state(..) for 5000 exits you save about 500mS or 100nS per exit. This is on Juno. register int volatile count asm("r2") = 0; do { .... } while(count); I didn't test the restore function (ran out of time) but I suspect it should be the same. The assembler pretty much uses all the GPRs, (a little too many, using stp to push 4 pairs on the stack and restore) looking at the assembler it all should execute out of order. FWIW I gave this a try since compilers like to optimize loops. I used 'cntpct_el0' counter register to measure the intervals. > +/* ctxt is already in the HYP VA space */ > +void __hyp_text __sysreg_save_state(struct kvm_cpu_context *ctxt) > +{ > + ctxt->sys_regs[MPIDR_EL1] = read_sysreg(vmpidr_el2); > + ctxt->sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1); > + ctxt->sys_regs[SCTLR_EL1] = read_sysreg(sctlr_el1); > + ctxt->sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1); > + ctxt->sys_regs[CPACR_EL1] = read_sysreg(cpacr_el1); > + ctxt->sys_regs[TTBR0_EL1] = read_sysreg(ttbr0_el1); > + ctxt->sys_regs[TTBR1_EL1] = read_sysreg(ttbr1_el1); > + ctxt->sys_regs[TCR_EL1] = read_sysreg(tcr_el1); > + ctxt->sys_regs[ESR_EL1] = read_sysreg(esr_el1); > + ctxt->sys_regs[AFSR0_EL1] = read_sysreg(afsr0_el1); > + ctxt->sys_regs[AFSR1_EL1] = read_sysreg(afsr1_el1); > + ctxt->sys_regs[FAR_EL1] = read_sysreg(far_el1); > + ctxt->sys_regs[MAIR_EL1] = read_sysreg(mair_el1); > + ctxt->sys_regs[VBAR_EL1] = read_sysreg(vbar_el1); > + ctxt->sys_regs[CONTEXTIDR_EL1] = read_sysreg(contextidr_el1); > + ctxt->sys_regs[TPIDR_EL0] = read_sysreg(tpidr_el0); > + ctxt->sys_regs[TPIDRRO_EL0] = read_sysreg(tpidrro_el0); > + ctxt->sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1); > + ctxt->sys_regs[AMAIR_EL1] = read_sysreg(amair_el1); > + ctxt->sys_regs[CNTKCTL_EL1] = read_sysreg(cntkctl_el1); > + ctxt->sys_regs[PAR_EL1] = read_sysreg(par_el1); > + ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1); > + > + ctxt->gp_regs.regs.sp = read_sysreg(sp_el0); > + ctxt->gp_regs.regs.pc = read_sysreg(elr_el2); > + ctxt->gp_regs.regs.pstate = read_sysreg(spsr_el2); > + ctxt->gp_regs.sp_el1 = read_sysreg(sp_el1); > + ctxt->gp_regs.elr_el1 = read_sysreg(elr_el1); > + ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg(spsr_el1); > +} > + > +void __hyp_text __sysreg_restore_state(struct kvm_cpu_context *ctxt) > +{ > + write_sysreg(ctxt->sys_regs[MPIDR_EL1], vmpidr_el2); > + write_sysreg(ctxt->sys_regs[CSSELR_EL1], csselr_el1); > + write_sysreg(ctxt->sys_regs[SCTLR_EL1], sctlr_el1); > + write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1); > + write_sysreg(ctxt->sys_regs[CPACR_EL1], cpacr_el1); > + write_sysreg(ctxt->sys_regs[TTBR0_EL1], ttbr0_el1); > + write_sysreg(ctxt->sys_regs[TTBR1_EL1], ttbr1_el1); > + write_sysreg(ctxt->sys_regs[TCR_EL1], tcr_el1); > + write_sysreg(ctxt->sys_regs[ESR_EL1], esr_el1); > + write_sysreg(ctxt->sys_regs[AFSR0_EL1], afsr0_el1); > + write_sysreg(ctxt->sys_regs[AFSR1_EL1], afsr1_el1); > + write_sysreg(ctxt->sys_regs[FAR_EL1], far_el1); > + write_sysreg(ctxt->sys_regs[MAIR_EL1], mair_el1); > + write_sysreg(ctxt->sys_regs[VBAR_EL1], vbar_el1); > + write_sysreg(ctxt->sys_regs[CONTEXTIDR_EL1], contextidr_el1); > + write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0); > + write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0); > + write_sysreg(ctxt->sys_regs[TPIDR_EL1], tpidr_el1); > + write_sysreg(ctxt->sys_regs[AMAIR_EL1], amair_el1); > + write_sysreg(ctxt->sys_regs[CNTKCTL_EL1], cntkctl_el1); > + write_sysreg(ctxt->sys_regs[PAR_EL1], par_el1); > + write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1); > + > + write_sysreg(ctxt->gp_regs.regs.sp, sp_el0); > + write_sysreg(ctxt->gp_regs.regs.pc, elr_el2); > + write_sysreg(ctxt->gp_regs.regs.pstate, spsr_el2); > + write_sysreg(ctxt->gp_regs.sp_el1, sp_el1); > + write_sysreg(ctxt->gp_regs.elr_el1, elr_el1); > + write_sysreg(ctxt->gp_regs.spsr[KVM_SPSR_EL1], spsr_el1); > +} > From mboxrd@z Thu Jan 1 00:00:00 1970 From: m.smarduch@samsung.com (Mario Smarduch) Date: Thu, 10 Dec 2015 19:24:59 -0800 Subject: [PATCH v3 07/22] arm64: KVM: Implement system register save/restore In-Reply-To: <1449485618-9443-8-git-send-email-marc.zyngier@arm.com> References: <1449485618-9443-1-git-send-email-marc.zyngier@arm.com> <1449485618-9443-8-git-send-email-marc.zyngier@arm.com> Message-ID: <566A420B.2080406@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Marc, On 12/7/2015 2:53 AM, Marc Zyngier wrote: > Implement the system register save/restore as a direct translation of > the assembly code version. > > Signed-off-by: Marc Zyngier > Reviewed-by: Christoffer Dall > --- > arch/arm64/kvm/hyp/Makefile | 1 + > arch/arm64/kvm/hyp/hyp.h | 3 ++ > arch/arm64/kvm/hyp/sysreg-sr.c | 90 ++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 94 insertions(+) > create mode 100644 arch/arm64/kvm/hyp/sysreg-sr.c > > diff --git a/arch/arm64/kvm/hyp/Makefile b/arch/arm64/kvm/hyp/Makefile > index 455dc0a..ec94200 100644 > --- a/arch/arm64/kvm/hyp/Makefile > +++ b/arch/arm64/kvm/hyp/Makefile > @@ -5,3 +5,4 @@ > obj-$(CONFIG_KVM_ARM_HOST) += vgic-v2-sr.o > obj-$(CONFIG_KVM_ARM_HOST) += vgic-v3-sr.o > obj-$(CONFIG_KVM_ARM_HOST) += timer-sr.o > +obj-$(CONFIG_KVM_ARM_HOST) += sysreg-sr.o > diff --git a/arch/arm64/kvm/hyp/hyp.h b/arch/arm64/kvm/hyp/hyp.h > index f213e46..778d56d 100644 > --- a/arch/arm64/kvm/hyp/hyp.h > +++ b/arch/arm64/kvm/hyp/hyp.h > @@ -38,5 +38,8 @@ void __vgic_v3_restore_state(struct kvm_vcpu *vcpu); > void __timer_save_state(struct kvm_vcpu *vcpu); > void __timer_restore_state(struct kvm_vcpu *vcpu); > > +void __sysreg_save_state(struct kvm_cpu_context *ctxt); > +void __sysreg_restore_state(struct kvm_cpu_context *ctxt); > + > #endif /* __ARM64_KVM_HYP_H__ */ > > diff --git a/arch/arm64/kvm/hyp/sysreg-sr.c b/arch/arm64/kvm/hyp/sysreg-sr.c > new file mode 100644 > index 0000000..add8fcb > --- /dev/null > +++ b/arch/arm64/kvm/hyp/sysreg-sr.c > @@ -0,0 +1,90 @@ > +/* > + * Copyright (C) 2012-2015 - ARM Ltd > + * Author: Marc Zyngier > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program. If not, see . > + */ > + > +#include > +#include > + > +#include > + > +#include "hyp.h" > + I looked closer on some other ways to get better performance out of the compiler. This code sequence performs about 35% faster for __sysreg_save_state(..) for 5000 exits you save about 500mS or 100nS per exit. This is on Juno. register int volatile count asm("r2") = 0; do { .... } while(count); I didn't test the restore function (ran out of time) but I suspect it should be the same. The assembler pretty much uses all the GPRs, (a little too many, using stp to push 4 pairs on the stack and restore) looking at the assembler it all should execute out of order. FWIW I gave this a try since compilers like to optimize loops. I used 'cntpct_el0' counter register to measure the intervals. > +/* ctxt is already in the HYP VA space */ > +void __hyp_text __sysreg_save_state(struct kvm_cpu_context *ctxt) > +{ > + ctxt->sys_regs[MPIDR_EL1] = read_sysreg(vmpidr_el2); > + ctxt->sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1); > + ctxt->sys_regs[SCTLR_EL1] = read_sysreg(sctlr_el1); > + ctxt->sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1); > + ctxt->sys_regs[CPACR_EL1] = read_sysreg(cpacr_el1); > + ctxt->sys_regs[TTBR0_EL1] = read_sysreg(ttbr0_el1); > + ctxt->sys_regs[TTBR1_EL1] = read_sysreg(ttbr1_el1); > + ctxt->sys_regs[TCR_EL1] = read_sysreg(tcr_el1); > + ctxt->sys_regs[ESR_EL1] = read_sysreg(esr_el1); > + ctxt->sys_regs[AFSR0_EL1] = read_sysreg(afsr0_el1); > + ctxt->sys_regs[AFSR1_EL1] = read_sysreg(afsr1_el1); > + ctxt->sys_regs[FAR_EL1] = read_sysreg(far_el1); > + ctxt->sys_regs[MAIR_EL1] = read_sysreg(mair_el1); > + ctxt->sys_regs[VBAR_EL1] = read_sysreg(vbar_el1); > + ctxt->sys_regs[CONTEXTIDR_EL1] = read_sysreg(contextidr_el1); > + ctxt->sys_regs[TPIDR_EL0] = read_sysreg(tpidr_el0); > + ctxt->sys_regs[TPIDRRO_EL0] = read_sysreg(tpidrro_el0); > + ctxt->sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1); > + ctxt->sys_regs[AMAIR_EL1] = read_sysreg(amair_el1); > + ctxt->sys_regs[CNTKCTL_EL1] = read_sysreg(cntkctl_el1); > + ctxt->sys_regs[PAR_EL1] = read_sysreg(par_el1); > + ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1); > + > + ctxt->gp_regs.regs.sp = read_sysreg(sp_el0); > + ctxt->gp_regs.regs.pc = read_sysreg(elr_el2); > + ctxt->gp_regs.regs.pstate = read_sysreg(spsr_el2); > + ctxt->gp_regs.sp_el1 = read_sysreg(sp_el1); > + ctxt->gp_regs.elr_el1 = read_sysreg(elr_el1); > + ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg(spsr_el1); > +} > + > +void __hyp_text __sysreg_restore_state(struct kvm_cpu_context *ctxt) > +{ > + write_sysreg(ctxt->sys_regs[MPIDR_EL1], vmpidr_el2); > + write_sysreg(ctxt->sys_regs[CSSELR_EL1], csselr_el1); > + write_sysreg(ctxt->sys_regs[SCTLR_EL1], sctlr_el1); > + write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1); > + write_sysreg(ctxt->sys_regs[CPACR_EL1], cpacr_el1); > + write_sysreg(ctxt->sys_regs[TTBR0_EL1], ttbr0_el1); > + write_sysreg(ctxt->sys_regs[TTBR1_EL1], ttbr1_el1); > + write_sysreg(ctxt->sys_regs[TCR_EL1], tcr_el1); > + write_sysreg(ctxt->sys_regs[ESR_EL1], esr_el1); > + write_sysreg(ctxt->sys_regs[AFSR0_EL1], afsr0_el1); > + write_sysreg(ctxt->sys_regs[AFSR1_EL1], afsr1_el1); > + write_sysreg(ctxt->sys_regs[FAR_EL1], far_el1); > + write_sysreg(ctxt->sys_regs[MAIR_EL1], mair_el1); > + write_sysreg(ctxt->sys_regs[VBAR_EL1], vbar_el1); > + write_sysreg(ctxt->sys_regs[CONTEXTIDR_EL1], contextidr_el1); > + write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0); > + write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0); > + write_sysreg(ctxt->sys_regs[TPIDR_EL1], tpidr_el1); > + write_sysreg(ctxt->sys_regs[AMAIR_EL1], amair_el1); > + write_sysreg(ctxt->sys_regs[CNTKCTL_EL1], cntkctl_el1); > + write_sysreg(ctxt->sys_regs[PAR_EL1], par_el1); > + write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1); > + > + write_sysreg(ctxt->gp_regs.regs.sp, sp_el0); > + write_sysreg(ctxt->gp_regs.regs.pc, elr_el2); > + write_sysreg(ctxt->gp_regs.regs.pstate, spsr_el2); > + write_sysreg(ctxt->gp_regs.sp_el1, sp_el1); > + write_sysreg(ctxt->gp_regs.elr_el1, elr_el1); > + write_sysreg(ctxt->gp_regs.spsr[KVM_SPSR_EL1], spsr_el1); > +} >