From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932175AbbLNJ7X (ORCPT ); Mon, 14 Dec 2015 04:59:23 -0500 Received: from mail-wm0-f50.google.com ([74.125.82.50]:34906 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752728AbbLNJ7V (ORCPT ); Mon, 14 Dec 2015 04:59:21 -0500 Message-ID: <566E926E.7090903@linaro.org> Date: Mon, 14 Dec 2015 09:57:02 +0000 From: Srinivas Kandagatla User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Caesar Wang , Heiko Stuebner CC: linux-rockchip@lists.infradead.org, Russell King , devicetree@vger.kernel.org, Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , Rob Herring , Pawel Moll , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 3/4] ARM: dts: rockchip: add eFuse node for rk3066a SoCs References: <1447227272-1728-1-git-send-email-wxt@rock-chips.com> <1447227272-1728-4-git-send-email-wxt@rock-chips.com> In-Reply-To: <1447227272-1728-4-git-send-email-wxt@rock-chips.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Heiko, Can you take the DT patches in this series via your tree. I picked up nvmem patches from this series. thanks, srini On 11/11/15 07:34, Caesar Wang wrote: > This patch add the eFuse dt node for rk3066a SoCs. > > Signed-off-by: Caesar Wang > --- > > arch/arm/boot/dts/rk3066a.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi > index 946f187..f61bb8a 100644 > --- a/arch/arm/boot/dts/rk3066a.dtsi > +++ b/arch/arm/boot/dts/rk3066a.dtsi > @@ -153,6 +153,19 @@ > clock-names = "timer", "pclk"; > }; > > + efuse: efuse@20010000 { > + compatible = "rockchip,rockchip-efuse"; > + reg = <0x20010000 0x4000>; > + #address-cells = <1>; > + #size-cells = <1>; > + clocks = <&cru PCLK_EFUSE>; > + clock-names = "pclk_efuse"; > + > + cpu_leakage: cpu_leakage { > + reg = <0x17 0x1>; > + }; > + }; > + > timer@20038000 { > compatible = "snps,dw-apb-timer-osc"; > reg = <0x20038000 0x100>; > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Srinivas Kandagatla Subject: Re: [PATCH 3/4] ARM: dts: rockchip: add eFuse node for rk3066a SoCs Date: Mon, 14 Dec 2015 09:57:02 +0000 Message-ID: <566E926E.7090903@linaro.org> References: <1447227272-1728-1-git-send-email-wxt@rock-chips.com> <1447227272-1728-4-git-send-email-wxt@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1447227272-1728-4-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Caesar Wang , Heiko Stuebner Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Russell King , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Kumar Gala , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Ian Campbell , Rob Herring , Pawel Moll , Mark Rutland , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org Heiko, Can you take the DT patches in this series via your tree. I picked up nvmem patches from this series. thanks, srini On 11/11/15 07:34, Caesar Wang wrote: > This patch add the eFuse dt node for rk3066a SoCs. > > Signed-off-by: Caesar Wang > --- > > arch/arm/boot/dts/rk3066a.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi > index 946f187..f61bb8a 100644 > --- a/arch/arm/boot/dts/rk3066a.dtsi > +++ b/arch/arm/boot/dts/rk3066a.dtsi > @@ -153,6 +153,19 @@ > clock-names = "timer", "pclk"; > }; > > + efuse: efuse@20010000 { > + compatible = "rockchip,rockchip-efuse"; > + reg = <0x20010000 0x4000>; > + #address-cells = <1>; > + #size-cells = <1>; > + clocks = <&cru PCLK_EFUSE>; > + clock-names = "pclk_efuse"; > + > + cpu_leakage: cpu_leakage { > + reg = <0x17 0x1>; > + }; > + }; > + > timer@20038000 { > compatible = "snps,dw-apb-timer-osc"; > reg = <0x20038000 0x100>; > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: srinivas.kandagatla@linaro.org (Srinivas Kandagatla) Date: Mon, 14 Dec 2015 09:57:02 +0000 Subject: [PATCH 3/4] ARM: dts: rockchip: add eFuse node for rk3066a SoCs In-Reply-To: <1447227272-1728-4-git-send-email-wxt@rock-chips.com> References: <1447227272-1728-1-git-send-email-wxt@rock-chips.com> <1447227272-1728-4-git-send-email-wxt@rock-chips.com> Message-ID: <566E926E.7090903@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Heiko, Can you take the DT patches in this series via your tree. I picked up nvmem patches from this series. thanks, srini On 11/11/15 07:34, Caesar Wang wrote: > This patch add the eFuse dt node for rk3066a SoCs. > > Signed-off-by: Caesar Wang > --- > > arch/arm/boot/dts/rk3066a.dtsi | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi > index 946f187..f61bb8a 100644 > --- a/arch/arm/boot/dts/rk3066a.dtsi > +++ b/arch/arm/boot/dts/rk3066a.dtsi > @@ -153,6 +153,19 @@ > clock-names = "timer", "pclk"; > }; > > + efuse: efuse at 20010000 { > + compatible = "rockchip,rockchip-efuse"; > + reg = <0x20010000 0x4000>; > + #address-cells = <1>; > + #size-cells = <1>; > + clocks = <&cru PCLK_EFUSE>; > + clock-names = "pclk_efuse"; > + > + cpu_leakage: cpu_leakage { > + reg = <0x17 0x1>; > + }; > + }; > + > timer at 20038000 { > compatible = "snps,dw-apb-timer-osc"; > reg = <0x20038000 0x100>; >