From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Nelson Date: Wed, 16 Dec 2015 10:07:02 -0700 Subject: [U-Boot] [PATCH 1/2] arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL In-Reply-To: <201512161750.44229.marex@denx.de> References: <1450276807-8960-1-git-send-email-marex@denx.de> <201512161633.34420.marex@denx.de> <56719140.20704@nelint.com> <201512161750.44229.marex@denx.de> Message-ID: <56719A36.5060803@nelint.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Marek, On 12/16/2015 09:50 AM, Marek Vasut wrote: > On Wednesday, December 16, 2015 at 05:28:48 PM, Eric Nelson wrote: >> On 12/16/2015 08:33 AM, Marek Vasut wrote: >>> On Wednesday, December 16, 2015 at 04:00:38 PM, Eric Nelson wrote: ... >>> I don't have SX/SL, so I couldn't test it there. >> >> I have a couple of SL boards, so I can do that (mx6slevk and a custom >> board using DDR3). Both of them support SPL, so it shouldn't take >> long to validate. > > Excellent! Let's do this as a subsequent patch though, since this code is > actually tested extensively and I'd like to keep it as a reference for > possible bisecting ;-) > Will do. I'll review and test your patch first, then follow up with SoloLite and LPDDR2 support. Regards, Eric