Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts

[Yang Zhang <yang.zhang.wz@gmail.com>]

On 2015/12/22 12:37, Wu, Feng wrote:
>
>
>> -----Original Message-----
>> From: linux-kernel-owner@vger.kernel.org [mailto:linux-kernel-
>> owner@vger.kernel.org] On Behalf Of Yang Zhang
>> Sent: Monday, December 21, 2015 10:06 AM
>> To: Wu, Feng <feng.wu@intel.com>; pbonzini@redhat.com;
>> rkrcmar@redhat.com
>> Cc: kvm@vger.kernel.org; linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-
>> priority interrupts
>>
>> On 2015/12/21 9:50, Wu, Feng wrote:
>>>
>>>
>>>> -----Original Message-----
>>>> From: Yang Zhang [mailto:yang.zhang.wz@gmail.com]
>>>> Sent: Monday, December 21, 2015 9:46 AM
>>>> To: Wu, Feng <feng.wu@intel.com>; pbonzini@redhat.com;
>>>> rkrcmar@redhat.com
>>>> Cc: kvm@vger.kernel.org; linux-kernel@vger.kernel.org
>>>> Subject: Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-
>>>> priority interrupts
>>>>
>>>> On 2015/12/16 9:37, Feng Wu wrote:
>>>>> Use vector-hashing to deliver lowest-priority interrupts, As an
>>>>> example, modern Intel CPUs in server platform use this method to
>>>>> handle lowest-priority interrupts.
>>>>>
>>>>> Signed-off-by: Feng Wu <feng.wu@intel.com>
>>>>> ---
>>>>>     arch/x86/kvm/irq_comm.c | 27 ++++++++++++++++++-----
>>>>>     arch/x86/kvm/lapic.c    | 57
>>>> ++++++++++++++++++++++++++++++++++++++++---------
>>>>>     arch/x86/kvm/lapic.h    |  2 ++
>>>>>     arch/x86/kvm/x86.c      |  9 ++++++++
>>>>>     arch/x86/kvm/x86.h      |  1 +
>>>>>     5 files changed, 81 insertions(+), 15 deletions(-)
>>>>>
>>>>>     bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic
>> *src,
>>>>>     		struct kvm_lapic_irq *irq, int *r, unsigned long *dest_map)
>>>>>     {
>>>>> @@ -731,17 +747,38 @@ bool kvm_irq_delivery_to_apic_fast(struct kvm
>>>> *kvm, struct kvm_lapic *src,
>>>>>     		dst = map->logical_map[cid];
>>>>>
>>>>>     		if (kvm_lowest_prio_delivery(irq)) {
>>>>> -			int l = -1;
>>>>> -			for_each_set_bit(i, &bitmap, 16) {
>>>>> -				if (!dst[i])
>>>>> -					continue;
>>>>> -				if (l < 0)
>>>>> -					l = i;
>>>>> -				else if (kvm_apic_compare_prio(dst[i]->vcpu,
>>>> dst[l]->vcpu) < 0)
>>>>> -					l = i;
>>>>> +			if (!kvm_vector_hashing_enabled()) {
>>>>> +				int l = -1;
>>>>> +				for_each_set_bit(i, &bitmap, 16) {
>>>>> +					if (!dst[i])
>>>>> +						continue;
>>>>> +					if (l < 0)
>>>>> +						l = i;
>>>>> +					else if (kvm_apic_compare_prio(dst[i]-
>>>>> vcpu, dst[l]->vcpu) < 0)
>>>>> +						l = i;
>>>>> +				}
>>>>> +				bitmap = (l >= 0) ? 1 << l : 0;
>>>>> +			} else {
>>>>> +				int idx = 0;
>>>>> +				unsigned int dest_vcpus = 0;
>>>>> +
>>>>> +				for_each_set_bit(i, &bitmap, 16) {
>>>>> +					if (!dst[i]
>>>> && !kvm_lapic_enabled(dst[i]->vcpu)) {
>>>>
>>>> It should be or(||) not and (&&).
>>>
>>> Oh, you are right! My negligence! Thanks for pointing this out, Yang!
>>
>> btw, i think the kvm_lapic_enabled check is wrong here? Why need it here?
>
> If the lapic is not enabled, I think we cannot recognize it as a candidate, can we?
> Maybe Radim can confirm this, Radim, what is your option?

Lapic can be disable by hw or sw. Here we only need to check the hw is 
enough which is already covered while injecting the interrupt into 
guest. I remember we(Glab, Macelo and me) have discussed it several ago, 
but i cannot find the mail thread.

>
> Thanks,
> Feng
>


-- 
best regards
yang