From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yu Dai Subject: Re: [PATCH] drm/i915/gen9: Correct max save/restore register count during gpu reset with GuC Date: Tue, 19 Jan 2016 10:13:43 -0800 Message-ID: <569E7CD7.2030301@intel.com> References: <1453132776-22229-1-git-send-email-arun.siluvery@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 5D1DE6E823 for ; Tue, 19 Jan 2016 10:17:25 -0800 (PST) In-Reply-To: <1453132776-22229-1-git-send-email-arun.siluvery@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Arun Siluvery , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org VGhhbmtzIGZvciBjYXB0dXJlIHRoZSB0eXBvLiBMR1RNLgoKUmV2aWV3ZWQtYnk6IEFsZXggRGFp IDx5dS5kYWlAaW50ZWwuY29tPgoKT24gMDEvMTgvMjAxNiAwNzo1OSBBTSwgQXJ1biBTaWx1dmVy eSB3cm90ZToKPiBJbiBHdUMgc3VibWlzc2lvbiBtb2RlLCBkcml2ZXIgaGFzIHRvIHByb3ZpZGUg YSBsaXN0IG9mIHJlZ2lzdGVycyB0byBiZQo+IHNhdmUvcmVzdG9yZWQgZHVyaW5nIGdwdSByZXNl dCwgbWFrZSB0aGUgbWF4IG5vLiBvZiByZWdpc3RlcnMgdmFsdWUgY29uc2lzdGVudAo+IHdpdGgg dGhhdCBvZiB0aGUgdmFsdWUgZGVmaW5lZCBpbiBGVy4gSWYgdGhleSBhcmUgbm90IGluIHN5bmMg dGhlbiByZWdpc3Rlcgo+IHNhdmUvcmVzdG9yZSBkdXJpbmcgZ3B1IHJlc2V0IHdvbid0IHdvcmsg YXMgZXhwZWN0ZWQuCj4KPiBDYzogQWxleCBEYWkgPHl1LmRhaUBpbnRlbC5jb20+Cj4gQ2M6IERh dmUgR29yZG9uIDxkYXZpZC5zLmdvcmRvbkBpbnRlbC5jb20+Cj4gU2lnbmVkLW9mZi1ieTogQXJ1 biBTaWx1dmVyeSA8YXJ1bi5zaWx1dmVyeUBsaW51eC5pbnRlbC5jb20+Cj4gLS0tCj4gICBkcml2 ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9ndWNfZndpZi5oIHwgMiArLQo+ICAgMSBmaWxlIGNoYW5n ZWQsIDEgaW5zZXJ0aW9uKCspLCAxIGRlbGV0aW9uKC0pCj4KPiBkaWZmIC0tZ2l0IGEvZHJpdmVy cy9ncHUvZHJtL2k5MTUvaW50ZWxfZ3VjX2Z3aWYuaCBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2lu dGVsX2d1Y19md2lmLmgKPiBpbmRleCAxMzBkOTRjLi4xZDgwNDhiIDEwMDY0NAo+IC0tLSBhL2Ry aXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2d1Y19md2lmLmgKPiArKysgYi9kcml2ZXJzL2dwdS9k cm0vaTkxNS9pbnRlbF9ndWNfZndpZi5oCj4gQEAgLTM3MCw3ICszNzAsNyBAQCBzdHJ1Y3QgZ3Vj X3BvbGljaWVzIHsKPiAgICNkZWZpbmUgR1VDX1JFR1NFVF9TQVZFX0RFRkFVTFRfVkFMVUUJMHg4 Cj4gICAjZGVmaW5lIEdVQ19SRUdTRVRfU0FWRV9DVVJSRU5UX1ZBTFVFCTB4MTAKPiAgIAo+IC0j ZGVmaW5lIEdVQ19SRUdTRVRfTUFYX1JFR0lTVEVSUwkyMAo+ICsjZGVmaW5lIEdVQ19SRUdTRVRf TUFYX1JFR0lTVEVSUwkyNQo+ICAgI2RlZmluZSBHVUNfTU1JT19XSElURV9MSVNUX1NUQVJUCTB4 MjRkMAo+ICAgI2RlZmluZSBHVUNfTU1JT19XSElURV9MSVNUX01BWAkJMTIKPiAgICNkZWZpbmUg R1VDX1MzX1NBVkVfU1BBQ0VfUEFHRVMJCTEwCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0 cy5mcmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xp c3RpbmZvL2ludGVsLWdmeAo=