From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934752AbcATBpR (ORCPT ); Tue, 19 Jan 2016 20:45:17 -0500 Received: from szxga01-in.huawei.com ([58.251.152.64]:3124 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933985AbcATBpG (ORCPT ); Tue, 19 Jan 2016 20:45:06 -0500 Subject: Re: [PATCH v6 1/6] clk: hisilicon: add CRG driver for hi3519 soc To: Rob Herring References: <1453171111-21921-1-git-send-email-xuejiancheng@huawei.com> <1453171111-21921-2-git-send-email-xuejiancheng@huawei.com> <20160119182317.GA3681@rob-hp-laptop> CC: , , , , , , , , , , , , , , , , , , , , , , , , , , From: xuejiancheng Message-ID: <569EE62E.3040003@huawei.com> Date: Wed, 20 Jan 2016 09:43:10 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <20160119182317.GA3681@rob-hp-laptop> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.217.211] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.569EE63C.0017,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 15341b0bc8bb0925a4ced667baa02bc2 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2016/1/20 2:23, Rob Herring wrote: > On Tue, Jan 19, 2016 at 10:38:26AM +0800, Jiancheng Xue wrote: >> The CRG(Clock and Reset Generator) block provides clock >> and reset signals for other modules in hi3519 soc. >> >> Signed-off-by: Jiancheng Xue >> --- >> .../devicetree/bindings/clock/hi3519-crg.txt | 46 +++++++ > > I already acked this. Please add ack's when posting new versions. > > Acked-by: Rob Herring > Hi Rob, I see. Thank you very much. Regards, Jiancheng >> drivers/clk/hisilicon/Kconfig | 7 ++ >> drivers/clk/hisilicon/Makefile | 2 + >> drivers/clk/hisilicon/clk-hi3519.c | 132 +++++++++++++++++++++ >> drivers/clk/hisilicon/clk.c | 23 ++-- >> drivers/clk/hisilicon/clk.h | 14 +-- >> drivers/clk/hisilicon/reset.c | 130 ++++++++++++++++++++ >> drivers/clk/hisilicon/reset.h | 32 +++++ >> include/dt-bindings/clock/hi3519-clock.h | 40 +++++++ >> 9 files changed, 411 insertions(+), 15 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/clock/hi3519-crg.txt >> create mode 100644 drivers/clk/hisilicon/clk-hi3519.c >> create mode 100644 drivers/clk/hisilicon/reset.c >> create mode 100644 drivers/clk/hisilicon/reset.h >> create mode 100644 include/dt-bindings/clock/hi3519-clock.h > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 From: xuejiancheng Subject: Re: [PATCH v6 1/6] clk: hisilicon: add CRG driver for hi3519 soc Date: Wed, 20 Jan 2016 09:43:10 +0800 Message-ID: <569EE62E.3040003@huawei.com> References: <1453171111-21921-1-git-send-email-xuejiancheng@huawei.com> <1453171111-21921-2-git-send-email-xuejiancheng@huawei.com> <20160119182317.GA3681@rob-hp-laptop> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20160119182317.GA3681@rob-hp-laptop> Sender: linux-kernel-owner@vger.kernel.org To: Rob Herring Cc: mturquette@baylibre.com, sboyd@codeaurora.org, p.zabel@pengutronix.de, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, khilman@linaro.org, arnd@arndb.de, olof@lixom.net, xuwei5@hisilicon.com, haojian.zhuang@linaro.org, zhangfei.gao@linaro.org, bintian.wang@huawei.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, yanhaifeng@hisilicon.com, yanghongwei@hisilicon.com, suwenping@hisilicon.com, raojun@hisilicon.com, ml.yang@hisilicon.com, gaofei@hisilicon.com, zhangzhenxing@hisilicon.com, xuejiancheng@hisilicon.com List-Id: devicetree@vger.kernel.org On 2016/1/20 2:23, Rob Herring wrote: > On Tue, Jan 19, 2016 at 10:38:26AM +0800, Jiancheng Xue wrote: >> The CRG(Clock and Reset Generator) block provides clock >> and reset signals for other modules in hi3519 soc. >> >> Signed-off-by: Jiancheng Xue >> --- >> .../devicetree/bindings/clock/hi3519-crg.txt | 46 +++++++ > > I already acked this. Please add ack's when posting new versions. > > Acked-by: Rob Herring > Hi Rob, I see. Thank you very much. Regards, Jiancheng >> drivers/clk/hisilicon/Kconfig | 7 ++ >> drivers/clk/hisilicon/Makefile | 2 + >> drivers/clk/hisilicon/clk-hi3519.c | 132 +++++++++++++++++++++ >> drivers/clk/hisilicon/clk.c | 23 ++-- >> drivers/clk/hisilicon/clk.h | 14 +-- >> drivers/clk/hisilicon/reset.c | 130 ++++++++++++++++++++ >> drivers/clk/hisilicon/reset.h | 32 +++++ >> include/dt-bindings/clock/hi3519-clock.h | 40 +++++++ >> 9 files changed, 411 insertions(+), 15 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/clock/hi3519-crg.txt >> create mode 100644 drivers/clk/hisilicon/clk-hi3519.c >> create mode 100644 drivers/clk/hisilicon/reset.c >> create mode 100644 drivers/clk/hisilicon/reset.h >> create mode 100644 include/dt-bindings/clock/hi3519-clock.h > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 From: xuejiancheng@huawei.com (xuejiancheng) Date: Wed, 20 Jan 2016 09:43:10 +0800 Subject: [PATCH v6 1/6] clk: hisilicon: add CRG driver for hi3519 soc In-Reply-To: <20160119182317.GA3681@rob-hp-laptop> References: <1453171111-21921-1-git-send-email-xuejiancheng@huawei.com> <1453171111-21921-2-git-send-email-xuejiancheng@huawei.com> <20160119182317.GA3681@rob-hp-laptop> Message-ID: <569EE62E.3040003@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 2016/1/20 2:23, Rob Herring wrote: > On Tue, Jan 19, 2016 at 10:38:26AM +0800, Jiancheng Xue wrote: >> The CRG(Clock and Reset Generator) block provides clock >> and reset signals for other modules in hi3519 soc. >> >> Signed-off-by: Jiancheng Xue >> --- >> .../devicetree/bindings/clock/hi3519-crg.txt | 46 +++++++ > > I already acked this. Please add ack's when posting new versions. > > Acked-by: Rob Herring > Hi Rob, I see. Thank you very much. Regards, Jiancheng >> drivers/clk/hisilicon/Kconfig | 7 ++ >> drivers/clk/hisilicon/Makefile | 2 + >> drivers/clk/hisilicon/clk-hi3519.c | 132 +++++++++++++++++++++ >> drivers/clk/hisilicon/clk.c | 23 ++-- >> drivers/clk/hisilicon/clk.h | 14 +-- >> drivers/clk/hisilicon/reset.c | 130 ++++++++++++++++++++ >> drivers/clk/hisilicon/reset.h | 32 +++++ >> include/dt-bindings/clock/hi3519-clock.h | 40 +++++++ >> 9 files changed, 411 insertions(+), 15 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/clock/hi3519-crg.txt >> create mode 100644 drivers/clk/hisilicon/clk-hi3519.c >> create mode 100644 drivers/clk/hisilicon/reset.c >> create mode 100644 drivers/clk/hisilicon/reset.h >> create mode 100644 include/dt-bindings/clock/hi3519-clock.h > > . >