From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54949) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aOtRC-0006L6-9E for qemu-devel@nongnu.org; Thu, 28 Jan 2016 15:45:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aOtR8-0001yb-7L for qemu-devel@nongnu.org; Thu, 28 Jan 2016 15:45:06 -0500 References: <1453889591-30968-1-git-send-email-david@gibson.dropbear.id.au> From: Alexander Graf Message-ID: <56AA7DC5.8050802@suse.de> Date: Thu, 28 Jan 2016 21:44:53 +0100 MIME-Version: 1.0 In-Reply-To: <1453889591-30968-1-git-send-email-david@gibson.dropbear.id.au> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCHv2 00/10] Clean up page size handling for ppc 64-bit hash MMUs with TCG List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson , benh@kernel.crashing.org Cc: aik@ozlabs.ru, lvivier@redhat.com, thuth@redhat.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 01/27/2016 11:13 AM, David Gibson wrote: > Encoding of page sizes on 64-bit hash MMUs for Power is rather arcane, > involving control bits in both the SLB and HPTE. At present we > support a few of the options, but far fewer than real hardware. > > We're able to get away with that in practice, because guests use a > device tree property to determine which page sizes are available and > we are setting that to match. However, the fact that the actual code > doesn't necessarily what we put into the table of available page sizes > is another ugliness. > > This series makes a number of cleanups to the page size handling. The > upshot is that afterwards the softmmu code operates off the same page > size encoding table that is advertised to the guests, ensuring that > they will be in sync. > > Finally, we extend the table of allowed sizes for POWER7 and POWER8 to > include the options allowed in hardware (including MPSS). We can fix > other hash MMU based CPUs in future if anyone cares enough. > > For a simple benchmark I timed fully booting then cleanly shutting > down a TCG guest (RHEL7.2 userspace with a recent upstream kernel). > Repeated 5 times on the current master branch, my current ppc-for-2.6 > branch and this branch. It looks like it improves speed, although the > difference is pretty much negligible: > > master: 2m25 2m28 2m26 2m26 2m26 > ppc-for-2.6: 2m26 2m25 2m26 2m27 2m25 > this series: 2m20 2m23 2m23 2m25 2m21 > > Please review, and I'll fold into ppc-for-2.6 for my next pull. > > Changes since v1: > * Fix a couple of simple but serious bugs in logic > * Did some rudimentary benchmarking > Changes since RFC: > * Moved lookup of SLB encodings table from SLB lookup time to SLB > store time LGTM, apart from the comments that people already made. Please also provide changelogs in the individual patch files next time - it makes it easier for people who just try to see what changed from one version to another ;). Reviewed-by: Alexander Graf Also, please just double sanity check that the code after your conversion still works well on 32bit hosts ;). I suppose you have a 32bit build environment by now, so that should be quite easy to pull off. Alex e