From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59056) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aQtxB-0004zf-R5 for qemu-devel@nongnu.org; Wed, 03 Feb 2016 04:42:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aQtx6-0001kQ-OW for qemu-devel@nongnu.org; Wed, 03 Feb 2016 04:42:25 -0500 Received: from mout.kundenserver.de ([217.72.192.75]:57131) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aQtx6-0001kI-F1 for qemu-devel@nongnu.org; Wed, 03 Feb 2016 04:42:20 -0500 References: <1454492221-30625-1-git-send-email-glaubitz@physik.fu-berlin.de> <1454492221-30625-2-git-send-email-glaubitz@physik.fu-berlin.de> <56B1CAF0.3030407@physik.fu-berlin.de> From: Laurent Vivier Message-ID: <56B1CB79.6060605@vivier.eu> Date: Wed, 3 Feb 2016 10:42:17 +0100 MIME-Version: 1.0 In-Reply-To: <56B1CAF0.3030407@physik.fu-berlin.de> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 1/2] m68k: Fix opcode mask for fbcc instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: John Paul Adrian Glaubitz , qemu-devel@nongnu.org Le 03/02/2016 10:40, John Paul Adrian Glaubitz a écrit : > Strange. There should be a cover letter coming along as well which > explains my changes. Did you get it? We have the cover letter, but it is never sent to the sender :) Laurent > > On 02/03/2016 10:37 AM, John Paul Adrian Glaubitz wrote: >> Signed-off-by: John Paul Adrian Glaubitz >> --- >> target-m68k/translate.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/target-m68k/translate.c b/target-m68k/translate.c >> index 342c040..535d7f9 100644 >> --- a/target-m68k/translate.c >> +++ b/target-m68k/translate.c >> @@ -2940,7 +2940,7 @@ void register_m68k_insns (CPUM68KState *env) >> INSN(shift_reg, e0a0, f0f0, CF_ISA_A); >> INSN(undef_fpu, f000, f000, CF_ISA_A); >> INSN(fpu, f200, ffc0, CF_FPU); >> - INSN(fbcc, f280, ffc0, CF_FPU); >> + INSN(fbcc, f280, ff80, CF_FPU); >> INSN(frestore, f340, ffc0, CF_FPU); >> INSN(fsave, f340, ffc0, CF_FPU); >> INSN(intouch, f340, ffc0, CF_ISA_A); >> > >