From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965069AbcBIWzW (ORCPT ); Tue, 9 Feb 2016 17:55:22 -0500 Received: from mail-wm0-f49.google.com ([74.125.82.49]:33150 "EHLO mail-wm0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933107AbcBIWzQ (ORCPT ); Tue, 9 Feb 2016 17:55:16 -0500 Subject: Re: [PATCH v3 2/3] clocksource: Add NPS400 timers driver To: Noam Camus , "linux-kernel@vger.kernel.org" References: <1454418899-25500-1-git-send-email-noamc@ezchip.com> <1454775406-25277-3-git-send-email-noamc@ezchip.com> <56B8A482.8040302@linaro.org> <56B9EBC7.4010703@linaro.org> Cc: "linux-snps-arc@lists.infradead.org" , "marc.zyngier@arm.com" , Chris Metcalf , Tal Zilcer , Gilad Ben Yossef , Rob Herring , Thomas Gleixner , John Stultz From: Daniel Lezcano Message-ID: <56BA6E51.9040507@linaro.org> Date: Tue, 9 Feb 2016 23:55:13 +0100 User-Agent: Mozilla/5.0 (X11; Linux i686; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/09/2016 10:47 PM, Noam Camus wrote: >> From: Daniel Lezcano Sent: Tuesday, >> February 9, 2016 3:38 PM > >> Actually I was referring to clk_prepare_enable, >> clocksource_register_hz. Agree clk_get_rate is always valid. > Thanks for making this clear. Any way as you can see I do call > pr_err() in case of error just like most drivers around. By "hang" do > you mean calling panic()? No. I meant the errors are caught but no action is taken, the execution continues normally as nothing wrong happened. This is why I asked if you expect the host to hang at boot time with the last error as a hint. I was expecting to see a call to clk_disable_unprepare if clocksource_register_hz fails, and returning 'ret' if clk_prepare_enable fails. > What if there is another clocksource in DT (even with worse rating)? > I still prefer using it then having non workable machine. You are right. This is why failing gracefully in the init function is important. >>>> You can simplify the driver even more by using >>>> clocksource_mmio_init. >>> Since my base address depends on cluster number, which CPU is >>> part of, this interface is not much of a use. On top of that it >>> assumes that I am little endian by using readl family >>> accessories. > >> Why can't you use ? > >> clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick", >> nps_timer_rate, 32, nps_clksrc_read); > > I believe that the simplification is meant for drivers that can > actually use the clocksource_mmio..() accessories. Could you explain > what is the advantage here, for my case, to use clocksource_mmio > driver? Using the mmio generic code will save: +static struct clocksource nps_counter = { + .name = "EZnps-tick", + .rating = 301, + .read = nps_clksrc_read, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; Up to you. -- Daniel -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 From: daniel.lezcano@linaro.org (Daniel Lezcano) Date: Tue, 9 Feb 2016 23:55:13 +0100 Subject: [PATCH v3 2/3] clocksource: Add NPS400 timers driver In-Reply-To: References: <1454418899-25500-1-git-send-email-noamc@ezchip.com> <1454775406-25277-3-git-send-email-noamc@ezchip.com> <56B8A482.8040302@linaro.org> <56B9EBC7.4010703@linaro.org> List-ID: Message-ID: <56BA6E51.9040507@linaro.org> To: linux-snps-arc@lists.infradead.org On 02/09/2016 10:47 PM, Noam Camus wrote: >> From: Daniel Lezcano Sent: Tuesday, >> February 9, 2016 3:38 PM > >> Actually I was referring to clk_prepare_enable, >> clocksource_register_hz. Agree clk_get_rate is always valid. > Thanks for making this clear. Any way as you can see I do call > pr_err() in case of error just like most drivers around. By "hang" do > you mean calling panic()? No. I meant the errors are caught but no action is taken, the execution continues normally as nothing wrong happened. This is why I asked if you expect the host to hang at boot time with the last error as a hint. I was expecting to see a call to clk_disable_unprepare if clocksource_register_hz fails, and returning 'ret' if clk_prepare_enable fails. > What if there is another clocksource in DT (even with worse rating)? > I still prefer using it then having non workable machine. You are right. This is why failing gracefully in the init function is important. >>>> You can simplify the driver even more by using >>>> clocksource_mmio_init. >>> Since my base address depends on cluster number, which CPU is >>> part of, this interface is not much of a use. On top of that it >>> assumes that I am little endian by using readl family >>> accessories. > >> Why can't you use ? > >> clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick", >> nps_timer_rate, 32, nps_clksrc_read); > > I believe that the simplification is meant for drivers that can > actually use the clocksource_mmio..() accessories. Could you explain > what is the advantage here, for my case, to use clocksource_mmio > driver? Using the mmio generic code will save: +static struct clocksource nps_counter = { + .name = "EZnps-tick", + .rating = 301, + .read = nps_clksrc_read, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; Up to you. -- Daniel -- Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog