From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: [PATCH 3/5] x86emul: simplify IRET logic Date: Wed, 17 Feb 2016 09:36:29 -0700 Message-ID: <56C4AF9D02000078000D3494@prv-mh.provo.novell.com> References: <56C4AC2802000078000D3473@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="=__PartC6F1599D.1__=" Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aW55d-0005eJ-IX for xen-devel@lists.xenproject.org; Wed, 17 Feb 2016 16:36:33 +0000 In-Reply-To: <56C4AC2802000078000D3473@prv-mh.provo.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel Cc: Andrew Cooper , Keir Fraser List-Id: xen-devel@lists.xenproject.org This is a MIME message. If you are reading this text, you may want to consider changing to a mail reader or gateway that understands how to properly handle MIME multipart messages. --=__PartC6F1599D.1__= Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Since we only handle real mode, we need to consider neither non-ring0 nor IOPL. Also for POPF the mode_iopl() check can really be inside the not-ring-0 body. Signed-off-by: Jan Beulich --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -2490,9 +2490,11 @@ x86_emulate( case 0x9d: /* popf */ { uint32_t mask =3D EFLG_VIP | EFLG_VIF | EFLG_VM; if ( !mode_ring0() ) + { mask |=3D EFLG_IOPL; - if ( !mode_iopl() ) - mask |=3D EFLG_IF; + if ( !mode_iopl() ) + mask |=3D EFLG_IF; + } /* 64-bit mode: POP defaults to a 64-bit operand. */ if ( mode_64bit() && (op_bytes =3D=3D 4) ) op_bytes =3D 8; @@ -2814,10 +2816,7 @@ x86_emulate( case 0xcf: /* iret */ { unsigned long sel, eip, eflags; uint32_t mask =3D EFLG_VIP | EFLG_VIF | EFLG_VM; - if ( !mode_ring0() ) - mask |=3D EFLG_IOPL; - if ( !mode_iopl() ) - mask |=3D EFLG_IF; + fail_if(!in_realmode(ctxt, ops)); if ( (rc =3D read_ulong(x86_seg_ss, sp_post_inc(op_bytes), &eip, op_bytes, ctxt, ops)) || @@ -2830,7 +2829,7 @@ x86_emulate( eflags =3D (uint16_t)eflags | (_regs.eflags & 0xffff0000u); eflags &=3D 0x257fd5; _regs.eflags &=3D mask; - _regs.eflags |=3D (uint32_t)(eflags & ~mask) | 0x02; + _regs.eflags |=3D (eflags & ~mask) | 0x02; _regs.eip =3D eip; if ( (rc =3D load_seg(x86_seg_cs, sel, 1, &cs, ctxt, ops)) || (rc =3D commit_far_branch(&cs, eip)) ) --=__PartC6F1599D.1__= Content-Type: text/plain; name="x86emul-iret-simplify.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="x86emul-iret-simplify.patch" x86emul: simplify IRET logic=0A=0ASince we only handle real mode, we need = to consider neither non-ring0=0Anor IOPL. Also for POPF the mode_iopl() = check can really be inside the=0Anot-ring-0 body.=0A=0ASigned-off-by: Jan = Beulich =0A=0A--- a/xen/arch/x86/x86_emulate/x86_emulate= .c=0A+++ b/xen/arch/x86/x86_emulate/x86_emulate.c=0A@@ -2490,9 +2490,11 @@ = x86_emulate(=0A case 0x9d: /* popf */ {=0A uint32_t mask =3D = EFLG_VIP | EFLG_VIF | EFLG_VM;=0A if ( !mode_ring0() )=0A+ = {=0A mask |=3D EFLG_IOPL;=0A- if ( !mode_iopl() )=0A- = mask |=3D EFLG_IF;=0A+ if ( !mode_iopl() )=0A+ = mask |=3D EFLG_IF;=0A+ }=0A /* 64-bit mode: POP = defaults to a 64-bit operand. */=0A if ( mode_64bit() && (op_bytes = =3D=3D 4) )=0A op_bytes =3D 8;=0A@@ -2814,10 +2816,7 @@ = x86_emulate(=0A case 0xcf: /* iret */ {=0A unsigned long sel, = eip, eflags;=0A uint32_t mask =3D EFLG_VIP | EFLG_VIF | EFLG_VM;=0A= - if ( !mode_ring0() )=0A- mask |=3D EFLG_IOPL;=0A- = if ( !mode_iopl() )=0A- mask |=3D EFLG_IF;=0A+=0A = fail_if(!in_realmode(ctxt, ops));=0A if ( (rc =3D read_ulong(x86_se= g_ss, sp_post_inc(op_bytes),=0A &eip, = op_bytes, ctxt, ops)) ||=0A@@ -2830,7 +2829,7 @@ x86_emulate(=0A = eflags =3D (uint16_t)eflags | (_regs.eflags & 0xffff0000u);=0A = eflags &=3D 0x257fd5;=0A _regs.eflags &=3D mask;=0A- = _regs.eflags |=3D (uint32_t)(eflags & ~mask) | 0x02;=0A+ _regs.eflag= s |=3D (eflags & ~mask) | 0x02;=0A _regs.eip =3D eip;=0A = if ( (rc =3D load_seg(x86_seg_cs, sel, 1, &cs, ctxt, ops)) ||=0A = (rc =3D commit_far_branch(&cs, eip)) )=0A --=__PartC6F1599D.1__= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel --=__PartC6F1599D.1__=--