From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751907AbcCGBpV (ORCPT ); Sun, 6 Mar 2016 20:45:21 -0500 Received: from mail-bn1on0056.outbound.protection.outlook.com ([157.56.110.56]:18620 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751236AbcCGBpM (ORCPT ); Sun, 6 Mar 2016 20:45:12 -0500 Authentication-Results: lists.linux-foundation.org; dkim=none (message not signed) header.d=none;lists.linux-foundation.org; dmarc=none action=none header.from=amd.com; Subject: Re: [PATCH V5 00/10] perf/amd/iommu: Enable multi-IOMMU support To: Joerg Roedel References: <1456236764-1569-1-git-send-email-Suravee.Suthikulpanit@amd.com> <20160225145429.GA18390@8bytes.org> CC: , , , , , , , , From: Suravee Suthikulpanit Message-ID: <56DCDD1B.5050708@amd.com> Date: Mon, 7 Mar 2016 08:44:59 +0700 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.11; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <20160225145429.GA18390@8bytes.org> Content-Type: text/plain; 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They are not suitable for stable kernels, so to just fix > the issue I take the small patch I extracted from yours and posted > previously. I retains your authorship, hope that is fine with you. > > You can rebase these patches on-top of that minimal fix. > > > Joerg > I'll do that and send out V6. Thanks, Suravee From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulpanit Subject: Re: [PATCH V5 00/10] perf/amd/iommu: Enable multi-IOMMU support Date: Mon, 7 Mar 2016 08:44:59 +0700 Message-ID: <56DCDD1B.5050708@amd.com> References: <1456236764-1569-1-git-send-email-Suravee.Suthikulpanit@amd.com> <20160225145429.GA18390@8bytes.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20160225145429.GA18390-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Joerg Roedel Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, peterz-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, acme-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, andihartmann-KuiJ5kEpwI6ELgA04lAiVw@public.gmane.org, mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, bp-Gina5bIWoIWzQB+pC5nmwQ@public.gmane.org, labbott-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org List-Id: iommu@lists.linux-foundation.org Hi Joerg, On 2/25/16 21:54, Joerg Roedel wrote: > Hi Suravee, > > On Tue, Feb 23, 2016 at 08:12:34AM -0600, Suravee Suthikulpanit wrote: >> This is a two-part patch series: >> >> Part1: 1-4 : >> Introduce a workaround for the current AMD IOMMU perf initialization issue >> in some existing KV and CZ platforms, where it fails to write to IOMMU >> perf counter as reported by Andreas Hartmann here >> (http://comments.gmane.org/gmane.linux.kernel.pci/49147). > > Okay, these 4 patches fix the issue, but they also refactor the code and > so a lot more. They are not suitable for stable kernels, so to just fix > the issue I take the small patch I extracted from yours and posted > previously. I retains your authorship, hope that is fine with you. > > You can rebase these patches on-top of that minimal fix. > > > Joerg > I'll do that and send out V6. Thanks, Suravee