From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34205) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ag7gt-0007W0-K0 for qemu-devel@nongnu.org; Wed, 16 Mar 2016 05:24:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ag7gq-0003us-CR for qemu-devel@nongnu.org; Wed, 16 Mar 2016 05:24:31 -0400 Received: from e06smtp09.uk.ibm.com ([195.75.94.105]:33537) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ag7gq-0003uf-1g for qemu-devel@nongnu.org; Wed, 16 Mar 2016 05:24:28 -0400 Received: from localhost by e06smtp09.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 16 Mar 2016 09:24:26 -0000 References: <1457974600-13828-1-git-send-email-clg@fr.ibm.com> <1457974600-13828-16-git-send-email-clg@fr.ibm.com> <20160316011412.GX9032@voom> <56E8FA5E.3040709@redhat.com> From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= Message-ID: <56E9263F.6080302@fr.ibm.com> Date: Wed, 16 Mar 2016 10:24:15 +0100 MIME-Version: 1.0 In-Reply-To: <56E8FA5E.3040709@redhat.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 15/17] ppc: Add dummy POWER8 MPPR register List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Thomas Huth , David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 03/16/2016 07:17 AM, Thomas Huth wrote: > On 16.03.2016 02:14, David Gibson wrote: >> On Mon, Mar 14, 2016 at 05:56:38PM +0100, Cédric Le Goater wrote: >>> From: Benjamin Herrenschmidt >>> >>> Controls the micropartition prefetch, this is pretty much meaningless >>> in full emulation (used for priming the caches on real HW). >>> >>> Signed-off-by: Benjamin Herrenschmidt >> >> So, this is readable with HV=0, so technically a fix even for non-HV >> machines. I'm guessing it's not actually read in practice outside the >> HV, though. Not sure if this should go in 2.6 or 2.7. > > Patch looks simple (i.e. without risk) enough to be fine for 2.6, I think. > But looking at this again, I wonder why there is no KVM_REG_PPC_* > definition for this register, so that it could be sync'ed with the > kernel, too? Is that on purpose or is it just missing by accident? The spr was reverted : http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=23316316c1af I should have checked that. I guess we don't want to keep the patch for 2.6 then. C. > Thomas > >>> --- >>> target-ppc/cpu.h | 1 + >>> target-ppc/translate_init.c | 13 +++++++++++++ >>> 2 files changed, 14 insertions(+) >>> >>> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h >>> index 81a3e6b5ed29..5203cc6a3bfb 100644 >>> --- a/target-ppc/cpu.h >>> +++ b/target-ppc/cpu.h >>> @@ -1398,6 +1398,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) >>> #define SPR_DHDES (0x0B1) >>> #define SPR_DPDES (0x0B0) >>> #define SPR_DAWR (0x0B4) >>> +#define SPR_MPPR (0x0B8) >>> #define SPR_RPR (0x0BA) >>> #define SPR_DAWRX (0x0BC) >>> #define SPR_HFSCR (0x0BE) >>> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c >>> index 28a9c2e73156..cfb1bc088950 100644 >>> --- a/target-ppc/translate_init.c >>> +++ b/target-ppc/translate_init.c >>> @@ -8161,6 +8161,18 @@ static void gen_spr_power8_ic(CPUPPCState *env) >>> #endif >>> } >>> >>> +static void gen_spr_power8_book4(CPUPPCState *env) >>> +{ >>> + /* Add a number of P8 book4 registers */ >>> +#if !defined(CONFIG_USER_ONLY) >>> + spr_register_hv(env, SPR_MPPR, "MPPR", >>> + SPR_NOACCESS, SPR_NOACCESS, >>> + &spr_read_generic, SPR_NOACCESS, >>> + &spr_read_generic, &spr_write_generic, >>> + 0); >>> +#endif >>> +} >>> + >>> static void init_proc_book3s_64(CPUPPCState *env, int version) >>> { >>> gen_spr_ne_601(env); >>> @@ -8216,6 +8228,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) >>> gen_spr_power8_rpr(env); >>> gen_spr_power8_dbell(env); >>> gen_spr_power8_ic(env); >>> + gen_spr_power8_book4(env); >>> } >>> if (version < BOOK3S_CPU_POWER8) { >>> gen_spr_book3s_dbg(env); >> > >