From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756609AbcCaJXa (ORCPT ); Thu, 31 Mar 2016 05:23:30 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:41990 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755491AbcCaJXY (ORCPT ); Thu, 31 Mar 2016 05:23:24 -0400 Subject: Re: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck To: Tero Kristo , Tony Lindgren , Keerthy References: <1457957001-720-1-git-send-email-j-keerthy@ti.com> <20160330211828.GE9329@atomide.com> <20160330213224.GH9329@atomide.com> <56FCC3FF.7080901@ti.com> CC: , , , , , , , Lokesh Vutla From: Keerthy Message-ID: <56FCEC61.5020400@ti.com> Date: Thu, 31 Mar 2016 14:52:41 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <56FCC3FF.7080901@ti.com> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday 31 March 2016 12:00 PM, Tero Kristo wrote: > On 03/31/2016 12:32 AM, Tony Lindgren wrote: >> * Tony Lindgren [160330 14:19]: >>> * Keerthy [160314 05:04]: >>>> This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source. >>>> Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz >>>> external >>>> crystal is not enabled at power up. Instead the CPU falls back to using >>>> an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is >>>> usually >>>> 20MHz on boards so far (which gives an emulated frequency of 32.786KHz) >>> >>> Thanks applying into omap-for-v4.6/fixes. >> >> Actually let's wait a review from Tero on this one, not sure >> about the pseudo clock naming here. So dropping for now. > > The patch is fine for me, I didn't comment anything before as I thought > you already applied it. > > Acked-by: Tero Kristo Thanks Tero. > >> >> Regards, >> >> Tony >> > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keerthy Subject: Re: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck Date: Thu, 31 Mar 2016 14:52:41 +0530 Message-ID: <56FCEC61.5020400@ti.com> References: <1457957001-720-1-git-send-email-j-keerthy@ti.com> <20160330211828.GE9329@atomide.com> <20160330213224.GH9329@atomide.com> <56FCC3FF.7080901@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <56FCC3FF.7080901@ti.com> Sender: linux-kernel-owner@vger.kernel.org To: Tero Kristo , Tony Lindgren , Keerthy Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, mark.rutland@arm.com, Lokesh Vutla List-Id: devicetree@vger.kernel.org On Thursday 31 March 2016 12:00 PM, Tero Kristo wrote: > On 03/31/2016 12:32 AM, Tony Lindgren wrote: >> * Tony Lindgren [160330 14:19]: >>> * Keerthy [160314 05:04]: >>>> This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source. >>>> Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz >>>> external >>>> crystal is not enabled at power up. Instead the CPU falls back to using >>>> an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is >>>> usually >>>> 20MHz on boards so far (which gives an emulated frequency of 32.786KHz) >>> >>> Thanks applying into omap-for-v4.6/fixes. >> >> Actually let's wait a review from Tero on this one, not sure >> about the pseudo clock naming here. So dropping for now. > > The patch is fine for me, I didn't comment anything before as I thought > you already applied it. > > Acked-by: Tero Kristo Thanks Tero. > >> >> Regards, >> >> Tony >> > From mboxrd@z Thu Jan 1 00:00:00 1970 From: a0393675@ti.com (Keerthy) Date: Thu, 31 Mar 2016 14:52:41 +0530 Subject: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck In-Reply-To: <56FCC3FF.7080901@ti.com> References: <1457957001-720-1-git-send-email-j-keerthy@ti.com> <20160330211828.GE9329@atomide.com> <20160330213224.GH9329@atomide.com> <56FCC3FF.7080901@ti.com> Message-ID: <56FCEC61.5020400@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thursday 31 March 2016 12:00 PM, Tero Kristo wrote: > On 03/31/2016 12:32 AM, Tony Lindgren wrote: >> * Tony Lindgren [160330 14:19]: >>> * Keerthy [160314 05:04]: >>>> This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source. >>>> Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz >>>> external >>>> crystal is not enabled at power up. Instead the CPU falls back to using >>>> an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is >>>> usually >>>> 20MHz on boards so far (which gives an emulated frequency of 32.786KHz) >>> >>> Thanks applying into omap-for-v4.6/fixes. >> >> Actually let's wait a review from Tero on this one, not sure >> about the pseudo clock naming here. So dropping for now. > > The patch is fine for me, I didn't comment anything before as I thought > you already applied it. > > Acked-by: Tero Kristo Thanks Tero. > >> >> Regards, >> >> Tony >> >