From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jon Hunter Subject: Re: [PATCH 14/15] dt-bindings: arm-gic: Drop 'clock-names' from binding document Date: Tue, 12 Apr 2016 09:54:32 +0100 Message-ID: <570CB7C8.4090103@nvidia.com> References: <1458224359-32665-1-git-send-email-jonathanh@nvidia.com> <1458224359-32665-15-git-send-email-jonathanh@nvidia.com> <56EBBE38.6070303@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <56EBBE38.6070303-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Rob Herring , Marc Zyngier , Mark Rutland Cc: Thomas Gleixner , Jason Cooper , =?UTF-8?Q?Beno=c3=aet_Cousson?= , Tony Lindgren , Pawel Moll , Ian Campbell , Kumar Gala , Stephen Warren , Thierry Reding , Kevin Hilman , Geert Uytterhoeven , Grygorii Strashko , Lars-Peter Clausen , Linus Walleij , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , linux-omap , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" List-Id: linux-tegra@vger.kernel.org Rob, Mark, Marc, On 18/03/16 08:37, Jon Hunter wrote: > > On 17/03/16 20:14, Rob Herring wrote: >> On Thu, Mar 17, 2016 at 9:19 AM, Jon Hunter wrote: >>> Commit afbbd2338176 ("irqchip/gic: Document optional Clock and Power >>> Domain properties") documented optional clock and power-dmoain properties >>> for the ARM GIC. Currently, there are no users of these and for the >>> Tegra210 Audio GIC (based upon the GIC-400) there are two clocks, a >>> functional clock and interface clock, that need to be enabled. >>> >>> To allow flexibility, drop the 'clock-names' from the GIC binding and >>> just provide a list of clocks which the driver can parse. It is assumed >>> that any clocks that are listed, need to be enabled in order to access >>> the GIC. >>> >>> Signed-off-by: Jon Hunter >>> >>> --- >>> >>> Please note that I am not sure if this will be popular, but I am trying >>> to come up with a generic way to handle multiple clocks that may be >>> required for accessing a GIC. >> >> It's not. :) >> >> We need to specify the number and order of clocks by compatible string >> at a minimum. Sadly, ARM's GICs are well documented and include clock >> names, so you can't just make up genericish names either which is >> probably often the case. > > Do you have any suggestions then? > > I have had a look at the ARM TRMs and although I see that they do show > the functional clock, there is no mention of whether there are any other > clocks need in order to interface to the GIC (ie. bus clock). I know > that for other SoCs such as OMAP it is common to have both a functional > clock and interface clock. So I believe this is fairly common. Any thoughts on how I should handle this for the Tegra AGIC? Cheers Jon -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756487AbcDLIyt (ORCPT ); Tue, 12 Apr 2016 04:54:49 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:19281 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755885AbcDLIyp (ORCPT ); Tue, 12 Apr 2016 04:54:45 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Tue, 12 Apr 2016 01:52:11 -0700 Subject: Re: [PATCH 14/15] dt-bindings: arm-gic: Drop 'clock-names' from binding document To: Rob Herring , Marc Zyngier , Mark Rutland References: <1458224359-32665-1-git-send-email-jonathanh@nvidia.com> <1458224359-32665-15-git-send-email-jonathanh@nvidia.com> <56EBBE38.6070303@nvidia.com> CC: Thomas Gleixner , Jason Cooper , =?UTF-8?Q?Beno=c3=aet_Cousson?= , Tony Lindgren , Pawel Moll , Ian Campbell , Kumar Gala , Stephen Warren , Thierry Reding , Kevin Hilman , Geert Uytterhoeven , Grygorii Strashko , Lars-Peter Clausen , Linus Walleij , "linux-tegra@vger.kernel.org" , linux-omap , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" From: Jon Hunter Message-ID: <570CB7C8.4090103@nvidia.com> Date: Tue, 12 Apr 2016 09:54:32 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <56EBBE38.6070303@nvidia.com> X-Originating-IP: [10.21.132.108] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rob, Mark, Marc, On 18/03/16 08:37, Jon Hunter wrote: > > On 17/03/16 20:14, Rob Herring wrote: >> On Thu, Mar 17, 2016 at 9:19 AM, Jon Hunter wrote: >>> Commit afbbd2338176 ("irqchip/gic: Document optional Clock and Power >>> Domain properties") documented optional clock and power-dmoain properties >>> for the ARM GIC. Currently, there are no users of these and for the >>> Tegra210 Audio GIC (based upon the GIC-400) there are two clocks, a >>> functional clock and interface clock, that need to be enabled. >>> >>> To allow flexibility, drop the 'clock-names' from the GIC binding and >>> just provide a list of clocks which the driver can parse. It is assumed >>> that any clocks that are listed, need to be enabled in order to access >>> the GIC. >>> >>> Signed-off-by: Jon Hunter >>> >>> --- >>> >>> Please note that I am not sure if this will be popular, but I am trying >>> to come up with a generic way to handle multiple clocks that may be >>> required for accessing a GIC. >> >> It's not. :) >> >> We need to specify the number and order of clocks by compatible string >> at a minimum. Sadly, ARM's GICs are well documented and include clock >> names, so you can't just make up genericish names either which is >> probably often the case. > > Do you have any suggestions then? > > I have had a look at the ARM TRMs and although I see that they do show > the functional clock, there is no mention of whether there are any other > clocks need in order to interface to the GIC (ie. bus clock). I know > that for other SoCs such as OMAP it is common to have both a functional > clock and interface clock. So I believe this is fairly common. Any thoughts on how I should handle this for the Tegra AGIC? Cheers Jon