From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753522AbcDSLIB (ORCPT ); Tue, 19 Apr 2016 07:08:01 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:18332 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753074AbcDSLIA (ORCPT ); Tue, 19 Apr 2016 07:08:00 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 19 Apr 2016 04:06:00 -0700 Message-ID: <57160EDB.5040704@nvidia.com> Date: Tue, 19 Apr 2016 16:26:27 +0530 From: Laxman Dewangan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 MIME-Version: 1.0 To: Mark Brown CC: Bjorn Andersson , Bjorn Andersson , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Liam Girdwood , "Stephen Warren" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Gandhar Dighe , "Stuart Yates" Subject: Re: [PATCH 1/2] regulator: DT: Add support to scale ramp delay based on platform behavior References: <20160331192227.GU2350@sirena.org.uk> <56FD7F07.7010404@nvidia.com> <20160331203942.GV2350@sirena.org.uk> <56FE2009.4020302@nvidia.com> <20160401161121.GZ2350@sirena.org.uk> <570370E5.3070901@nvidia.com> <20160412010226.GO3351@sirena.org.uk> <570CF822.4050002@nvidia.com> <20160413065310.GK14664@sirena.org.uk> <571601E7.2000901@nvidia.com> <20160419105545.GT3217@sirena.org.uk> In-Reply-To: <20160419105545.GT3217@sirena.org.uk> X-Originating-IP: [10.19.65.30] X-ClientProxiedBy: DRHKMAIL103.nvidia.com (10.25.59.17) To bgmail102.nvidia.com (10.25.59.11) Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 19 April 2016 04:25 PM, Mark Brown wrote: > * PGP Signed by an unknown key > > On Tue, Apr 19, 2016 at 03:31:11PM +0530, Laxman Dewangan wrote: >> On Wednesday 13 April 2016 12:23 PM, Mark Brown wrote: >>> Possibly. It did also occur to me last night that having a Maxim >>> specific property which lets you specify a raw register value to >>> configure in cases where the board goes out of spec (as opposed to a >>> time which could be left specified as the real value) might solve the >>> problem without being too terrible from an interface point of view, >>> though something that's directly obvious from the schematic would be >>> much better. > You appear to have ignord my suggestion above... > > I was too focused on the getting the info from Maxim on this to get something in equation form. There is no way to get the deviation equation and your suggestion is only seems solution for this issue. Thanks for evaluating/trying at your end and for valuable suggestion. Now, for property, I will add maxim,ramp-delay This is device specific ramp delay which need to be configure on device register. The platform observed delay must be provided via regulator-ramp-delay. I will send the patch on this. Thanks, Laxman From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laxman Dewangan Subject: Re: [PATCH 1/2] regulator: DT: Add support to scale ramp delay based on platform behavior Date: Tue, 19 Apr 2016 16:26:27 +0530 Message-ID: <57160EDB.5040704@nvidia.com> References: <20160331192227.GU2350@sirena.org.uk> <56FD7F07.7010404@nvidia.com> <20160331203942.GV2350@sirena.org.uk> <56FE2009.4020302@nvidia.com> <20160401161121.GZ2350@sirena.org.uk> <570370E5.3070901@nvidia.com> <20160412010226.GO3351@sirena.org.uk> <570CF822.4050002@nvidia.com> <20160413065310.GK14664@sirena.org.uk> <571601E7.2000901@nvidia.com> <20160419105545.GT3217@sirena.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20160419105545.GT3217-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Mark Brown Cc: Bjorn Andersson , Bjorn Andersson , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Liam Girdwood , Stephen Warren , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Gandhar Dighe , Stuart Yates List-Id: devicetree@vger.kernel.org On Tuesday 19 April 2016 04:25 PM, Mark Brown wrote: > * PGP Signed by an unknown key > > On Tue, Apr 19, 2016 at 03:31:11PM +0530, Laxman Dewangan wrote: >> On Wednesday 13 April 2016 12:23 PM, Mark Brown wrote: >>> Possibly. It did also occur to me last night that having a Maxim >>> specific property which lets you specify a raw register value to >>> configure in cases where the board goes out of spec (as opposed to a >>> time which could be left specified as the real value) might solve the >>> problem without being too terrible from an interface point of view, >>> though something that's directly obvious from the schematic would be >>> much better. > You appear to have ignord my suggestion above... > > I was too focused on the getting the info from Maxim on this to get something in equation form. There is no way to get the deviation equation and your suggestion is only seems solution for this issue. Thanks for evaluating/trying at your end and for valuable suggestion. Now, for property, I will add maxim,ramp-delay This is device specific ramp delay which need to be configure on device register. The platform observed delay must be provided via regulator-ramp-delay. I will send the patch on this. Thanks, Laxman -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html