From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41586) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1asqZR-0001QJ-5b for qemu-devel@nongnu.org; Wed, 20 Apr 2016 07:45:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1asqZN-000362-4V for qemu-devel@nongnu.org; Wed, 20 Apr 2016 07:45:25 -0400 Received: from mail-lf0-x22a.google.com ([2a00:1450:4010:c07::22a]:35393) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1asqZM-00034s-Tu for qemu-devel@nongnu.org; Wed, 20 Apr 2016 07:45:21 -0400 Received: by mail-lf0-x22a.google.com with SMTP id c126so39139573lfb.2 for ; Wed, 20 Apr 2016 04:45:20 -0700 (PDT) References: <1460044433-19282-1-git-send-email-sergey.fedorov@linaro.org> <1460044433-19282-7-git-send-email-sergey.fedorov@linaro.org> <87oa94vbtr.fsf@linaro.org> From: Sergey Fedorov Message-ID: <57176BCE.8060901@gmail.com> Date: Wed, 20 Apr 2016 14:45:18 +0300 MIME-Version: 1.0 In-Reply-To: <87oa94vbtr.fsf@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 06/11] tcg/s390: Make direct jump patching thread-safe List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Alex_Benn=c3=a9e?= , Sergey Fedorov Cc: qemu-devel@nongnu.org, Paolo Bonzini , Peter Crosthwaite , Richard Henderson , Alexander Graf On 20/04/16 13:01, Alex Bennée wrote: > Sergey Fedorov writes: >> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h >> index 82399175fe80..e18cc24e50f0 100644 >> --- a/include/exec/exec-all.h >> +++ b/include/exec/exec-all.h (snip) >> @@ -1716,6 +1718,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, >> >> case INDEX_op_goto_tb: >> if (s->tb_jmp_offset) { >> + /* align branch displacement for atomic pathing */ > s/pathing/patching/ > >> + if (((uintptr_t)s->code_ptr & 3) == 0) { >> + tcg_out16(s, NOP); >> + } > Isn't this the wrong way around? Shouldn't we insert the NOP is code_ptr & 3 > == 2 (I assume 1 & 3 are impossible). Or is it that we need to be > unaligned when we out the jmp so the offset itself is aligned. Yes, it is the offset itself should be aligned to patch in atomically. Kind regards, Sergey > >> tcg_out16(s, RIL_BRCL | (S390_CC_ALWAYS << 4)); >> s->tb_jmp_offset[args[0]] = tcg_current_code_size(s); >> s->code_ptr += 2;