Re: [PATCH v4 14/22] x86/fpu/xstate: Expand the xstate buffer on the first use of dynamic user state

["Bae, Chang Seok" <chang.seok.bae@intel.com>]

On Mar 20, 2021, at 15:13, Thomas Gleixner <tglx@linutronix.de> wrote:
> On Sun, Feb 21 2021 at 10:56, Chang S. Bae wrote:
>> +
>> +/* Update MSR IA32_XFD with xfirstuse_not_detected() if needed. */
>> +static inline void xdisable_switch(struct fpu *prev, struct fpu *next)
>> +{
>> +	if (!static_cpu_has(X86_FEATURE_XFD) || !xfirstuse_enabled())
>> +		return;
>> +
>> +	if (unlikely(prev->state_mask != next->state_mask))
>> +		xdisable_setbits(xfirstuse_not_detected(next));
>> +}
> 
> So this is invoked on context switch. Toggling bit 18 of MSR_IA32_XFD
> when it does not match. The spec document says:
> 
>  "System software may disable use of Intel AMX by clearing XCR0[18:17], by
>   clearing CR4.OSXSAVE, or by setting IA32_XFD[18]. It is recommended that
>   system software initialize AMX state (e.g., by executing TILERELEASE)
>   before doing so. This is because maintaining AMX state in a
>   non-initialized state may have negative power and performance
>   implications."
> 
> I'm not seeing anything related to this. Is this a recommendation
> which can be ignored or is that going to be duct taped into the code
> base once the first user complains about slowdowns of their non AMX
> workloads on that machine?

I think this part in the doc is worth to be mentioned at first:

    “The XTILEDATA state component is very large, and an operating system may
    prefer not to allocate memory for the XTILEDATA state of every user
    thread. Such an operating system that enables Intel AMX might prefer to
    prevent specific user threads from using the feature. An extension called
    extended feature disable (XFD) is added to the XSAVE feature set to
    support such a usage. XFD is described in Section 3.2.6.”

So, in this series, instead of saving this state always, the state is saved
only when used. XFD helps to detect each thread’s first use of those
registers. Thus, the XFD’s MSR bit is maintained as per-task here.

Thanks,
Chang