From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47054C32792 for ; Thu, 3 Oct 2019 10:49:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 265FC21A4C for ; Thu, 3 Oct 2019 10:49:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729433AbfJCKtJ (ORCPT ); Thu, 3 Oct 2019 06:49:09 -0400 Received: from foss.arm.com ([217.140.110.172]:41264 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727756AbfJCKtJ (ORCPT ); Thu, 3 Oct 2019 06:49:09 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 428721000; Thu, 3 Oct 2019 03:49:08 -0700 (PDT) Received: from [10.37.12.210] (unknown [10.37.12.210]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A282B3F706; Thu, 3 Oct 2019 03:49:04 -0700 (PDT) Subject: Re: [PATCHv9 2/3] arm64: dts: qcom: msm8998: Add Coresight support To: daniel.thompson@linaro.org, mathieu.poirier@linaro.org Cc: saiprakash.ranjan@codeaurora.org, jeffrey.l.hugo@gmail.com, mark.rutland@arm.com, rnayak@codeaurora.org, alexander.shishkin@linux.intel.com, linux-arm-msm@vger.kernel.org, marc.w.gonzalez@free.fr, linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, agross@kernel.org, sibis@codeaurora.org, leo.yan@linaro.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm-owner@vger.kernel.org References: <90114e06825e537c3aafd3de5c78743a9de6fadc.1564550873.git.saiprakash.ranjan@codeaurora.org> <16212a577339204e901cf4eefa5e82f1@codeaurora.org> <5b8835905a704fb813714694a792df54@codeaurora.org> <20191003102023.qk6ik5vmatheaofs@holly.lan> From: Suzuki K Poulose Message-ID: <57349bda-0e86-5fe0-3be0-55b12748c346@arm.com> Date: Thu, 3 Oct 2019 11:52:36 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20191003102023.qk6ik5vmatheaofs@holly.lan> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 10/03/2019 11:20 AM, Daniel Thompson wrote: > On Wed, Oct 02, 2019 at 09:03:59AM -0600, Mathieu Poirier wrote: >> On Tue, 1 Oct 2019 at 12:05, Sai Prakash Ranjan >> wrote: >>> >>> On 2019-10-01 11:01, Jeffrey Hugo wrote: >>>> On Tue, Oct 1, 2019 at 11:52 AM Sai Prakash Ranjan >>>> wrote: >>>>> >>>>> >>>>> Haan then likely it's the firmware issue. >>>>> We should probably disable coresight in soc dtsi and enable only for >>>>> MTP. For now you can add a status=disabled for all coresight nodes in >>>>> msm8998.dtsi and I will send the patch doing the same in a day or >>>>> two(sorry I am travelling currently). >>>> >>>> This sounds sane to me (and is what I did while bisecting the issue). >>>> When you do create the patch, feel free to add the following tags as >>>> you see fit. >>>> >>>> Reported-by: Jeffrey Hugo >>>> Tested-by: Jeffrey Hugo >>> >>> Thanks Jeffrey, I will add them. >>> Hope Mathieu and Suzuki are OK with this. >> >> The problem here is that a debug and production device are using the >> same device tree, i.e msm8998.dtsi. Disabling coresight devices in >> the DTS file will allow the laptop to boot but completely disabled >> coresight blocks on the MTP board. Leaving things as is breaks the >> laptop but allows coresight to be used on the MTP board. One of three >> things can happen: >> >> 1) Nothing gets done and production board can't boot without DTS modifications. >> 2) Disable tags are added to the DTS file and the debug board can't >> use coresight without modifications. >> 2) The handling of the debug power domain is done properly on the >> MSM8998 rather than relying on the bootloader to enable it. >> 3) The DTS file is split or reorganised to account for debug/production devices. > > msm8998.dtsi is a SoC include file. Can't whatever default it adopts be > reversed in the board include files such as msm8998-mtp.dtsi or > msm8998-clamshell.dtsi ? Or like Mathieu said, all the Coresight specific nodes could be moved in to say, msm8998-coresight.dtsi and could be included into the platforms where it actually works. Suzuki From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C58E1C32792 for ; Thu, 3 Oct 2019 10:49:20 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 833952086A for ; Thu, 3 Oct 2019 10:49:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="JLkiCltJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 833952086A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ClapMHzSSkt2hCxX2yW7LAK9H9ZZLMUP40vuB0KDqXU=; b=JLkiCltJz6Ua6ssuWSWxpVGYm DPAUAote/UcPM5u9NXZ++j9oH4+zrA+c5U9BF3tT/Ljhuu6Ir0Kin9ROhFhga/XhEa3mEw5eW+lmr q/9afvluAtTAt2/X7iRXUxOS8FfDhG0X8K/dSAV74QeJx/YbtkQkpbqCiYQ6O1yawBt6X7SLFgtLf LYWTycsKKP/LT4nmT7mSt8mzRA+5k+HEpvTlqJD6pbADQmj3rTEfzvUF0l9q60AMqAuYr2OXm6YV6 StqXCq/j5SBsiDBmCIY5Tlh8S1la5acqRVL7BW5og6PAjshPsooewFP7BfeXrTqoXuR+kJbhkZ16L bkYV2hxVw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.2 #3 (Red Hat Linux)) id 1iFyfZ-0006zE-Av; Thu, 03 Oct 2019 10:49:13 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.2 #3 (Red Hat Linux)) id 1iFyfX-0006xe-1f for linux-arm-kernel@lists.infradead.org; Thu, 03 Oct 2019 10:49:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 428721000; Thu, 3 Oct 2019 03:49:08 -0700 (PDT) Received: from [10.37.12.210] (unknown [10.37.12.210]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A282B3F706; Thu, 3 Oct 2019 03:49:04 -0700 (PDT) Subject: Re: [PATCHv9 2/3] arm64: dts: qcom: msm8998: Add Coresight support To: daniel.thompson@linaro.org, mathieu.poirier@linaro.org References: <90114e06825e537c3aafd3de5c78743a9de6fadc.1564550873.git.saiprakash.ranjan@codeaurora.org> <16212a577339204e901cf4eefa5e82f1@codeaurora.org> <5b8835905a704fb813714694a792df54@codeaurora.org> <20191003102023.qk6ik5vmatheaofs@holly.lan> From: Suzuki K Poulose Message-ID: <57349bda-0e86-5fe0-3be0-55b12748c346@arm.com> Date: Thu, 3 Oct 2019 11:52:36 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20191003102023.qk6ik5vmatheaofs@holly.lan> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191003_034911_184949_DF4A37D6 X-CRM114-Status: GOOD ( 18.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, saiprakash.ranjan@codeaurora.org, rnayak@codeaurora.org, jeffrey.l.hugo@gmail.com, alexander.shishkin@linux.intel.com, linux-arm-msm@vger.kernel.org, marc.w.gonzalez@free.fr, linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, agross@kernel.org, sibis@codeaurora.org, leo.yan@linaro.org, linux-arm-msm-owner@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/03/2019 11:20 AM, Daniel Thompson wrote: > On Wed, Oct 02, 2019 at 09:03:59AM -0600, Mathieu Poirier wrote: >> On Tue, 1 Oct 2019 at 12:05, Sai Prakash Ranjan >> wrote: >>> >>> On 2019-10-01 11:01, Jeffrey Hugo wrote: >>>> On Tue, Oct 1, 2019 at 11:52 AM Sai Prakash Ranjan >>>> wrote: >>>>> >>>>> >>>>> Haan then likely it's the firmware issue. >>>>> We should probably disable coresight in soc dtsi and enable only for >>>>> MTP. For now you can add a status=disabled for all coresight nodes in >>>>> msm8998.dtsi and I will send the patch doing the same in a day or >>>>> two(sorry I am travelling currently). >>>> >>>> This sounds sane to me (and is what I did while bisecting the issue). >>>> When you do create the patch, feel free to add the following tags as >>>> you see fit. >>>> >>>> Reported-by: Jeffrey Hugo >>>> Tested-by: Jeffrey Hugo >>> >>> Thanks Jeffrey, I will add them. >>> Hope Mathieu and Suzuki are OK with this. >> >> The problem here is that a debug and production device are using the >> same device tree, i.e msm8998.dtsi. Disabling coresight devices in >> the DTS file will allow the laptop to boot but completely disabled >> coresight blocks on the MTP board. Leaving things as is breaks the >> laptop but allows coresight to be used on the MTP board. One of three >> things can happen: >> >> 1) Nothing gets done and production board can't boot without DTS modifications. >> 2) Disable tags are added to the DTS file and the debug board can't >> use coresight without modifications. >> 2) The handling of the debug power domain is done properly on the >> MSM8998 rather than relying on the bootloader to enable it. >> 3) The DTS file is split or reorganised to account for debug/production devices. > > msm8998.dtsi is a SoC include file. Can't whatever default it adopts be > reversed in the board include files such as msm8998-mtp.dtsi or > msm8998-clamshell.dtsi ? Or like Mathieu said, all the Coresight specific nodes could be moved in to say, msm8998-coresight.dtsi and could be included into the platforms where it actually works. Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel