From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51436) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2Pri-000696-Uo for qemu-devel@nongnu.org; Mon, 16 May 2016 17:15:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b2Prf-0003bX-4l for qemu-devel@nongnu.org; Mon, 16 May 2016 17:15:49 -0400 Received: from mout.web.de ([212.227.17.11]:60592) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2Pre-0003a9-Qr for qemu-devel@nongnu.org; Mon, 16 May 2016 17:15:47 -0400 References: <1462796162-13375-1-git-send-email-davidkiarie4@gmail.com> <1462796162-13375-2-git-send-email-davidkiarie4@gmail.com> <5738CE0E.7000404@web.de> From: Jan Kiszka Message-ID: <57396DF4.5050305@web.de> Date: Mon, 16 May 2016 08:51:32 +0200 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [V10 1/4] hw/i386: Introduce AMD IOMMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Kiarie Cc: QEMU Developers , Valentine Sinitsyn , Peter Xu , Marcel Apfelbaum , "Michael S. Tsirkin" On 2016-05-16 07:59, David Kiarie wrote: > On Sun, May 15, 2016 at 10:29 PM, Jan Kiszka wrote: >> On 2016-05-09 14:15, David Kiarie wrote: >>> + ret->iova = addr & AMDVI_PAGE_MASK_4K; >>> + ret->translated_addr = (pte & AMDVI_DEV_PT_ROOT_MASK) & >>> + AMDVI_PAGE_MASK_4K; >>> + ret->addr_mask = ~AMDVI_PAGE_MASK_4K; >> >> This does not take huge pages (2M, 1G, ...) into account. Jailhouse >> creates them, and its Linux guest goes mad. You need to use the correct >> page size here, analogously to intel_iommu.c. > > Yes, this was meant to work with normal pages only. Until recently > intel iommu supported 4k pages only so I figured I could as well work > with 4k pages. Anyway, will fix this. Huge pages are optional on Intel. Not AMD. Jan