From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [mips][cfi] Unable to write into flash under qemu
Date: Tue, 5 Jul 2016 18:10:28 +0200 [thread overview]
Message-ID: <577BDBF4.8010807@gmail.com> (raw)
In-Reply-To: <CAOazyz25NM3XK+y5fO7=81x2+7LQ2ZELSK2sxZddub0K3VbRYg@mail.gmail.com>
Hi Alon,
+cc Paul, Stefan
Am 05.07.2016 um 14:04 schrieb Alon Bar-Lev:
> Hi,
>
> Found the debug setting.
>
> When I try to erase flash under qemu I get the following error, the
> erase actually succeeds in the backed file, I see sector as 0xff.
>
> Can anyone check if problem is within u-boot or qemu?
>
> Thanks!
I've found the problem. Paul sent a fix [1] for pflash in June 2013
to make 32 Bit access working with YAMON bootloader.
The fix mirrors the flash status value in the upper 16 Bits of the return
value. Thus U-Boot gets a value of 0x800080 in flash_full_status_check()
after a block erase command. U-Boot compares the status value in
flash_isequal() with the expected value of 0x80 but that fails.
Because of this I think pflash support for Malta is broken since Qemu 1.6.0.
A possible fix could be this:
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -608,7 +608,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
if ((retcode == ERR_OK)
- && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
+ && !flash_isset (info, sector, 0, FLASH_STATUS_DONE)) {
retcode = ERR_INVAL;
printf ("Flash %s error at address %lx\n", prompt,
info->start[sector]);
BTW: you can enable Qemu pflash debug output in hw/block/pflash_cfi01.c
>
> ---
>
> malta # erase BE230000 BE23FFFF
>
> fwc addr be230000 cmd 50 00000050 32bit x 32 bit
> fwc addr be230000 cmd 20 00000020 32bit x 32 bit
> fwc addr be230000 cmd d0 000000d0 32bit x 32 bit
> flash_is_busy: 0
> is= cmd 80(?) addr be230000 is= 00800080 00000080
> Flash erase error at address be230000
> fwc addr be230000 cmd ff 000000ff 32bit x 32 bit
> done
>
> ---
>
> user1 at localhost ~/linux-course/embedded/qemu $ qemu-system-mips -M
> malta -nographic -net nic,netdev=eth0 -netdev
> tap,id=eth0,ifname=vm0,script=/bin/true -drive
> if=pflash,file=/tmp/flash,format=raw -m 256
>
>
> U-Boot 2016.05 (Jul 04 2016 - 19:22:36 +0000)
>
> Board: MIPS Malta CoreLV
> DRAM: 256 MiB
> Flash: flash detect cfi
> fwc addr be000000 cmd f0 f0 8bit x 8 bit
> fwc addr be000000 cmd ff ff 8bit x 8 bit
> fwc addr be000055 cmd 98 98 8bit x 8 bit
> is= cmd 51(Q) addr be000010 is= 0 51
> fwc addr be000555 cmd 98 98 8bit x 8 bit
> is= cmd 51(Q) addr be000010 is= 0 51
> fwc addr be000000 cmd f0 f0f0 16bit x 8 bit
> fwc addr be000000 cmd ff ffff 16bit x 8 bit
> fwc addr be0000aa cmd 98 9898 16bit x 8 bit
> is= cmd 51(Q) addr be000020 is= 0000 5151
> fwc addr be000aaa cmd 98 9898 16bit x 8 bit
> is= cmd 51(Q) addr be000020 is= 0000 5151
> fwc addr be000000 cmd f0 00f0 16bit x 16 bit
> fwc addr be000000 cmd ff 00ff 16bit x 16 bit
> fwc addr be0000aa cmd 98 0098 16bit x 16 bit
> is= cmd 51(Q) addr be000020 is= 0000 0051
> fwc addr be000aaa cmd 98 0098 16bit x 16 bit
> is= cmd 51(Q) addr be000020 is= 0000 0051
> fwc addr be000000 cmd f0 f0f0f0f0 32bit x 8 bit
> fwc addr be000000 cmd ff ffffffff 32bit x 8 bit
> fwc addr be000154 cmd 98 98989898 32bit x 8 bit
> is= cmd 51(Q) addr be000040 is= 00000051 51515151
> fwc addr be001554 cmd 98 98989898 32bit x 8 bit
> is= cmd 51(Q) addr be000040 is= 00000051 51515151
> fwc addr be000000 cmd f0 00f000f0 32bit x 16 bit
> fwc addr be000000 cmd ff 00ff00ff 32bit x 16 bit
> fwc addr be000154 cmd 98 00980098 32bit x 16 bit
> is= cmd 51(Q) addr be000040 is= 00000051 00510051
> fwc addr be001554 cmd 98 00980098 32bit x 16 bit
> is= cmd 51(Q) addr be000040 is= 00000051 00510051
> fwc addr be000000 cmd f0 000000f0 32bit x 32 bit
> fwc addr be000000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be000154 cmd 98 00000098 32bit x 32 bit
> is= cmd 51(Q) addr be000040 is= 00000051 00000051
> is= cmd 52(R) addr be000044 is= 00000052 00000052
> is= cmd 59(Y) addr be000048 is= 00000059 00000059
> device interface is 2
> found port 4 chip 4 port 32 bits chip 32 bits
> 00 : 51 52 59 01 00 31 00 00 00 00 00 45 55 00 00 07 QRY..1.....EU...
> 10 : 07 0a 00 04 04 04 00 16 02 00 0b 00 01 3f 00 00 .............?..
> 20 : 01 50 52 49 31 30 00 00 00 00 00 00 00 00 00 00 .PRI10..........
> fwc addr be000000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be000000 cmd 90 00000090 32bit x 32 bit
> fwc addr be000000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be000154 cmd 98 00000098 32bit x 32 bit
> manufacturer is 1
> manufacturer id is 0x0
> device id is 0x0
> device id2 is 0x0
> cfi version is 0x3130
> size_ratio 1 port 32 bits chip 32 bits
> found 1 erase regions
> erase region 0: 0x0100003f
> erase_region_count = 64 erase_region_size = 65536
> fwc addr be000000 cmd 90 00000090 32bit x 32 bit
> fwc addr be000000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be010000 cmd 90 00000090 32bit x 32 bit
> fwc addr be010000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be020000 cmd 90 00000090 32bit x 32 bit
> fwc addr be020000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be030000 cmd 90 00000090 32bit x 32 bit
> fwc addr be030000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be040000 cmd 90 00000090 32bit x 32 bit
> fwc addr be040000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be050000 cmd 90 00000090 32bit x 32 bit
> fwc addr be050000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be060000 cmd 90 00000090 32bit x 32 bit
> fwc addr be060000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be070000 cmd 90 00000090 32bit x 32 bit
> fwc addr be070000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be080000 cmd 90 00000090 32bit x 32 bit
> fwc addr be080000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be090000 cmd 90 00000090 32bit x 32 bit
> fwc addr be090000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be0a0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be0a0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be0b0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be0b0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be0c0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be0c0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be0d0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be0d0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be0e0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be0e0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be0f0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be0f0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be100000 cmd 90 00000090 32bit x 32 bit
> fwc addr be100000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be110000 cmd 90 00000090 32bit x 32 bit
> fwc addr be110000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be120000 cmd 90 00000090 32bit x 32 bit
> fwc addr be120000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be130000 cmd 90 00000090 32bit x 32 bit
> fwc addr be130000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be140000 cmd 90 00000090 32bit x 32 bit
> fwc addr be140000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be150000 cmd 90 00000090 32bit x 32 bit
> fwc addr be150000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be160000 cmd 90 00000090 32bit x 32 bit
> fwc addr be160000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be170000 cmd 90 00000090 32bit x 32 bit
> fwc addr be170000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be180000 cmd 90 00000090 32bit x 32 bit
> fwc addr be180000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be190000 cmd 90 00000090 32bit x 32 bit
> fwc addr be190000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be1a0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be1a0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be1b0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be1b0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be1c0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be1c0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be1d0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be1d0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be1e0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be1e0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be1f0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be1f0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be200000 cmd 90 00000090 32bit x 32 bit
> fwc addr be200000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be210000 cmd 90 00000090 32bit x 32 bit
> fwc addr be210000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be220000 cmd 90 00000090 32bit x 32 bit
> fwc addr be220000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be230000 cmd 90 00000090 32bit x 32 bit
> fwc addr be230000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be240000 cmd 90 00000090 32bit x 32 bit
> fwc addr be240000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be250000 cmd 90 00000090 32bit x 32 bit
> fwc addr be250000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be260000 cmd 90 00000090 32bit x 32 bit
> fwc addr be260000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be270000 cmd 90 00000090 32bit x 32 bit
> fwc addr be270000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be280000 cmd 90 00000090 32bit x 32 bit
> fwc addr be280000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be290000 cmd 90 00000090 32bit x 32 bit
> fwc addr be290000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be2a0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be2a0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be2b0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be2b0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be2c0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be2c0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be2d0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be2d0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be2e0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be2e0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be2f0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be2f0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be300000 cmd 90 00000090 32bit x 32 bit
> fwc addr be300000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be310000 cmd 90 00000090 32bit x 32 bit
> fwc addr be310000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be320000 cmd 90 00000090 32bit x 32 bit
> fwc addr be320000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be330000 cmd 90 00000090 32bit x 32 bit
> fwc addr be330000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be340000 cmd 90 00000090 32bit x 32 bit
> fwc addr be340000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be350000 cmd 90 00000090 32bit x 32 bit
> fwc addr be350000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be360000 cmd 90 00000090 32bit x 32 bit
> fwc addr be360000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be370000 cmd 90 00000090 32bit x 32 bit
> fwc addr be370000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be380000 cmd 90 00000090 32bit x 32 bit
> fwc addr be380000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be390000 cmd 90 00000090 32bit x 32 bit
> fwc addr be390000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be3a0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be3a0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be3b0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be3b0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be3c0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be3c0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be3d0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be3d0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be3e0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be3e0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be3f0000 cmd 90 00000090 32bit x 32 bit
> fwc addr be3f0000 cmd ff 000000ff 32bit x 32 bit
> fwc addr be000000 cmd ff 000000ff 32bit x 32 bit
> 4 MiB
> *** Warning - bad CRC, using default environment
>
> In: serial
> Out: serial
> Err: serial
> Net: pcnet#0
> IDE: Bus 0: not available
> malta # flinfo
>
> Bank # 1: CFI conformant flash (32 x 32) Size: 4 MB in 64 Sectors
> Intel Extended command set, Manufacturer ID: 0x00, Device ID: 0x00
> Erase timeout: 16384 ms, write timeout: 3 ms
> Buffer write timeout: 3 ms, buffer size: 2048 bytes
>
> Sector Start Addresses:
> BE000000 RO BE010000 RO BE020000 RO BE030000 RO BE040000
> BE050000 BE060000 BE070000 BE080000 BE090000
> BE0A0000 BE0B0000 BE0C0000 BE0D0000 BE0E0000
> BE0F0000 BE100000 BE110000 BE120000 BE130000
> BE140000 BE150000 BE160000 BE170000 BE180000
> BE190000 BE1A0000 BE1B0000 BE1C0000 BE1D0000
> BE1E0000 BE1F0000 BE200000 BE210000 BE220000
> BE230000 BE240000 BE250000 BE260000 BE270000
> BE280000 BE290000 BE2A0000 BE2B0000 BE2C0000
> BE2D0000 BE2E0000 BE2F0000 BE300000 BE310000
> BE320000 BE330000 BE340000 BE350000 BE360000
> BE370000 BE380000 BE390000 BE3A0000 BE3B0000
> BE3C0000 BE3D0000 BE3E0000 RO BE3F0000 RO
> malta # erase BE230000 BE23FFFF
>
> fwc addr be230000 cmd 50 00000050 32bit x 32 bit
> fwc addr be230000 cmd 20 00000020 32bit x 32 bit
> fwc addr be230000 cmd d0 000000d0 32bit x 32 bit
> flash_is_busy: 0
> is= cmd 80(?) addr be230000 is= 00800080 00000080
> Flash erase error at address be230000
> fwc addr be230000 cmd ff 000000ff 32bit x 32 bit
> done
> malta #
>
>
>
>
> On 5 July 2016 at 03:08, Alon Bar-Lev <alon.barlev@gmail.com> wrote:
>>
>> Hello,
>>
>> I am using malta board within qemu. I tried recent releases and master of both.
>> Two years ago in qemu-1.5 and qemu-1.6 I could use erase and cp.b in order to erase and write to the flash.
>> Now when I try to erase flash I get an error suggesting the erase failed, however, I do see 0xff all over in the device backed file (-pflash).
>> When I try to write I also receive a failure message.
>>
>> I am unsure how to debug this, I went back in time and tried the qemu-1.6 and got same error. I suspect it is has something to do with u-boot CFI driver.
>>
>> Can anyone help determine if issue is at qemu side or at u-boot side? How can I debug this?
>>
>> Thanks,
>> Alon
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
--
- Daniel
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next prev parent reply other threads:[~2016-07-05 16:10 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-05 0:08 [U-Boot] [mips][cfi] Unable to write into flash under qemu Alon Bar-Lev
2016-07-05 12:04 ` Alon Bar-Lev
2016-07-05 16:10 ` Daniel Schwierzeck [this message]
2016-07-05 16:50 ` Alon Bar-Lev
2016-07-05 17:05 ` Daniel Schwierzeck
2016-07-05 17:17 ` Alon Bar-Lev
2016-07-05 17:34 ` Daniel Schwierzeck
2016-07-05 17:57 ` Alon Bar-Lev
2016-07-10 20:50 ` Alon Bar-Lev
2016-07-18 8:38 ` Stefan Roese
2016-07-18 12:13 ` Daniel Schwierzeck
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