From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kever Yang Date: Mon, 25 Jul 2016 14:58:38 +0800 Subject: [U-Boot] [PATCH 1/2] rk3399: add basic soc driver In-Reply-To: <1469422259-16952-2-git-send-email-kever.yang@rock-chips.com> References: <1469422259-16952-1-git-send-email-kever.yang@rock-chips.com> <1469422259-16952-2-git-send-email-kever.yang@rock-chips.com> Message-ID: <5795B89E.9030100@rock-chips.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/25/2016 12:50 PM, Kever Yang wrote: > This patch add driver for: [snip] ... > + > +static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) > +{ > + struct rk3399_clk_priv *priv = dev_get_priv(clk->dev); > + > + switch (clk->id) { > + case 0 ... 63: > + return 0; > + case SCLK_SDMMC: > + case SCLK_EMMC: > + rk3399_mmc_set_clk(priv->cru, clk->id, rate); > + break; > + case SCLK_I2C1: > + case SCLK_I2C2: > + case SCLK_I2C3: > + case SCLK_I2C5: > + case SCLK_I2C6: > + case SCLK_I2C7: > + rk3399_i2c_set_clk(priv->cru, clk->id, rate); > + break; > + case DCLK_VOP0: > + case DCLK_VOP1: > + rk3399_vop_set_clk(priv->cru, clk->id, rate); > + break; > + default: > + return -ENOENT; > + } > + > + return 0; It suppose to return a real clock rate instead a '0' here, will update with other potential comments later. Thanks, - Kever > +} > + > +static struct clk_ops rk3399_clk_ops = { > + .get_rate = rk3399_clk_get_rate, > + .set_rate = rk3399_clk_set_rate, > +}; > + > +void *rockchip_get_cru(void) > +{ > + struct udevice *dev; > + fdt_addr_t addr; > + int ret; > + > + ret = uclass_get_device_by_name(UCLASS_CLK, > + "clock-controller at ff760000", > + &dev); > + if (ret) > + return ERR_PTR(ret); > + > + addr = dev_get_addr(dev); > + if (addr == FDT_ADDR_T_NONE) > + return ERR_PTR(-EINVAL); > + > + return (void *)addr; > +} > + > +static int rk3399_clk_probe(struct udevice *dev) > +{ > + struct rk3399_clk_priv *priv = dev_get_priv(dev); > + > + priv->cru = (struct rk3399_cru *)dev_get_addr(dev); > + rkclk_init(priv->cru); > + > + return 0; > +} > + > +static int rk3399_clk_bind(struct udevice *dev) > +{ > + int ret; > + > + /* The reset driver does not have a device node, so bind it here */ > + ret = device_bind_driver(gd->dm_root, "rk3399_sysreset", "reset", &dev); > + if (ret) > + printf("Warning: No RK3399 reset driver: ret=%d\n", ret); > + > + return 0; > +} > + > +static const struct udevice_id rk3399_clk_ids[] = { > + { .compatible = "rockchip,rk3399-cru" }, > + { } > +}; > + > +U_BOOT_DRIVER(clk_rk3399) = { > + .name = "clk_rk3399", > + .id = UCLASS_CLK, > + .of_match = rk3399_clk_ids, > + .priv_auto_alloc_size = sizeof(struct rk3399_clk_priv), > + .ops = &rk3399_clk_ops, > + .bind = rk3399_clk_bind, > + .probe = rk3399_clk_probe, > +};