From mboxrd@z Thu Jan  1 00:00:00 1970
From: Kever Yang <kever.yang@rock-chips.com>
Date: Sat, 08 Oct 2016 10:54:12 +0800
Subject: [U-Boot] [PATCH v2 1/3] rockchip: rk3036: Move
 rockchip_get_cru() out of the driver
In-Reply-To: <1475373892-20780-1-git-send-email-sjg@chromium.org>
References: <1475373892-20780-1-git-send-email-sjg@chromium.org>
Message-ID: <57F85FD4.9070403@rock-chips.com>
List-Id: <u-boot.lists.denx.de>
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To: u-boot@lists.denx.de

Hi Simon,

On 10/02/2016 10:04 AM, Simon Glass wrote:
> This function is called from outside the driver. It should be placed into
> common SoC code. Move it.
>
> Also rename the driver symbol to be more consistent with the other rockchip
> clock drivers.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2: None
>
>   arch/arm/include/asm/arch-rockchip/cru_rk3036.h |  6 +++++
>   arch/arm/mach-rockchip/rk3036/Makefile          |  2 ++
>   arch/arm/mach-rockchip/rk3036/clk_rk3036.c      | 33 +++++++++++++++++++++++++
>   drivers/clk/rockchip/clk_rk3036.c               | 24 +-----------------
>   4 files changed, 42 insertions(+), 23 deletions(-)
>   create mode 100644 arch/arm/mach-rockchip/rk3036/clk_rk3036.c
>
> diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
> index 7ecc8ee..aaef4b9 100644
> --- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
> +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
> @@ -24,6 +24,12 @@
>   #define PERI_HCLK_HZ	148500000
>   #define PERI_PCLK_HZ	74250000
>   
> +/* Private data for the clock driver - used by rockchip_get_cru() */
> +struct rk3036_clk_priv {
> +	struct rk3036_cru *cru;
> +	ulong rate;
> +};
> +
>   struct rk3036_cru {
>   	struct rk3036_pll {
>   		unsigned int con0;
> diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile
> index 916a7a4..20d28f7 100644
> --- a/arch/arm/mach-rockchip/rk3036/Makefile
> +++ b/arch/arm/mach-rockchip/rk3036/Makefile
> @@ -4,6 +4,8 @@
>   # SPDX-License-Identifier:     GPL-2.0+
>   #
>   
> +obj-y += clk_rk3036.o
> +
>   ifndef CONFIG_SPL_BUILD
>   obj-y += syscon_rk3036.o
>   endif
> diff --git a/arch/arm/mach-rockchip/rk3036/clk_rk3036.c b/arch/arm/mach-rockchip/rk3036/clk_rk3036.c
> new file mode 100644
> index 0000000..6a06afb
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3036/clk_rk3036.c
> @@ -0,0 +1,33 @@
> +/*
> + * Copyright (C) 2016 Google, Inc
> + * Written by Simon Glass <sjg@chromium.org>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <syscon.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/cru_rk3036.h>
> +
> +int rockchip_get_clk(struct udevice **devp)
> +{
> +	return uclass_get_device_by_driver(UCLASS_CLK,
> +			DM_GET_DRIVER(rockchip_rk3036_cru), devp);
> +}
> +
> +void *rockchip_get_cru(void)
> +{
> +	struct rk3036_clk_priv *priv;
> +	struct udevice *dev;
> +	int ret;
> +
> +	ret = rockchip_get_clk(&dev);
> +	if (ret)
> +		return ERR_PTR(ret);
> +
> +	priv = dev_get_priv(dev);
> +
> +	return priv->cru;
> +}
> diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
> index 8899b0c..7e3bf96 100644
> --- a/drivers/clk/rockchip/clk_rk3036.c
> +++ b/drivers/clk/rockchip/clk_rk3036.c
> @@ -19,11 +19,6 @@
>   
>   DECLARE_GLOBAL_DATA_PTR;
>   
> -struct rk3036_clk_priv {
> -	struct rk3036_cru *cru;
> -	ulong rate;
> -};
> -
>   enum {
>   	VCO_MAX_HZ	= 2400U * 1000000,
>   	VCO_MIN_HZ	= 600 * 1000000,
> @@ -49,23 +44,6 @@ enum {
>   static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
>   static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
>   
> -void *rockchip_get_cru(void)
> -{
> -	struct udevice *dev;
> -	fdt_addr_t addr;
> -	int ret;
> -
> -	ret = uclass_get_device(UCLASS_CLK, 0, &dev);
> -	if (ret)
> -		return ERR_PTR(ret);
> -
> -	addr = dev_get_addr(dev);
> -	if (addr == FDT_ADDR_T_NONE)
> -		return ERR_PTR(-EINVAL);
> -
> -	return (void *)addr;
> -}
> -
>   static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,
>   			 const struct pll_div *div)
>   {
> @@ -371,7 +349,7 @@ static const struct udevice_id rk3036_clk_ids[] = {
>   	{ }
>   };
>   
> -U_BOOT_DRIVER(clk_rk3036) = {
> +U_BOOT_DRIVER(rockchip_rk3036_cru) = {
>   	.name		= "clk_rk3036",
>   	.id		= UCLASS_CLK,
>   	.of_match	= rk3036_clk_ids,

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever