From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936437AbcJUU1n (ORCPT ); Fri, 21 Oct 2016 16:27:43 -0400 Received: from smtp2-g21.free.fr ([212.27.42.2]:52669 "EHLO smtp2-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932638AbcJUU1l (ORCPT ); Fri, 21 Oct 2016 16:27:41 -0400 Subject: Re: Disabling an interrupt in the handler locks the system up To: Thomas Gleixner Cc: Marc Zyngier , Jason Cooper , LKML , Linux ARM , Sebastian Frias References: <580A4460.2090306@free.fr> <580A60ED.3030307@free.fr> <20161021201448.3f4a0a7a@arm.com> <580A70B9.8060507@free.fr> From: Mason Message-ID: <580A7A2B.5000702@free.fr> Date: Fri, 21 Oct 2016 22:27:23 +0200 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:43.0) Gecko/20100101 Firefox/43.0 SeaMonkey/2.40 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/10/2016 21:49, Thomas Gleixner wrote: > On Fri, 21 Oct 2016, Mason wrote: >> On 21/10/2016 21:14, Marc Zyngier wrote: >>> If connecting a device that signals its interrupt as level low to an >>> input line configured as level high doesn't strike you as a major >>> issue, nothing will. At that point, you can put anything you want in >>> your DT. >> >> If I understand correctly, you are saying that I should have >> specified IRQ_TYPE_LEVEL_LOW, instead of IRQ_TYPE_LEVEL_HIGH? >> >> If the HW outputs 1 when idle, and 0 when busy, that >> is level low? (Sorry if this is obvious, I'm absolutely >> clueless in this subject matter.) > > We describe the level which is raising the interrupt. So in your case the > line goes to 0 when the interrupt is active, so the level is LOW. I see. I'll try that on Monday. In my mental picture of interrupts (which is obviously so incomplete as to be wrong) interrupts are a way for hardware to tell the CPU that they urgently need the CPU's attention. Obviously, the hardware being idle (line high) is not an urgent matter which interests the CPU. Likewise, I'm not sure the CPU cares that the hardware is busy (line low). It seems to me the interesting event from the CPU's perspective is when the hardware completes a "task" (transition from low to high). So I had originally configured the interrupt as IRQ_TYPE_EDGE_RISING. (There is an edge detection block in the irqchip, but the HW designer warned me that at low frequencies, it is possible to "miss" some edges, and we should prefer level triggers if possible.) Regards. From mboxrd@z Thu Jan 1 00:00:00 1970 From: slash.tmp@free.fr (Mason) Date: Fri, 21 Oct 2016 22:27:23 +0200 Subject: Disabling an interrupt in the handler locks the system up In-Reply-To: References: <580A4460.2090306@free.fr> <580A60ED.3030307@free.fr> <20161021201448.3f4a0a7a@arm.com> <580A70B9.8060507@free.fr> Message-ID: <580A7A2B.5000702@free.fr> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 21/10/2016 21:49, Thomas Gleixner wrote: > On Fri, 21 Oct 2016, Mason wrote: >> On 21/10/2016 21:14, Marc Zyngier wrote: >>> If connecting a device that signals its interrupt as level low to an >>> input line configured as level high doesn't strike you as a major >>> issue, nothing will. At that point, you can put anything you want in >>> your DT. >> >> If I understand correctly, you are saying that I should have >> specified IRQ_TYPE_LEVEL_LOW, instead of IRQ_TYPE_LEVEL_HIGH? >> >> If the HW outputs 1 when idle, and 0 when busy, that >> is level low? (Sorry if this is obvious, I'm absolutely >> clueless in this subject matter.) > > We describe the level which is raising the interrupt. So in your case the > line goes to 0 when the interrupt is active, so the level is LOW. I see. I'll try that on Monday. In my mental picture of interrupts (which is obviously so incomplete as to be wrong) interrupts are a way for hardware to tell the CPU that they urgently need the CPU's attention. Obviously, the hardware being idle (line high) is not an urgent matter which interests the CPU. Likewise, I'm not sure the CPU cares that the hardware is busy (line low). It seems to me the interesting event from the CPU's perspective is when the hardware completes a "task" (transition from low to high). So I had originally configured the interrupt as IRQ_TYPE_EDGE_RISING. (There is an edge detection block in the irqchip, but the HW designer warned me that at low frequencies, it is possible to "miss" some edges, and we should prefer level triggers if possible.) Regards.