From mboxrd@z Thu Jan 1 00:00:00 1970 From: zourongrong@huawei.com (Rongrong Zou) Date: Mon, 14 Nov 2016 22:10:38 +0800 Subject: [PATCH v6 8/9] drm/hisilicon/hibmc: Add vblank interruput In-Reply-To: References: <1477639682-22520-1-git-send-email-zourongrong@gmail.com> <1477639682-22520-9-git-send-email-zourongrong@gmail.com> Message-ID: <5829C5DE.4040100@huawei.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org ? 2016/11/11 9:49, Sean Paul ??: > On Fri, Oct 28, 2016 at 3:28 AM, Rongrong Zou wrote: >> Add vblank interrupt. >> >> Signed-off-by: Rongrong Zou >> --- >> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 56 ++++++++++++++++++++++++- >> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 1 + >> 2 files changed, 56 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c >> index 4253603..b668e3e 100644 >> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c >> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c >> @@ -40,16 +40,46 @@ >> >> static int hibmc_enable_vblank(struct drm_device *dev, unsigned int pipe) >> { >> + struct hibmc_drm_device *hidev = >> + (struct hibmc_drm_device *)dev->dev_private; >> + >> + writel(HIBMC_RAW_INTERRUPT_EN_VBLANK(1), >> + hidev->mmio + HIBMC_RAW_INTERRUPT_EN); >> + >> return 0; >> } >> >> static void hibmc_disable_vblank(struct drm_device *dev, unsigned int pipe) >> { >> + struct hibmc_drm_device *hidev = >> + (struct hibmc_drm_device *)dev->dev_private; >> + >> + writel(HIBMC_RAW_INTERRUPT_EN_VBLANK(0), >> + hidev->mmio + HIBMC_RAW_INTERRUPT_EN); >> +} >> + >> +irqreturn_t hibmc_drm_interrupt(int irq, void *arg) >> +{ >> + struct drm_device *dev = (struct drm_device *)arg; >> + struct hibmc_drm_device *hidev = >> + (struct hibmc_drm_device *)dev->dev_private; >> + struct drm_crtc *crtc = &hidev->crtc; >> + u32 status; >> + >> + status = readl(hidev->mmio + HIBMC_RAW_INTERRUPT); >> + >> + if (status & HIBMC_RAW_INTERRUPT_VBLANK(1)) { >> + writel(HIBMC_RAW_INTERRUPT_VBLANK(1), >> + hidev->mmio + HIBMC_RAW_INTERRUPT); >> + drm_crtc_handle_vblank(crtc); >> + } >> + >> + return IRQ_HANDLED; >> } >> >> static struct drm_driver hibmc_driver = { >> .driver_features = DRIVER_GEM | DRIVER_MODESET | >> - DRIVER_ATOMIC, >> + DRIVER_ATOMIC | DRIVER_HAVE_IRQ, >> .fops = &hibmc_fops, >> .name = "hibmc", >> .date = "20160828", >> @@ -63,6 +93,7 @@ static void hibmc_disable_vblank(struct drm_device *dev, unsigned int pipe) >> .dumb_create = hibmc_dumb_create, >> .dumb_map_offset = hibmc_dumb_mmap_offset, >> .dumb_destroy = drm_gem_dumb_destroy, >> + .irq_handler = hibmc_drm_interrupt, >> }; >> >> static int hibmc_pm_suspend(struct device *dev) >> @@ -242,6 +273,13 @@ static int hibmc_unload(struct drm_device *dev) >> struct hibmc_drm_device *hidev = dev->dev_private; >> >> hibmc_fbdev_fini(hidev); >> + >> + if (dev->irq_enabled) >> + drm_irq_uninstall(dev); >> + if (hidev->msi_enabled) >> + pci_disable_msi(dev->pdev); >> + drm_vblank_cleanup(dev); >> + >> hibmc_kms_fini(hidev); >> hibmc_mm_fini(hidev); >> hibmc_hw_fini(hidev); >> @@ -272,6 +310,22 @@ static int hibmc_load(struct drm_device *dev, unsigned long flags) >> if (ret) >> goto err; >> >> + ret = drm_vblank_init(dev, dev->mode_config.num_crtc); >> + if (ret) { >> + DRM_ERROR("failed to initialize vblank.\n"); >> + goto err; >> + } >> + >> + hidev->msi_enabled = 0; >> + if (pci_enable_msi(dev->pdev)) { > > It would be useful to check and print the return value of this. agreed, thanks. > >> + DRM_ERROR("Enabling MSI failed!\n"); >> + } else { >> + hidev->msi_enabled = 1; >> + ret = drm_irq_install(dev, dev->pdev->irq); >> + if (ret) >> + DRM_ERROR("install irq failed , ret = %d\n", ret); > > DRM_WARN might be more appropriate, given that this isn't considered fatal. agreed, thanks. > >> + } >> + >> /* reset all the states of crtc/plane/encoder/connector */ >> drm_mode_config_reset(dev); >> >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h >> index 450247d..f1706fb 100644 >> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h >> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h >> @@ -42,6 +42,7 @@ struct hibmc_drm_device { >> void __iomem *fb_map; >> unsigned long fb_base; >> unsigned long fb_size; >> + int msi_enabled; > > Why not bool? agreed, thanks. Regards, Rongrong. > >> >> /* drm */ >> struct drm_device *dev; >> -- >> 1.9.1 >> >> >> _______________________________________________ >> linux-arm-kernel mailing list >> linux-arm-kernel at lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > _______________________________________________ > linuxarm mailing list > linuxarm at huawei.com > http://rnd-openeuler.huawei.com/mailman/listinfo/linuxarm > > . > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rongrong Zou Subject: Re: [PATCH v6 8/9] drm/hisilicon/hibmc: Add vblank interruput Date: Mon, 14 Nov 2016 22:10:38 +0800 Message-ID: <5829C5DE.4040100@huawei.com> References: <1477639682-22520-1-git-send-email-zourongrong@gmail.com> <1477639682-22520-9-git-send-email-zourongrong@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Sean Paul , Rongrong Zou Cc: Mark Rutland , Archit , shenhui@huawei.com, Tomeu Vizoso , Jonathan Corbet , Dave Airlie , catalin.marinas@arm.com, Emil Velikov , linuxarm@huawei.com, dri-devel , Xinliang Liu , james.xiong@huawei.com, Daniel Stone , Daniel Vetter , Will Deacon , lijianhua@huawei.com, Linux ARM Kernel , Benjamin Gaignard List-Id: dri-devel@lists.freedesktop.org 5ZyoIDIwMTYvMTEvMTEgOTo0OSwgU2VhbiBQYXVsIOWGmemBkzoKPiBPbiBGcmksIE9jdCAyOCwg MjAxNiBhdCAzOjI4IEFNLCBSb25ncm9uZyBab3UgPHpvdXJvbmdyb25nQGdtYWlsLmNvbT4gd3Jv dGU6Cj4+IEFkZCB2YmxhbmsgaW50ZXJydXB0Lgo+Pgo+PiBTaWduZWQtb2ZmLWJ5OiBSb25ncm9u ZyBab3UgPHpvdXJvbmdyb25nQGdtYWlsLmNvbT4KPj4gLS0tCj4+ICAgZHJpdmVycy9ncHUvZHJt L2hpc2lsaWNvbi9oaWJtYy9oaWJtY19kcm1fZHJ2LmMgfCA1NiArKysrKysrKysrKysrKysrKysr KysrKystCj4+ICAgZHJpdmVycy9ncHUvZHJtL2hpc2lsaWNvbi9oaWJtYy9oaWJtY19kcm1fZHJ2 LmggfCAgMSArCj4+ICAgMiBmaWxlcyBjaGFuZ2VkLCA1NiBpbnNlcnRpb25zKCspLCAxIGRlbGV0 aW9uKC0pCj4+Cj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaGlzaWxpY29uL2hpYm1j L2hpYm1jX2RybV9kcnYuYyBiL2RyaXZlcnMvZ3B1L2RybS9oaXNpbGljb24vaGlibWMvaGlibWNf ZHJtX2Rydi5jCj4+IGluZGV4IDQyNTM2MDMuLmI2NjhlM2UgMTAwNjQ0Cj4+IC0tLSBhL2RyaXZl cnMvZ3B1L2RybS9oaXNpbGljb24vaGlibWMvaGlibWNfZHJtX2Rydi5jCj4+ICsrKyBiL2RyaXZl cnMvZ3B1L2RybS9oaXNpbGljb24vaGlibWMvaGlibWNfZHJtX2Rydi5jCj4+IEBAIC00MCwxNiAr NDAsNDYgQEAKPj4KPj4gICBzdGF0aWMgaW50IGhpYm1jX2VuYWJsZV92Ymxhbmsoc3RydWN0IGRy bV9kZXZpY2UgKmRldiwgdW5zaWduZWQgaW50IHBpcGUpCj4+ICAgewo+PiArICAgICAgIHN0cnVj dCBoaWJtY19kcm1fZGV2aWNlICpoaWRldiA9Cj4+ICsgICAgICAgICAgICAgICAoc3RydWN0IGhp Ym1jX2RybV9kZXZpY2UgKilkZXYtPmRldl9wcml2YXRlOwo+PiArCj4+ICsgICAgICAgd3JpdGVs KEhJQk1DX1JBV19JTlRFUlJVUFRfRU5fVkJMQU5LKDEpLAo+PiArICAgICAgICAgICAgICBoaWRl di0+bW1pbyArIEhJQk1DX1JBV19JTlRFUlJVUFRfRU4pOwo+PiArCj4+ICAgICAgICAgIHJldHVy biAwOwo+PiAgIH0KPj4KPj4gICBzdGF0aWMgdm9pZCBoaWJtY19kaXNhYmxlX3ZibGFuayhzdHJ1 Y3QgZHJtX2RldmljZSAqZGV2LCB1bnNpZ25lZCBpbnQgcGlwZSkKPj4gICB7Cj4+ICsgICAgICAg c3RydWN0IGhpYm1jX2RybV9kZXZpY2UgKmhpZGV2ID0KPj4gKyAgICAgICAgICAgICAgIChzdHJ1 Y3QgaGlibWNfZHJtX2RldmljZSAqKWRldi0+ZGV2X3ByaXZhdGU7Cj4+ICsKPj4gKyAgICAgICB3 cml0ZWwoSElCTUNfUkFXX0lOVEVSUlVQVF9FTl9WQkxBTksoMCksCj4+ICsgICAgICAgICAgICAg IGhpZGV2LT5tbWlvICsgSElCTUNfUkFXX0lOVEVSUlVQVF9FTik7Cj4+ICt9Cj4+ICsKPj4gK2ly cXJldHVybl90IGhpYm1jX2RybV9pbnRlcnJ1cHQoaW50IGlycSwgdm9pZCAqYXJnKQo+PiArewo+ PiArICAgICAgIHN0cnVjdCBkcm1fZGV2aWNlICpkZXYgPSAoc3RydWN0IGRybV9kZXZpY2UgKilh cmc7Cj4+ICsgICAgICAgc3RydWN0IGhpYm1jX2RybV9kZXZpY2UgKmhpZGV2ID0KPj4gKyAgICAg ICAgICAgICAgIChzdHJ1Y3QgaGlibWNfZHJtX2RldmljZSAqKWRldi0+ZGV2X3ByaXZhdGU7Cj4+ ICsgICAgICAgc3RydWN0IGRybV9jcnRjICpjcnRjID0gJmhpZGV2LT5jcnRjOwo+PiArICAgICAg IHUzMiBzdGF0dXM7Cj4+ICsKPj4gKyAgICAgICBzdGF0dXMgPSByZWFkbChoaWRldi0+bW1pbyAr IEhJQk1DX1JBV19JTlRFUlJVUFQpOwo+PiArCj4+ICsgICAgICAgaWYgKHN0YXR1cyAmIEhJQk1D X1JBV19JTlRFUlJVUFRfVkJMQU5LKDEpKSB7Cj4+ICsgICAgICAgICAgICAgICB3cml0ZWwoSElC TUNfUkFXX0lOVEVSUlVQVF9WQkxBTksoMSksCj4+ICsgICAgICAgICAgICAgICAgICAgICAgaGlk ZXYtPm1taW8gKyBISUJNQ19SQVdfSU5URVJSVVBUKTsKPj4gKyAgICAgICAgICAgICAgIGRybV9j cnRjX2hhbmRsZV92YmxhbmsoY3J0Yyk7Cj4+ICsgICAgICAgfQo+PiArCj4+ICsgICAgICAgcmV0 dXJuIElSUV9IQU5ETEVEOwo+PiAgIH0KPj4KPj4gICBzdGF0aWMgc3RydWN0IGRybV9kcml2ZXIg aGlibWNfZHJpdmVyID0gewo+PiAgICAgICAgICAuZHJpdmVyX2ZlYXR1cmVzICAgICAgICA9IERS SVZFUl9HRU0gfCBEUklWRVJfTU9ERVNFVCB8Cj4+IC0gICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICBEUklWRVJfQVRPTUlDLAo+PiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgRFJJVkVSX0FUT01JQyB8IERSSVZFUl9IQVZFX0lSUSwKPj4gICAgICAgICAgLmZvcHMgICAg ICAgICAgICAgICAgICAgPSAmaGlibWNfZm9wcywKPj4gICAgICAgICAgLm5hbWUgICAgICAgICAg ICAgICAgICAgPSAiaGlibWMiLAo+PiAgICAgICAgICAuZGF0ZSAgICAgICAgICAgICAgICAgICA9 ICIyMDE2MDgyOCIsCj4+IEBAIC02Myw2ICs5Myw3IEBAIHN0YXRpYyB2b2lkIGhpYm1jX2Rpc2Fi bGVfdmJsYW5rKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYsIHVuc2lnbmVkIGludCBwaXBlKQo+PiAg ICAgICAgICAuZHVtYl9jcmVhdGUgICAgICAgICAgICA9IGhpYm1jX2R1bWJfY3JlYXRlLAo+PiAg ICAgICAgICAuZHVtYl9tYXBfb2Zmc2V0ICAgICAgICA9IGhpYm1jX2R1bWJfbW1hcF9vZmZzZXQs Cj4+ICAgICAgICAgIC5kdW1iX2Rlc3Ryb3kgICAgICAgICAgID0gZHJtX2dlbV9kdW1iX2Rlc3Ry b3ksCj4+ICsgICAgICAgLmlycV9oYW5kbGVyICAgICAgICAgICAgPSBoaWJtY19kcm1faW50ZXJy dXB0LAo+PiAgIH07Cj4+Cj4+ICAgc3RhdGljIGludCBoaWJtY19wbV9zdXNwZW5kKHN0cnVjdCBk ZXZpY2UgKmRldikKPj4gQEAgLTI0Miw2ICsyNzMsMTMgQEAgc3RhdGljIGludCBoaWJtY191bmxv YWQoc3RydWN0IGRybV9kZXZpY2UgKmRldikKPj4gICAgICAgICAgc3RydWN0IGhpYm1jX2RybV9k ZXZpY2UgKmhpZGV2ID0gZGV2LT5kZXZfcHJpdmF0ZTsKPj4KPj4gICAgICAgICAgaGlibWNfZmJk ZXZfZmluaShoaWRldik7Cj4+ICsKPj4gKyAgICAgICBpZiAoZGV2LT5pcnFfZW5hYmxlZCkKPj4g KyAgICAgICAgICAgICAgIGRybV9pcnFfdW5pbnN0YWxsKGRldik7Cj4+ICsgICAgICAgaWYgKGhp ZGV2LT5tc2lfZW5hYmxlZCkKPj4gKyAgICAgICAgICAgICAgIHBjaV9kaXNhYmxlX21zaShkZXYt PnBkZXYpOwo+PiArICAgICAgIGRybV92YmxhbmtfY2xlYW51cChkZXYpOwo+PiArCj4+ICAgICAg ICAgIGhpYm1jX2ttc19maW5pKGhpZGV2KTsKPj4gICAgICAgICAgaGlibWNfbW1fZmluaShoaWRl dik7Cj4+ICAgICAgICAgIGhpYm1jX2h3X2ZpbmkoaGlkZXYpOwo+PiBAQCAtMjcyLDYgKzMxMCwy MiBAQCBzdGF0aWMgaW50IGhpYm1jX2xvYWQoc3RydWN0IGRybV9kZXZpY2UgKmRldiwgdW5zaWdu ZWQgbG9uZyBmbGFncykKPj4gICAgICAgICAgaWYgKHJldCkKPj4gICAgICAgICAgICAgICAgICBn b3RvIGVycjsKPj4KPj4gKyAgICAgICByZXQgPSBkcm1fdmJsYW5rX2luaXQoZGV2LCBkZXYtPm1v ZGVfY29uZmlnLm51bV9jcnRjKTsKPj4gKyAgICAgICBpZiAocmV0KSB7Cj4+ICsgICAgICAgICAg ICAgICBEUk1fRVJST1IoImZhaWxlZCB0byBpbml0aWFsaXplIHZibGFuay5cbiIpOwo+PiArICAg ICAgICAgICAgICAgZ290byBlcnI7Cj4+ICsgICAgICAgfQo+PiArCj4+ICsgICAgICAgaGlkZXYt Pm1zaV9lbmFibGVkID0gMDsKPj4gKyAgICAgICBpZiAocGNpX2VuYWJsZV9tc2koZGV2LT5wZGV2 KSkgewo+Cj4gSXQgd291bGQgYmUgdXNlZnVsIHRvIGNoZWNrIGFuZCBwcmludCB0aGUgcmV0dXJu IHZhbHVlIG9mIHRoaXMuCgphZ3JlZWQsIHRoYW5rcy4KCj4KPj4gKyAgICAgICAgICAgICAgIERS TV9FUlJPUigiRW5hYmxpbmcgTVNJIGZhaWxlZCFcbiIpOwo+PiArICAgICAgIH0gZWxzZSB7Cj4+ ICsgICAgICAgICAgICAgICBoaWRldi0+bXNpX2VuYWJsZWQgPSAxOwo+PiArICAgICAgICAgICAg ICAgcmV0ID0gZHJtX2lycV9pbnN0YWxsKGRldiwgZGV2LT5wZGV2LT5pcnEpOwo+PiArICAgICAg ICAgICAgICAgaWYgKHJldCkKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgRFJNX0VSUk9SKCJp bnN0YWxsIGlycSBmYWlsZWQgLCByZXQgPSAlZFxuIiwgcmV0KTsKPgo+IERSTV9XQVJOIG1pZ2h0 IGJlIG1vcmUgYXBwcm9wcmlhdGUsIGdpdmVuIHRoYXQgdGhpcyBpc24ndCBjb25zaWRlcmVkIGZh dGFsLgoKYWdyZWVkLCB0aGFua3MuCgo+Cj4+ICsgICAgICAgfQo+PiArCj4+ICAgICAgICAgIC8q IHJlc2V0IGFsbCB0aGUgc3RhdGVzIG9mIGNydGMvcGxhbmUvZW5jb2Rlci9jb25uZWN0b3IgKi8K Pj4gICAgICAgICAgZHJtX21vZGVfY29uZmlnX3Jlc2V0KGRldik7Cj4+Cj4+IGRpZmYgLS1naXQg YS9kcml2ZXJzL2dwdS9kcm0vaGlzaWxpY29uL2hpYm1jL2hpYm1jX2RybV9kcnYuaCBiL2RyaXZl cnMvZ3B1L2RybS9oaXNpbGljb24vaGlibWMvaGlibWNfZHJtX2Rydi5oCj4+IGluZGV4IDQ1MDI0 N2QuLmYxNzA2ZmIgMTAwNjQ0Cj4+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9oaXNpbGljb24vaGli bWMvaGlibWNfZHJtX2Rydi5oCj4+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9oaXNpbGljb24vaGli bWMvaGlibWNfZHJtX2Rydi5oCj4+IEBAIC00Miw2ICs0Miw3IEBAIHN0cnVjdCBoaWJtY19kcm1f ZGV2aWNlIHsKPj4gICAgICAgICAgdm9pZCBfX2lvbWVtICAgKmZiX21hcDsKPj4gICAgICAgICAg dW5zaWduZWQgbG9uZyAgZmJfYmFzZTsKPj4gICAgICAgICAgdW5zaWduZWQgbG9uZyAgZmJfc2l6 ZTsKPj4gKyAgICAgICBpbnQgbXNpX2VuYWJsZWQ7Cj4KPiBXaHkgbm90IGJvb2w/CgphZ3JlZWQs IHRoYW5rcy4KClJlZ2FyZHMsClJvbmdyb25nLgoKPgo+Pgo+PiAgICAgICAgICAvKiBkcm0gKi8K Pj4gICAgICAgICAgc3RydWN0IGRybV9kZXZpY2UgICpkZXY7Cj4+IC0tCj4+IDEuOS4xCj4+Cj4+ Cj4+IF9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCj4+IGxp bnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0Cj4+IGxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5m cmFkZWFkLm9yZwo+PiBodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZv L2xpbnV4LWFybS1rZXJuZWwKPiBfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwo+IGxpbnV4YXJtIG1haWxpbmcgbGlzdAo+IGxpbnV4YXJtQGh1YXdlaS5jb20K PiBodHRwOi8vcm5kLW9wZW5ldWxlci5odWF3ZWkuY29tL21haWxtYW4vbGlzdGluZm8vbGludXhh cm0KPgo+IC4KPgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5p bmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8v bGludXgtYXJtLWtlcm5lbAo=