From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: [PATCH 3/3] x86: drop underscore prefixed 32-bit register names Date: Tue, 07 Mar 2017 09:43:25 -0700 Message-ID: <58BEF13D0200007800140EDF@prv-mh.provo.novell.com> References: <58BEF0470200007800140EB8@prv-mh.provo.novell.com> <58BEF0470200007800140EB8@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="=__Part5069BB3D.1__=" Return-path: Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1clID0-0000xQ-Rk for xen-devel@lists.xenproject.org; Tue, 07 Mar 2017 16:43:34 +0000 In-Reply-To: <58BEF0470200007800140EB8@prv-mh.provo.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: xen-devel Cc: Andrew Cooper List-Id: xen-devel@lists.xenproject.org This is a MIME message. If you are reading this text, you may want to consider changing to a mail reader or gateway that understands how to properly handle MIME multipart messages. --=__Part5069BB3D.1__= Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Now that all underscore prefixed instances have been replaced, this concludes the register renaming project. Signed-off-by: Jan Beulich --- a/xen/include/public/arch-x86/xen-x86_32.h +++ b/xen/include/public/arch-x86/xen-x86_32.h @@ -114,7 +114,7 @@ #elif defined(__XEN__) || defined(__XEN_TOOLS__) /* Anonymous unions include all permissible names (e.g., al/ah/ax/eax). = */ #define __DECL_REG_LO8(which) union { \ - uint32_t e ## which ## x, _e ## which ## x; \ + uint32_t e ## which ## x; \ uint16_t which ## x; \ struct { \ uint8_t which ## l; \ --- a/xen/include/public/arch-x86/xen-x86_64.h +++ b/xen/include/public/arch-x86/xen-x86_64.h @@ -134,7 +134,7 @@ struct iret_context { /* Anonymous unions include all permissible names (e.g., al/ah/ax/eax/rax)= . */ #define __DECL_REG_LOHI(which) union { \ uint64_t r ## which ## x; \ - uint32_t e ## which ## x, _e ## which ## x; \ + uint32_t e ## which ## x; \ uint16_t which ## x; \ struct { \ uint8_t which ## l; \ @@ -143,13 +143,13 @@ struct iret_context { } #define __DECL_REG_LO8(name) union { \ uint64_t r ## name; \ - uint32_t e ## name, _e ## name; \ + uint32_t e ## name; \ uint16_t name; \ uint8_t name ## l; \ } #define __DECL_REG_LO16(name) union { \ uint64_t r ## name; \ - uint32_t e ## name, _e ## name; \ + uint32_t e ## name; \ uint16_t name; \ } #define __DECL_REG_HI(num) union { \ --- a/xen/include/public/arch-x86/xen.h +++ b/xen/include/public/arch-x86/xen.h @@ -58,15 +58,15 @@ =20 #if defined(__i386__) # ifdef __XEN__ -__DeFiNe__ __DECL_REG_LO8(which) uint32_t _e ## which ## x -__DeFiNe__ __DECL_REG_LO16(name) union { uint32_t e ## name, _e ## name; = } +__DeFiNe__ __DECL_REG_LO8(which) uint32_t e ## which ## x +__DeFiNe__ __DECL_REG_LO16(name) union { uint32_t e ## name; } # endif #include "xen-x86_32.h" # ifdef __XEN__ __UnDeF__ __DECL_REG_LO8 __UnDeF__ __DECL_REG_LO16 -__DeFiNe__ __DECL_REG_LO8(which) _e ## which ## x -__DeFiNe__ __DECL_REG_LO16(name) _e ## name +__DeFiNe__ __DECL_REG_LO8(which) e ## which ## x +__DeFiNe__ __DECL_REG_LO16(name) e ## name # endif #elif defined(__x86_64__) #include "xen-x86_64.h" --=__Part5069BB3D.1__= Content-Type: text/plain; name="x86-regnames-32bit-unique.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="x86-regnames-32bit-unique.patch" x86: drop underscore prefixed 32-bit register names=0A=0ANow that all = underscore prefixed instances have been replaced, this=0Aconcludes the = register renaming project.=0A=0ASigned-off-by: Jan Beulich =0A=0A--- a/xen/include/public/arch-x86/xen-x86_32.h=0A+++ b/xen/include= /public/arch-x86/xen-x86_32.h=0A@@ -114,7 +114,7 @@=0A #elif defined(__XEN_= _) || defined(__XEN_TOOLS__)=0A /* Anonymous unions include all permissible= names (e.g., al/ah/ax/eax). */=0A #define __DECL_REG_LO8(which) union { = \=0A- uint32_t e ## which ## x, _e ## which ## x; \=0A+ uint32_t e = ## which ## x; \=0A uint16_t which ## x; \=0A struct { \=0A = uint8_t which ## l; \=0A--- a/xen/include/public/arch-x86/xen-x86_64.h=0A+= ++ b/xen/include/public/arch-x86/xen-x86_64.h=0A@@ -134,7 +134,7 @@ struct = iret_context {=0A /* Anonymous unions include all permissible names (e.g., = al/ah/ax/eax/rax). */=0A #define __DECL_REG_LOHI(which) union { \=0A = uint64_t r ## which ## x; \=0A- uint32_t e ## which ## x, _e ## which = ## x; \=0A+ uint32_t e ## which ## x; \=0A uint16_t which ## x; = \=0A struct { \=0A uint8_t which ## l; \=0A@@ -143,13 +143,13 = @@ struct iret_context {=0A }=0A #define __DECL_REG_LO8(name) union { \=0A = uint64_t r ## name; \=0A- uint32_t e ## name, _e ## name; \=0A+ = uint32_t e ## name; \=0A uint16_t name; \=0A uint8_t name ## l; = \=0A }=0A #define __DECL_REG_LO16(name) union { \=0A uint64_t r ## = name; \=0A- uint32_t e ## name, _e ## name; \=0A+ uint32_t e ## = name; \=0A uint16_t name; \=0A }=0A #define __DECL_REG_HI(num) union { = \=0A--- a/xen/include/public/arch-x86/xen.h=0A+++ b/xen/include/public/arch= -x86/xen.h=0A@@ -58,15 +58,15 @@=0A =0A #if defined(__i386__)=0A # ifdef = __XEN__=0A-__DeFiNe__ __DECL_REG_LO8(which) uint32_t _e ## which ## = x=0A-__DeFiNe__ __DECL_REG_LO16(name) union { uint32_t e ## name, _e ## = name; }=0A+__DeFiNe__ __DECL_REG_LO8(which) uint32_t e ## which ## = x=0A+__DeFiNe__ __DECL_REG_LO16(name) union { uint32_t e ## name; }=0A # = endif=0A #include "xen-x86_32.h"=0A # ifdef __XEN__=0A __UnDeF__ __DECL_REG= _LO8=0A __UnDeF__ __DECL_REG_LO16=0A-__DeFiNe__ __DECL_REG_LO8(which) _e = ## which ## x=0A-__DeFiNe__ __DECL_REG_LO16(name) _e ## name=0A+__DeFiNe__ = __DECL_REG_LO8(which) e ## which ## x=0A+__DeFiNe__ __DECL_REG_LO16(name) = e ## name=0A # endif=0A #elif defined(__x86_64__)=0A #include "xen-x86_64.h= "=0A --=__Part5069BB3D.1__= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KWGVuLWRldmVs IG1haWxpbmcgbGlzdApYZW4tZGV2ZWxAbGlzdHMueGVuLm9yZwpodHRwczovL2xpc3RzLnhlbi5v cmcveGVuLWRldmVsCg== --=__Part5069BB3D.1__=--