From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753138AbdCHQDU (ORCPT ); Wed, 8 Mar 2017 11:03:20 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:37610 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750824AbdCHQDR (ORCPT ); Wed, 8 Mar 2017 11:03:17 -0500 Subject: Re: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support To: Joao Pinto , Bjorn Helgaas , Jingoo Han References: <1487325042-28227-1-git-send-email-kishon@ti.com> <1487325042-28227-9-git-send-email-kishon@ti.com> <45e5288e-d11f-c855-af9b-692a42d878c6@synopsys.com> <58BE42B2.20305@ti.com> <02461be2-268d-485a-2bc4-3b148726d37d@synopsys.com> <58BFEC7D.3090608@ti.com> <35d539ba-956f-330e-c28d-b67c3d414578@synopsys.com> CC: , , , , , , From: Kishon Vijay Abraham I Message-ID: <58C00798.1030302@ti.com> Date: Wed, 8 Mar 2017 19:01:04 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <35d539ba-956f-330e-c28d-b67c3d414578@synopsys.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Wednesday 08 March 2017 05:07 PM, Joao Pinto wrote: > Ās 11:35 AM de 3/8/2017, Kishon Vijay Abraham I escreveu: >> Hi, >> >> On Wednesday 08 March 2017 05:02 PM, Joao Pinto wrote: >>> >>> Hi Kishon, >>> >>>>> Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to >>>>> PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)? >>>> >>>> Yes of course, I will send you the definition soon. >>> >>> As promissed here is the definition for Inbound: >>> >>> +/* register address builder */ >>> +#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register) \ >>> + ((0x3 << 20) | (region << 9) | \ >>> + (0x1 << 8) | (register << 2)) >> >> Cool, thanks! > > No problem! If you have doubts, please let me know. Okay, so this looks slightly different than the outbound macro since it takes the register argument. In the case of outbound PCIE_GET_ATU_OUTB_UNR_REG_OFFSET returns the offset which was used like dw_pcie_write_dbi(pci, base, offset + reg, 0x4, val); How should the value from PCIE_GET_ATU_INB_UNR_REG_ADDR be used? Thanks Kishon From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kishon Vijay Abraham I Subject: Re: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support Date: Wed, 8 Mar 2017 19:01:04 +0530 Message-ID: <58C00798.1030302@ti.com> References: <1487325042-28227-1-git-send-email-kishon@ti.com> <1487325042-28227-9-git-send-email-kishon@ti.com> <45e5288e-d11f-c855-af9b-692a42d878c6@synopsys.com> <58BE42B2.20305@ti.com> <02461be2-268d-485a-2bc4-3b148726d37d@synopsys.com> <58BFEC7D.3090608@ti.com> <35d539ba-956f-330e-c28d-b67c3d414578@synopsys.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <35d539ba-956f-330e-c28d-b67c3d414578@synopsys.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Joao Pinto , Bjorn Helgaas , Jingoo Han Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, nsekhar@ti.com, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Hi, On Wednesday 08 March 2017 05:07 PM, Joao Pinto wrote: > =C0s 11:35 AM de 3/8/2017, Kishon Vijay Abraham I escreveu: >> Hi, >> >> On Wednesday 08 March 2017 05:02 PM, Joao Pinto wrote: >>> >>> Hi Kishon, >>> >>>>> Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to >>>>> PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)? >>>> >>>> Yes of course, I will send you the definition soon. >>> >>> As promissed here is the definition for Inbound: >>> >>> +/* register address builder */ >>> +#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register) \ >>> + ((0x3 << 20) | (region << 9) | \ >>> + (0x1 << 8) | (register << 2)) >> >> Cool, thanks! > = > No problem! If you have doubts, please let me know. Okay, so this looks slightly different than the outbound macro since it tak= es the register argument. In the case of outbound PCIE_GET_ATU_OUTB_UNR_REG_OF= FSET returns the offset which was used like dw_pcie_write_dbi(pci, base, offset + reg, 0x4, val); How should the value from PCIE_GET_ATU_INB_UNR_REG_ADDR be used? Thanks Kishon From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Subject: Re: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support To: Joao Pinto , Bjorn Helgaas , Jingoo Han References: <1487325042-28227-1-git-send-email-kishon@ti.com> <1487325042-28227-9-git-send-email-kishon@ti.com> <45e5288e-d11f-c855-af9b-692a42d878c6@synopsys.com> <58BE42B2.20305@ti.com> <02461be2-268d-485a-2bc4-3b148726d37d@synopsys.com> <58BFEC7D.3090608@ti.com> <35d539ba-956f-330e-c28d-b67c3d414578@synopsys.com> From: Kishon Vijay Abraham I Message-ID: <58C00798.1030302@ti.com> Date: Wed, 8 Mar 2017 19:01:04 +0530 MIME-Version: 1.0 In-Reply-To: <35d539ba-956f-330e-c28d-b67c3d414578@synopsys.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, nsekhar@ti.com, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="windows-1252" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+bjorn=helgaas.com@lists.infradead.org List-ID: Hi, On Wednesday 08 March 2017 05:07 PM, Joao Pinto wrote: > =C0s 11:35 AM de 3/8/2017, Kishon Vijay Abraham I escreveu: >> Hi, >> >> On Wednesday 08 March 2017 05:02 PM, Joao Pinto wrote: >>> >>> Hi Kishon, >>> >>>>> Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to >>>>> PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)? >>>> >>>> Yes of course, I will send you the definition soon. >>> >>> As promissed here is the definition for Inbound: >>> >>> +/* register address builder */ >>> +#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register) \ >>> + ((0x3 << 20) | (region << 9) | \ >>> + (0x1 << 8) | (register << 2)) >> >> Cool, thanks! > = > No problem! If you have doubts, please let me know. Okay, so this looks slightly different than the outbound macro since it tak= es the register argument. In the case of outbound PCIE_GET_ATU_OUTB_UNR_REG_OF= FSET returns the offset which was used like dw_pcie_write_dbi(pci, base, offset + reg, 0x4, val); How should the value from PCIE_GET_ATU_INB_UNR_REG_ADDR be used? Thanks Kishon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 From: kishon@ti.com (Kishon Vijay Abraham I) Date: Wed, 8 Mar 2017 19:01:04 +0530 Subject: [PATCH v2 08/22] PCI: dwc: designware: Add EP mode support In-Reply-To: <35d539ba-956f-330e-c28d-b67c3d414578@synopsys.com> References: <1487325042-28227-1-git-send-email-kishon@ti.com> <1487325042-28227-9-git-send-email-kishon@ti.com> <45e5288e-d11f-c855-af9b-692a42d878c6@synopsys.com> <58BE42B2.20305@ti.com> <02461be2-268d-485a-2bc4-3b148726d37d@synopsys.com> <58BFEC7D.3090608@ti.com> <35d539ba-956f-330e-c28d-b67c3d414578@synopsys.com> Message-ID: <58C00798.1030302@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, On Wednesday 08 March 2017 05:07 PM, Joao Pinto wrote: > ?s 11:35 AM de 3/8/2017, Kishon Vijay Abraham I escreveu: >> Hi, >> >> On Wednesday 08 March 2017 05:02 PM, Joao Pinto wrote: >>> >>> Hi Kishon, >>> >>>>> Can you provide PCIE_GET_ATU_INB_UNR_REG_OFFSET (similar to >>>>> PCIE_GET_ATU_OUTB_UNR_REG_OFFSET)? >>>> >>>> Yes of course, I will send you the definition soon. >>> >>> As promissed here is the definition for Inbound: >>> >>> +/* register address builder */ >>> +#define PCIE_GET_ATU_INB_UNR_REG_ADDR(region, register) \ >>> + ((0x3 << 20) | (region << 9) | \ >>> + (0x1 << 8) | (register << 2)) >> >> Cool, thanks! > > No problem! If you have doubts, please let me know. Okay, so this looks slightly different than the outbound macro since it takes the register argument. In the case of outbound PCIE_GET_ATU_OUTB_UNR_REG_OFFSET returns the offset which was used like dw_pcie_write_dbi(pci, base, offset + reg, 0x4, val); How should the value from PCIE_GET_ATU_INB_UNR_REG_ADDR be used? Thanks Kishon