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From: "Jan Beulich" <JBeulich@suse.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: George Dunlap <george.dunlap@eu.citrix.com>,
	Tim Deegan <tim@xen.org>, Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH v2 8/9] x86/pagewalk: Improve the logic behind setting access and dirty bits
Date: Mon, 20 Mar 2017 03:03:05 -0600	[thread overview]
Message-ID: <58CFA8D90200007800144D20@prv-mh.provo.novell.com> (raw)
In-Reply-To: <1489681903-28119-9-git-send-email-andrew.cooper3@citrix.com>

>>> On 16.03.17 at 17:31, <andrew.cooper3@citrix.com> wrote:
> @@ -413,24 +417,33 @@ guest_walk_tables(struct vcpu *v, struct p2m_domain *p2m,
>       * success.  Although the PRMs say higher-level _PAGE_ACCESSED bits
>       * get set whenever a lower-level PT is used, at least some hardware
>       * walkers behave this way. */
> -#if GUEST_PAGING_LEVELS == 4 /* 64-bit only... */
> -    if ( set_ad_bits(l4p + guest_l4_table_offset(va), &gw->l4e, 0) )
> -        paging_mark_dirty(d, gw->l4mfn);
> -    if ( set_ad_bits(l3p + guest_l3_table_offset(va), &gw->l3e,
> -                     (pse1G && (walk & PFEC_write_access))) )
> -        paging_mark_dirty(d, gw->l3mfn);
> -#endif
> -    if ( !pse1G )
> +    switch ( leaf_level )
>      {
> +    default:
> +        ASSERT_UNREACHABLE();
> +        break;
> +
> +    case 1:
> +        if ( set_ad_bits(l1p + guest_l1_table_offset(va), &gw->l1e,
> +                         (walk & PFEC_write_access) && leaf_level == 1) )

The comparison on leaf_level is pointless here (other than further
down).

> +            paging_mark_dirty(d, gw->l1mfn);
> +        /* Fallthrough */
> +
> +    case 2:
>          if ( set_ad_bits(l2p + guest_l2_table_offset(va), &gw->l2e,
> -                         (pse2M && (walk & PFEC_write_access))) )
> +                         (walk & PFEC_write_access) && leaf_level == 2) )
>              paging_mark_dirty(d, gw->l2mfn);
> -        if ( !pse2M )
> -        {
> -            if ( set_ad_bits(l1p + guest_l1_table_offset(va), &gw->l1e,
> -                             (walk & PFEC_write_access)) )
> -                paging_mark_dirty(d, gw->l1mfn);
> -        }
> +        /* Fallthrough */
> +
> +#if GUEST_PAGING_LEVELS == 4 /* 64-bit only... */
> +    case 3:
> +        if ( set_ad_bits(l3p + guest_l3_table_offset(va), &gw->l3e,
> +                         (walk & PFEC_write_access) && leaf_level == 3) )
> +            paging_mark_dirty(d, gw->l3mfn);
> +
> +        if ( set_ad_bits(l4p + guest_l4_table_offset(va), &gw->l4e, 0) )

false

Other than that,
Reviewed-by: Jan Beulich <jbeulich@suse.com>

Personally I also think the fall through behavior would be more
immediately visible if you omitted the blank lines between the case
blocks.

Jan


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  reply	other threads:[~2017-03-20  9:03 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-16 16:31 [PATCH v2 0/9] Fixes to pagetable handling Andrew Cooper
2017-03-16 16:31 ` [PATCH v2 1/9] x86/cpuid: Sort cpu_has_* predicates by feature number Andrew Cooper
2017-03-17 16:08   ` Jan Beulich
2017-03-16 16:31 ` [PATCH v2 2/9] x86/pagewalk: Use pointer syntax for pfec parameter Andrew Cooper
2017-03-17 16:09   ` Jan Beulich
2017-03-20 11:29   ` George Dunlap
2017-03-23 16:28   ` Tim Deegan
2017-03-16 16:31 ` [PATCH v2 3/9] x86/shadow: Drop VALID_GFN() Andrew Cooper
2017-03-23 16:30   ` Tim Deegan
2017-03-16 16:31 ` [PATCH v2 4/9] x86/pagewalk: Clean up guest_supports_* predicates Andrew Cooper
2017-03-20  8:45   ` Jan Beulich
2017-03-20 13:36     ` Andrew Cooper
2017-03-20 13:59       ` Jan Beulich
2017-03-23 17:32         ` Andrew Cooper
2017-03-24  7:19           ` Jan Beulich
2017-03-23 16:34   ` Tim Deegan
2017-03-16 16:31 ` [PATCH v2 5/9] x86/pagewalk: Helpers for reserved bit handling Andrew Cooper
2017-03-20  8:48   ` Jan Beulich
2017-03-23 16:55   ` Tim Deegan
2017-03-23 17:02     ` Andrew Cooper
2017-03-23 17:12       ` Tim Deegan
2017-03-23 17:35         ` Andrew Cooper
2017-03-24  5:45           ` Juergen Gross
2017-03-24  7:51             ` Jan Beulich
     [not found]             ` <58D4DDFF0200007800147138@suse.com>
2017-03-24  7:58               ` Juergen Gross
2017-03-24  8:25                 ` Jan Beulich
2017-03-24  9:06             ` Andrew Cooper
2017-03-24  7:47           ` Jan Beulich
2017-03-24  8:36             ` Andrew Cooper
2017-03-16 16:31 ` [PATCH v2 6/9] x86/pagewalk: Re-implement the pagetable walker Andrew Cooper
2017-03-16 16:31 ` [PATCH v2 7/9] x86/shadow: Use the pagewalk reserved bits helpers Andrew Cooper
2017-03-16 17:25   ` Andrew Cooper
2017-03-20  8:53   ` Jan Beulich
2017-03-23 16:57   ` Tim Deegan
2017-03-16 16:31 ` [PATCH v2 8/9] x86/pagewalk: Improve the logic behind setting access and dirty bits Andrew Cooper
2017-03-20  9:03   ` Jan Beulich [this message]
2017-03-23 17:09   ` Tim Deegan
2017-03-23 17:40     ` Andrew Cooper
2017-03-16 16:31 ` [PATCH v2 9/9] x86/pagewalk: non-functional cleanup Andrew Cooper
2017-03-20  9:04   ` Jan Beulich
2017-03-23 17:10   ` Tim Deegan

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