From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laxman Dewangan Subject: Re: [PATCH] serial: tegra: Map the iir register to default defines Date: Thu, 30 Mar 2017 15:47:56 +0530 Message-ID: <58DCDB54.5040005@nvidia.com> References: <20170329184806.6577-1-oliver@schinagl.nl> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20170329184806.6577-1-oliver@schinagl.nl> Sender: linux-kernel-owner@vger.kernel.org To: Olliver Schinagl , Greg Kroah-Hartman , Jiri Slaby , Stephen Warren , Thierry Reding , Alexandre Courbot Cc: linux-serial@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Shardar Mohammed List-Id: linux-tegra@vger.kernel.org On Thursday 30 March 2017 12:18 AM, Olliver Schinagl wrote: > The tegra serial IP seems to be following the common layout and the > interrupt ID's match up nicely. Replace the magic values to match the > common serial_reg defines, with the addition of the Tegra unique End of > Data interrupt. > > Signed-off-by: Olliver Schinagl > --- Adding Shardar for verifications. Acked-by: Laxman Dewangan From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933781AbdC3KgN (ORCPT ); Thu, 30 Mar 2017 06:36:13 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:2840 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933731AbdC3KgF (ORCPT ); Thu, 30 Mar 2017 06:36:05 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 30 Mar 2017 03:32:45 -0700 Message-ID: <58DCDB54.5040005@nvidia.com> Date: Thu, 30 Mar 2017 15:47:56 +0530 From: Laxman Dewangan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 MIME-Version: 1.0 To: Olliver Schinagl , Greg Kroah-Hartman , Jiri Slaby , Stephen Warren , Thierry Reding , "Alexandre Courbot" CC: , , , Shardar Mohammed Subject: Re: [PATCH] serial: tegra: Map the iir register to default defines References: <20170329184806.6577-1-oliver@schinagl.nl> In-Reply-To: <20170329184806.6577-1-oliver@schinagl.nl> X-Originating-IP: [10.19.65.30] X-ClientProxiedBy: DRHKMAIL103.nvidia.com (10.25.59.17) To bgmail102.nvidia.com (10.25.59.11) Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday 30 March 2017 12:18 AM, Olliver Schinagl wrote: > The tegra serial IP seems to be following the common layout and the > interrupt ID's match up nicely. Replace the magic values to match the > common serial_reg defines, with the addition of the Tegra unique End of > Data interrupt. > > Signed-off-by: Olliver Schinagl > --- Adding Shardar for verifications. Acked-by: Laxman Dewangan