* [PATCH 0/4] MAINTAINERS: Sanitize 'MIPS TCG CPUs' section
@ 2021-10-04 9:25 Philippe Mathieu-Daudé
2021-10-04 9:25 ` [PATCH 1/4] MAINTAINERS: Add MIPS general architecture support entry Philippe Mathieu-Daudé
` (3 more replies)
0 siblings, 4 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-04 9:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, Paul Burton, Philippe Mathieu-Daudé
Move various files unrelated to MIPS TCG frontend into
new sections.
Philippe Mathieu-Daudé (4):
MAINTAINERS: Add MIPS general architecture support entry
MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware
MAINTAINERS: Split MIPS TCG frontend vs MIPS machines/hardware
MAINTAINERS: Agree to maintain nanoMIPS TCG frontend
MAINTAINERS | 45 ++++++++++++++++++++++++++++++---------------
1 file changed, 30 insertions(+), 15 deletions(-)
--
2.31.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/4] MAINTAINERS: Add MIPS general architecture support entry
2021-10-04 9:25 [PATCH 0/4] MAINTAINERS: Sanitize 'MIPS TCG CPUs' section Philippe Mathieu-Daudé
@ 2021-10-04 9:25 ` Philippe Mathieu-Daudé
2021-10-04 20:07 ` Jiaxun Yang
2021-10-04 9:25 ` [PATCH 2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware Philippe Mathieu-Daudé
` (2 subsequent siblings)
3 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-04 9:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, Paul Burton, Philippe Mathieu-Daudé
The architecture is covered in TCG (frontend and backend)
and hardware models. Add a generic section matching the
'mips' word in patch subjects.
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
MAINTAINERS | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 50435b8d2f5..cfee52a3046 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -109,6 +109,12 @@ K: ^Subject:.*(?i)s390x?
T: git https://gitlab.com/cohuck/qemu.git s390-next
L: qemu-s390x@nongnu.org
+MIPS general architecture support
+M: Philippe Mathieu-Daudé <f4bug@amsat.org>
+R: Jiaxun Yang <jiaxun.yang@flygoat.com>
+S: Odd Fixes
+K: ^Subject:.*(?i)mips
+
Guest CPU cores (TCG)
---------------------
Overall TCG CPUs
@@ -242,7 +248,6 @@ F: include/hw/mips/
F: include/hw/misc/mips_*
F: include/hw/timer/mips_gictimer.h
F: tests/tcg/mips/
-K: ^Subject:.*(?i)mips
MIPS TCG CPUs (nanoMIPS ISA)
S: Orphan
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware
2021-10-04 9:25 [PATCH 0/4] MAINTAINERS: Sanitize 'MIPS TCG CPUs' section Philippe Mathieu-Daudé
2021-10-04 9:25 ` [PATCH 1/4] MAINTAINERS: Add MIPS general architecture support entry Philippe Mathieu-Daudé
@ 2021-10-04 9:25 ` Philippe Mathieu-Daudé
2021-10-04 20:07 ` Jiaxun Yang
2021-10-11 22:21 ` Philippe Mathieu-Daudé
2021-10-04 9:25 ` [PATCH 3/4] MAINTAINERS: Split MIPS TCG frontend vs MIPS machines/hardware Philippe Mathieu-Daudé
2021-10-04 9:25 ` [PATCH 4/4] MAINTAINERS: Agree to maintain nanoMIPS TCG frontend Philippe Mathieu-Daudé
3 siblings, 2 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-04 9:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, Paul Burton, Philippe Mathieu-Daudé
MIPS CPS and GIC models are unrelated to the TCG frontend.
Move them as new sections under the 'Devices' group.
Cc: Paul Burton <paulburton@kernel.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
MAINTAINERS | 22 ++++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index cfee52a3046..a5268ad0651 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -239,14 +239,8 @@ F: target/mips/
F: configs/devices/mips*/*
F: disas/mips.c
F: docs/system/cpu-models-mips.rst.inc
-F: hw/intc/mips_gic.c
F: hw/mips/
-F: hw/misc/mips_*
-F: hw/timer/mips_gictimer.c
-F: include/hw/intc/mips_gic.h
F: include/hw/mips/
-F: include/hw/misc/mips_*
-F: include/hw/timer/mips_gictimer.h
F: tests/tcg/mips/
MIPS TCG CPUs (nanoMIPS ISA)
@@ -2271,6 +2265,22 @@ S: Odd Fixes
F: hw/intc/openpic.c
F: include/hw/ppc/openpic.h
+MIPS CPS
+M: Paul Burton <paulburton@kernel.org>
+M: Philippe Mathieu-Daudé <f4bug@amsat.org>
+S: Odd Fixes
+F: hw/misc/mips_*
+F: include/hw/misc/mips_*
+
+MIPS GIC
+M: Paul Burton <paulburton@kernel.org>
+M: Philippe Mathieu-Daudé <f4bug@amsat.org>
+S: Odd Fixes
+F: hw/intc/mips_gic.c
+F: hw/timer/mips_gictimer.c
+F: include/hw/intc/mips_gic.h
+F: include/hw/timer/mips_gictimer.h
+
Subsystems
----------
Overall Audio backends
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/4] MAINTAINERS: Split MIPS TCG frontend vs MIPS machines/hardware
2021-10-04 9:25 [PATCH 0/4] MAINTAINERS: Sanitize 'MIPS TCG CPUs' section Philippe Mathieu-Daudé
2021-10-04 9:25 ` [PATCH 1/4] MAINTAINERS: Add MIPS general architecture support entry Philippe Mathieu-Daudé
2021-10-04 9:25 ` [PATCH 2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware Philippe Mathieu-Daudé
@ 2021-10-04 9:25 ` Philippe Mathieu-Daudé
2021-10-04 20:08 ` Jiaxun Yang
2021-10-04 9:25 ` [PATCH 4/4] MAINTAINERS: Agree to maintain nanoMIPS TCG frontend Philippe Mathieu-Daudé
3 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-04 9:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, Paul Burton, Philippe Mathieu-Daudé
Hardware emulated models don't belong to the TCG MAINTAINERS
section. Move them to a new 'Overall MIPS Machines' section
in the 'MIPS Machines' group.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
MAINTAINERS | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index a5268ad0651..f1d7279a0f2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -236,11 +236,8 @@ R: Jiaxun Yang <jiaxun.yang@flygoat.com>
R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Odd Fixes
F: target/mips/
-F: configs/devices/mips*/*
F: disas/mips.c
F: docs/system/cpu-models-mips.rst.inc
-F: hw/mips/
-F: include/hw/mips/
F: tests/tcg/mips/
MIPS TCG CPUs (nanoMIPS ISA)
@@ -1168,6 +1165,13 @@ F: hw/microblaze/petalogix_ml605_mmu.c
MIPS Machines
-------------
+Overall MIPS Machines
+M: Philippe Mathieu-Daudé <f4bug@amsat.org>
+S: Odd Fixes
+F: configs/devices/mips*/*
+F: hw/mips/
+F: include/hw/mips/
+
Jazz
M: Hervé Poussineau <hpoussin@reactos.org>
R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/4] MAINTAINERS: Agree to maintain nanoMIPS TCG frontend
2021-10-04 9:25 [PATCH 0/4] MAINTAINERS: Sanitize 'MIPS TCG CPUs' section Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2021-10-04 9:25 ` [PATCH 3/4] MAINTAINERS: Split MIPS TCG frontend vs MIPS machines/hardware Philippe Mathieu-Daudé
@ 2021-10-04 9:25 ` Philippe Mathieu-Daudé
2021-10-04 20:08 ` Jiaxun Yang
3 siblings, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-04 9:25 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, Paul Burton, Philippe Mathieu-Daudé
As of this commit, the nanoMIPS toolchains haven't been merged
in mainstream projects. However MediaTek provides a toolchain:
https://github.com/MediaTek-Labs/nanomips-gnu-toolchain/releases/tag/nanoMIPS-2021.02-01
Since I now have spent more time with the ISA, I agree to maintain
it along with the other MIPS ISA.
For historical notes, see commit a60442eb8 ("Deprecate nanoMIPS ISA").
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
MAINTAINERS | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index f1d7279a0f2..8ce47417eff 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -237,14 +237,10 @@ R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Odd Fixes
F: target/mips/
F: disas/mips.c
+X: disas/nanomips.*
F: docs/system/cpu-models-mips.rst.inc
F: tests/tcg/mips/
-MIPS TCG CPUs (nanoMIPS ISA)
-S: Orphan
-F: disas/nanomips.*
-F: target/mips/tcg/*nanomips*
-
NiosII TCG CPUs
M: Chris Wulff <crwulff@gmail.com>
M: Marek Vasut <marex@denx.de>
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 1/4] MAINTAINERS: Add MIPS general architecture support entry
2021-10-04 9:25 ` [PATCH 1/4] MAINTAINERS: Add MIPS general architecture support entry Philippe Mathieu-Daudé
@ 2021-10-04 20:07 ` Jiaxun Yang
0 siblings, 0 replies; 12+ messages in thread
From: Jiaxun Yang @ 2021-10-04 20:07 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: Richard Henderson, Paul Burton
在 2021/10/4 10:25, Philippe Mathieu-Daudé 写道:
> The architecture is covered in TCG (frontend and backend)
> and hardware models. Add a generic section matching the
> 'mips' word in patch subjects.
>
> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Thanks.
- Jiaxun
> ---
> MAINTAINERS | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 50435b8d2f5..cfee52a3046 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -109,6 +109,12 @@ K: ^Subject:.*(?i)s390x?
> T: git https://gitlab.com/cohuck/qemu.git s390-next
> L: qemu-s390x@nongnu.org
>
> +MIPS general architecture support
> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> +R: Jiaxun Yang <jiaxun.yang@flygoat.com>
> +S: Odd Fixes
> +K: ^Subject:.*(?i)mips
> +
> Guest CPU cores (TCG)
> ---------------------
> Overall TCG CPUs
> @@ -242,7 +248,6 @@ F: include/hw/mips/
> F: include/hw/misc/mips_*
> F: include/hw/timer/mips_gictimer.h
> F: tests/tcg/mips/
> -K: ^Subject:.*(?i)mips
>
> MIPS TCG CPUs (nanoMIPS ISA)
> S: Orphan
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware
2021-10-04 9:25 ` [PATCH 2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware Philippe Mathieu-Daudé
@ 2021-10-04 20:07 ` Jiaxun Yang
2021-10-11 22:21 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 12+ messages in thread
From: Jiaxun Yang @ 2021-10-04 20:07 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: Richard Henderson, Paul Burton
在 2021/10/4 10:25, Philippe Mathieu-Daudé 写道:
> MIPS CPS and GIC models are unrelated to the TCG frontend.
> Move them as new sections under the 'Devices' group.
>
> Cc: Paul Burton <paulburton@kernel.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Thanks.
- Jiaxun
> ---
> MAINTAINERS | 22 ++++++++++++++++------
> 1 file changed, 16 insertions(+), 6 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index cfee52a3046..a5268ad0651 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -239,14 +239,8 @@ F: target/mips/
> F: configs/devices/mips*/*
> F: disas/mips.c
> F: docs/system/cpu-models-mips.rst.inc
> -F: hw/intc/mips_gic.c
> F: hw/mips/
> -F: hw/misc/mips_*
> -F: hw/timer/mips_gictimer.c
> -F: include/hw/intc/mips_gic.h
> F: include/hw/mips/
> -F: include/hw/misc/mips_*
> -F: include/hw/timer/mips_gictimer.h
> F: tests/tcg/mips/
>
> MIPS TCG CPUs (nanoMIPS ISA)
> @@ -2271,6 +2265,22 @@ S: Odd Fixes
> F: hw/intc/openpic.c
> F: include/hw/ppc/openpic.h
>
> +MIPS CPS
> +M: Paul Burton <paulburton@kernel.org>
> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> +S: Odd Fixes
> +F: hw/misc/mips_*
> +F: include/hw/misc/mips_*
> +
> +MIPS GIC
> +M: Paul Burton <paulburton@kernel.org>
> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> +S: Odd Fixes
> +F: hw/intc/mips_gic.c
> +F: hw/timer/mips_gictimer.c
> +F: include/hw/intc/mips_gic.h
> +F: include/hw/timer/mips_gictimer.h
> +
> Subsystems
> ----------
> Overall Audio backends
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/4] MAINTAINERS: Split MIPS TCG frontend vs MIPS machines/hardware
2021-10-04 9:25 ` [PATCH 3/4] MAINTAINERS: Split MIPS TCG frontend vs MIPS machines/hardware Philippe Mathieu-Daudé
@ 2021-10-04 20:08 ` Jiaxun Yang
0 siblings, 0 replies; 12+ messages in thread
From: Jiaxun Yang @ 2021-10-04 20:08 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: Richard Henderson, Paul Burton
在 2021/10/4 10:25, Philippe Mathieu-Daudé 写道:
> Hardware emulated models don't belong to the TCG MAINTAINERS
> section. Move them to a new 'Overall MIPS Machines' section
> in the 'MIPS Machines' group.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Thanks.
- Jiaxun
> ---
> MAINTAINERS | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a5268ad0651..f1d7279a0f2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -236,11 +236,8 @@ R: Jiaxun Yang <jiaxun.yang@flygoat.com>
> R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
> S: Odd Fixes
> F: target/mips/
> -F: configs/devices/mips*/*
> F: disas/mips.c
> F: docs/system/cpu-models-mips.rst.inc
> -F: hw/mips/
> -F: include/hw/mips/
> F: tests/tcg/mips/
>
> MIPS TCG CPUs (nanoMIPS ISA)
> @@ -1168,6 +1165,13 @@ F: hw/microblaze/petalogix_ml605_mmu.c
>
> MIPS Machines
> -------------
> +Overall MIPS Machines
> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> +S: Odd Fixes
> +F: configs/devices/mips*/*
> +F: hw/mips/
> +F: include/hw/mips/
> +
> Jazz
> M: Hervé Poussineau <hpoussin@reactos.org>
> R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/4] MAINTAINERS: Agree to maintain nanoMIPS TCG frontend
2021-10-04 9:25 ` [PATCH 4/4] MAINTAINERS: Agree to maintain nanoMIPS TCG frontend Philippe Mathieu-Daudé
@ 2021-10-04 20:08 ` Jiaxun Yang
2021-10-27 3:48 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 12+ messages in thread
From: Jiaxun Yang @ 2021-10-04 20:08 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: Richard Henderson, Paul Burton
在 2021/10/4 10:25, Philippe Mathieu-Daudé 写道:
> As of this commit, the nanoMIPS toolchains haven't been merged
> in mainstream projects. However MediaTek provides a toolchain:
> https://github.com/MediaTek-Labs/nanomips-gnu-toolchain/releases/tag/nanoMIPS-2021.02-01
>
> Since I now have spent more time with the ISA, I agree to maintain
> it along with the other MIPS ISA.
>
> For historical notes, see commit a60442eb8 ("Deprecate nanoMIPS ISA").
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Probably it's worthy to ask MTK folks if they are willing to maintain QEMU?
Thanks.
- Jiaxun
> ---
> MAINTAINERS | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f1d7279a0f2..8ce47417eff 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -237,14 +237,10 @@ R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
> S: Odd Fixes
> F: target/mips/
> F: disas/mips.c
> +X: disas/nanomips.*
> F: docs/system/cpu-models-mips.rst.inc
> F: tests/tcg/mips/
>
> -MIPS TCG CPUs (nanoMIPS ISA)
> -S: Orphan
> -F: disas/nanomips.*
> -F: target/mips/tcg/*nanomips*
> -
> NiosII TCG CPUs
> M: Chris Wulff <crwulff@gmail.com>
> M: Marek Vasut <marex@denx.de>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware
2021-10-04 9:25 ` [PATCH 2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware Philippe Mathieu-Daudé
2021-10-04 20:07 ` Jiaxun Yang
@ 2021-10-11 22:21 ` Philippe Mathieu-Daudé
2021-10-27 3:41 ` Philippe Mathieu-Daudé
1 sibling, 1 reply; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-11 22:21 UTC (permalink / raw)
To: qemu-devel, Paul Burton; +Cc: Richard Henderson
Hi Paul,
You are the maintainer of the Boston machine which is the
only one using these peripherals; would you agree to be
(co-)maintainer of these files?
Regards,
Phil.
On 10/4/21 11:25, Philippe Mathieu-Daudé wrote:
> MIPS CPS and GIC models are unrelated to the TCG frontend.
> Move them as new sections under the 'Devices' group.
>
> Cc: Paul Burton <paulburton@kernel.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> MAINTAINERS | 22 ++++++++++++++++------
> 1 file changed, 16 insertions(+), 6 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index cfee52a3046..a5268ad0651 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -239,14 +239,8 @@ F: target/mips/
> F: configs/devices/mips*/*
> F: disas/mips.c
> F: docs/system/cpu-models-mips.rst.inc
> -F: hw/intc/mips_gic.c
> F: hw/mips/
> -F: hw/misc/mips_*
> -F: hw/timer/mips_gictimer.c
> -F: include/hw/intc/mips_gic.h
> F: include/hw/mips/
> -F: include/hw/misc/mips_*
> -F: include/hw/timer/mips_gictimer.h
> F: tests/tcg/mips/
>
> MIPS TCG CPUs (nanoMIPS ISA)
> @@ -2271,6 +2265,22 @@ S: Odd Fixes
> F: hw/intc/openpic.c
> F: include/hw/ppc/openpic.h
>
> +MIPS CPS
> +M: Paul Burton <paulburton@kernel.org>
> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> +S: Odd Fixes
> +F: hw/misc/mips_*
> +F: include/hw/misc/mips_*
> +
> +MIPS GIC
> +M: Paul Burton <paulburton@kernel.org>
> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
> +S: Odd Fixes
> +F: hw/intc/mips_gic.c
> +F: hw/timer/mips_gictimer.c
> +F: include/hw/intc/mips_gic.h
> +F: include/hw/timer/mips_gictimer.h
> +
> Subsystems
> ----------
> Overall Audio backends
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware
2021-10-11 22:21 ` Philippe Mathieu-Daudé
@ 2021-10-27 3:41 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-27 3:41 UTC (permalink / raw)
To: qemu-devel, Paul Burton; +Cc: Richard Henderson
On 10/12/21 00:21, Philippe Mathieu-Daudé wrote:
> Hi Paul,
>
> You are the maintainer of the Boston machine which is the
> only one using these peripherals; would you agree to be
> (co-)maintainer of these files?
I am going to respin this patch removing Paul name.
> On 10/4/21 11:25, Philippe Mathieu-Daudé wrote:
>> MIPS CPS and GIC models are unrelated to the TCG frontend.
>> Move them as new sections under the 'Devices' group.
>>
>> Cc: Paul Burton <paulburton@kernel.org>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> MAINTAINERS | 22 ++++++++++++++++------
>> 1 file changed, 16 insertions(+), 6 deletions(-)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index cfee52a3046..a5268ad0651 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -239,14 +239,8 @@ F: target/mips/
>> F: configs/devices/mips*/*
>> F: disas/mips.c
>> F: docs/system/cpu-models-mips.rst.inc
>> -F: hw/intc/mips_gic.c
>> F: hw/mips/
>> -F: hw/misc/mips_*
>> -F: hw/timer/mips_gictimer.c
>> -F: include/hw/intc/mips_gic.h
>> F: include/hw/mips/
>> -F: include/hw/misc/mips_*
>> -F: include/hw/timer/mips_gictimer.h
>> F: tests/tcg/mips/
>>
>> MIPS TCG CPUs (nanoMIPS ISA)
>> @@ -2271,6 +2265,22 @@ S: Odd Fixes
>> F: hw/intc/openpic.c
>> F: include/hw/ppc/openpic.h
>>
>> +MIPS CPS
>> +M: Paul Burton <paulburton@kernel.org>
>> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> +S: Odd Fixes
>> +F: hw/misc/mips_*
>> +F: include/hw/misc/mips_*
>> +
>> +MIPS GIC
>> +M: Paul Burton <paulburton@kernel.org>
>> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> +S: Odd Fixes
>> +F: hw/intc/mips_gic.c
>> +F: hw/timer/mips_gictimer.c
>> +F: include/hw/intc/mips_gic.h
>> +F: include/hw/timer/mips_gictimer.h
>> +
>> Subsystems
>> ----------
>> Overall Audio backends
>>
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/4] MAINTAINERS: Agree to maintain nanoMIPS TCG frontend
2021-10-04 20:08 ` Jiaxun Yang
@ 2021-10-27 3:48 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-27 3:48 UTC (permalink / raw)
To: Jiaxun Yang, qemu-devel; +Cc: Richard Henderson, Paul Burton
On 10/4/21 22:08, Jiaxun Yang wrote:
> 在 2021/10/4 10:25, Philippe Mathieu-Daudé 写道:
>> As of this commit, the nanoMIPS toolchains haven't been merged
>> in mainstream projects. However MediaTek provides a toolchain:
>> https://github.com/MediaTek-Labs/nanomips-gnu-toolchain/releases/tag/nanoMIPS-2021.02-01
>>
>>
>> Since I now have spent more time with the ISA, I agree to maintain
>> it along with the other MIPS ISA.
>>
>> For historical notes, see commit a60442eb8 ("Deprecate nanoMIPS ISA").
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>
> Probably it's worthy to ask MTK folks if they are willing to maintain QEMU?
Well it is not like I am hiding this patch, it is posted on a public
mailing list...
>> ---
>> MAINTAINERS | 6 +-----
>> 1 file changed, 1 insertion(+), 5 deletions(-)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index f1d7279a0f2..8ce47417eff 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -237,14 +237,10 @@ R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
>> S: Odd Fixes
>> F: target/mips/
>> F: disas/mips.c
>> +X: disas/nanomips.*
>> F: docs/system/cpu-models-mips.rst.inc
>> F: tests/tcg/mips/
>> -MIPS TCG CPUs (nanoMIPS ISA)
>> -S: Orphan
>> -F: disas/nanomips.*
>> -F: target/mips/tcg/*nanomips*
>> -
>> NiosII TCG CPUs
>> M: Chris Wulff <crwulff@gmail.com>
>> M: Marek Vasut <marex@denx.de>
>
>
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-10-27 3:49 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-04 9:25 [PATCH 0/4] MAINTAINERS: Sanitize 'MIPS TCG CPUs' section Philippe Mathieu-Daudé
2021-10-04 9:25 ` [PATCH 1/4] MAINTAINERS: Add MIPS general architecture support entry Philippe Mathieu-Daudé
2021-10-04 20:07 ` Jiaxun Yang
2021-10-04 9:25 ` [PATCH 2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware Philippe Mathieu-Daudé
2021-10-04 20:07 ` Jiaxun Yang
2021-10-11 22:21 ` Philippe Mathieu-Daudé
2021-10-27 3:41 ` Philippe Mathieu-Daudé
2021-10-04 9:25 ` [PATCH 3/4] MAINTAINERS: Split MIPS TCG frontend vs MIPS machines/hardware Philippe Mathieu-Daudé
2021-10-04 20:08 ` Jiaxun Yang
2021-10-04 9:25 ` [PATCH 4/4] MAINTAINERS: Agree to maintain nanoMIPS TCG frontend Philippe Mathieu-Daudé
2021-10-04 20:08 ` Jiaxun Yang
2021-10-27 3:48 ` Philippe Mathieu-Daudé
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