From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Tue, 31 Mar 2020 18:07:14 +0200
Subject: [U-Boot] [PATCH v1 2/2] gpio: stm32f7: Fix SPL code size
In-Reply-To: <c0c7ba79-763e-3096-fbe6-f97e9f076592@st.com>
References: <1546595706-31360-1-git-send-email-patrice.chotard@st.com>
 <1546595706-31360-3-git-send-email-patrice.chotard@st.com>
 <f3e23915-c6ae-7c4d-7c5a-f725f726b5d4@denx.de>
 <ed1f23e8-6ae1-4f62-cb23-10f8061a45d1@st.com>
 <08d1a5d5-4d90-1c97-6e88-b44391bc0fe0@denx.de>
 <c0c7ba79-763e-3096-fbe6-f97e9f076592@st.com>
Message-ID: <5916e5a0-bfcf-ce91-1fa5-e4f78c63e47b@denx.de>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On 3/31/20 4:10 PM, Patrice CHOTARD wrote:
> 
> On 3/31/20 1:22 PM, Marek Vasut wrote:
>> On 3/31/20 10:12 AM, Patrice CHOTARD wrote:
>>> Hi Marek
>> Hi,
>>
>>> On 3/31/20 4:51 AM, Marek Vasut wrote:
>>>> On 1/4/19 10:55 AM, Patrice Chotard wrote:
>>>>
>>>> Hi,
>>>>
>>>>> @@ -215,7 +220,9 @@ U_BOOT_DRIVER(gpio_stm32) = {
>>>>>  	.id	= UCLASS_GPIO,
>>>>>  	.of_match = stm32_gpio_ids,
>>>>>  	.probe	= gpio_stm32_probe,
>>>>> +#ifndef CONFIG_SPL_BUILD
>>>>>  	.ops	= &gpio_stm32_ops,
>>>>> +#endif
>>>>>  	.flags	= DM_UC_FLAG_SEQ_ALIAS,
>>>>>  	.priv_auto_alloc_size	= sizeof(struct stm32_gpio_priv),
>>>>>  };
>>>> The U-Boot DM GPIO uclass code assumes the .ops is always non-NULL.
>>>> Hence, this patch breaks all GPIO access (actually crashes SPL) on STM32
>>>> in SPL.
>>> I suppose it breaks AV96 boot ?
>> No, it does not. I was trying to read GPIO value in SPL and found this.
>>
>>> On my side i have checked on v2020-04-rc4 U-boot release, by reverting "gpio: stm32f7: Fix SPL code size"
>>>
>>> the stm32f7 SPL code size is below the 32Kb limit.
>>>
>>> I will send a patch to revert it.
>> OK sure, does that apply to all the STM32 systems ?
> Yes, all STM32 based platforms (F4/F7/H7 and MP1) are using this gpio driver.

What I wanted to ask about is whether you're sure they don't overflow in
SPL. But I suspect CI would tell you by now.