From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: [PATCH 06/11] ARM: simplify page type handling Date: Wed, 21 Jun 2017 03:35:13 -0600 Message-ID: <594A59F10200007800165090@prv-mh.provo.novell.com> References: <594A57B10200007800165012@prv-mh.provo.novell.com> <594A57B10200007800165012@prv-mh.provo.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="=__Part87BF99C1.4__=" Return-path: Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dNc2f-00007r-Dx for xen-devel@lists.xenproject.org; Wed, 21 Jun 2017 09:35:17 +0000 In-Reply-To: <594A57B10200007800165012@prv-mh.provo.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: xen-devel Cc: Stefano Stabellini , Wei Liu , George Dunlap , Andrew Cooper , Ian Jackson , Tim Deegan , Julien Grall List-Id: xen-devel@lists.xenproject.org This is a MIME message. If you are reading this text, you may want to consider changing to a mail reader or gateway that understands how to properly handle MIME multipart messages. --=__Part87BF99C1.4__= Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Content-Disposition: inline There's no need to have anything here on ARM other than the distinction between writable and non-writable pages (and even that could likely be eliminated, but with a more intrusive change). Limit type to a single bit and drop pinned and validated flags altogether. Signed-off-by: Jan Beulich --- Note: Compile tested only. --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -1113,8 +1113,7 @@ void share_xen_page_with_guest(struct pa spin_lock(&d->page_alloc_lock); =20 /* The incremented type count pins as writable or read-only. */ - page->u.inuse.type_info =3D (readonly ? PGT_none : PGT_writable_page)= ; - page->u.inuse.type_info |=3D PGT_validated | 1; + page->u.inuse.type_info =3D (readonly ? PGT_none : PGT_writable_page) = | 1; =20 page_set_owner(page, d); smp_wmb(); /* install valid domain ptr before updating refcnt. */ --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -354,8 +354,10 @@ int guest_remove_page(struct domain *d, =20 rc =3D guest_physmap_remove_page(d, _gfn(gmfn), mfn, 0); =20 +#ifdef _PGT_pinned if ( !rc && test_and_clear_bit(_PGT_pinned, &page->u.inuse.type_info) = ) put_page_and_type(page); +#endif =20 /* * With the lack of an IOMMU on some platforms, domains with = DMA-capable --- a/xen/include/asm-arm/mm.h +++ b/xen/include/asm-arm/mm.h @@ -77,20 +77,12 @@ struct page_info #define PG_shift(idx) (BITS_PER_LONG - (idx)) #define PG_mask(x, idx) (x ## UL << PG_shift(idx)) =20 -#define PGT_none PG_mask(0, 4) /* no special uses of this page = */ -#define PGT_writable_page PG_mask(7, 4) /* has writable mappings? = */ -#define PGT_type_mask PG_mask(15, 4) /* Bits 28-31 or 60-63. = */ - - /* Owning guest has pinned this page to its current type? */ -#define _PGT_pinned PG_shift(5) -#define PGT_pinned PG_mask(1, 5) - - /* Has this page been validated for use as its current type? */ -#define _PGT_validated PG_shift(6) -#define PGT_validated PG_mask(1, 6) +#define PGT_none PG_mask(0, 1) /* no special uses of this page = */ +#define PGT_writable_page PG_mask(1, 1) /* has writable mappings? = */ +#define PGT_type_mask PG_mask(1, 1) /* Bits 31 or 63. = */ =20 /* Count of uses of this frame as its current type. */ -#define PGT_count_width PG_shift(9) +#define PGT_count_width PG_shift(2) #define PGT_count_mask ((1UL<=0A---=0ANote: Compile tested only.=0A=0A--- a/xen/arch/arm/mm.c=0A+++ = b/xen/arch/arm/mm.c=0A@@ -1113,8 +1113,7 @@ void share_xen_page_with_guest(= struct pa=0A spin_lock(&d->page_alloc_lock);=0A =0A /* The = incremented type count pins as writable or read-only. */=0A- page->u.inu= se.type_info =3D (readonly ? PGT_none : PGT_writable_page);=0A- = page->u.inuse.type_info |=3D PGT_validated | 1;=0A+ page->u.inuse.type_i= nfo =3D (readonly ? PGT_none : PGT_writable_page) | 1;=0A =0A = page_set_owner(page, d);=0A smp_wmb(); /* install valid domain ptr = before updating refcnt. */=0A--- a/xen/common/memory.c=0A+++ b/xen/common/m= emory.c=0A@@ -354,8 +354,10 @@ int guest_remove_page(struct domain *d,=0A = =0A rc =3D guest_physmap_remove_page(d, _gfn(gmfn), mfn, 0);=0A = =0A+#ifdef _PGT_pinned=0A if ( !rc && test_and_clear_bit(_PGT_pinned, = &page->u.inuse.type_info) )=0A put_page_and_type(page);=0A+#endif= =0A =0A /*=0A * With the lack of an IOMMU on some platforms, = domains with DMA-capable=0A--- a/xen/include/asm-arm/mm.h=0A+++ b/xen/inclu= de/asm-arm/mm.h=0A@@ -77,20 +77,12 @@ struct page_info=0A #define = PG_shift(idx) (BITS_PER_LONG - (idx))=0A #define PG_mask(x, idx) (x ## = UL << PG_shift(idx))=0A =0A-#define PGT_none PG_mask(0, 4) /* no = special uses of this page */=0A-#define PGT_writable_page PG_mask(7, 4) = /* has writable mappings? */=0A-#define PGT_type_mask = PG_mask(15, 4) /* Bits 28-31 or 60-63. */=0A-=0A- /* Owning = guest has pinned this page to its current type? */=0A-#define _PGT_pinned = PG_shift(5)=0A-#define PGT_pinned PG_mask(1, 5)=0A-=0A- /* Has = this page been validated for use as its current type? */=0A-#define = _PGT_validated PG_shift(6)=0A-#define PGT_validated PG_mask(1, = 6)=0A+#define PGT_none PG_mask(0, 1) /* no special uses of this = page */=0A+#define PGT_writable_page PG_mask(1, 1) /* has writable = mappings? */=0A+#define PGT_type_mask PG_mask(1, 1) /* Bits = 31 or 63. */=0A =0A /* Count of uses of this frame as its = current type. */=0A-#define PGT_count_width PG_shift(9)=0A+#define = PGT_count_width PG_shift(2)=0A #define PGT_count_mask ((1UL<