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From: "Jan Beulich" <jbeulich@suse.com>
To: yi.y.sun@linux.intel.com
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
	andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
	ian.jackson@eu.citrix.com, mengxu@cis.upenn.edu,
	xen-devel@lists.xenproject.org, chao.p.peng@linux.intel.com,
	roger.pau@citrix.com
Subject: Re: [PATCH v13 12/23] x86: refactor psr: L3 CAT: set value: implement write msr flow.
Date: Wed, 12 Jul 2017 23:20:24 -0600	[thread overview]
Message-ID: <596703180200007800102432@prv-mh.provo.novell.com> (raw)
In-Reply-To: <20170713025901.GU3420@yi.y.sun>

>>> Yi Sun <yi.y.sun@linux.intel.com> 07/13/17 5:00 AM >>>
>On 17-07-12 13:37:02, Jan Beulich wrote:
>> >>> Yi Sun <yi.y.sun@linux.intel.com> 07/06/17 4:07 AM >>>
>> >v13:
>>     >- use 'skip_prior_features'.
>> >- add 'const' for some variables.
>> 
>> You didn't go quite far enough with this:
>> 
>> >+struct cos_write_info
>> >+{
>> >+    unsigned int cos;
>> >+    struct feat_node *feature;
>> >+    const uint32_t *val;
>> 
>> With this, ...
>> 
>> >static int write_psr_msrs(unsigned int socket, unsigned int cos,
>>                            >uint32_t val[], unsigned int array_len,
>>                            
>> ... I can't see why this can't be const too. Of course that would then affect an
>> earlier patch.
>> 
>The 'val' is input into 'skip_prior_features'. In 'skip_prior_features', there
>is '*val += props->cos_num;' to change the value. So, I do not add 'const' here.
>Of course, I can change the way to skip value array, e.g. using a variable as
>index. Which one do you like?

Oh, I see. But yes, I still think it would be nice for const-ness to be
expressible irrespective of this helper function, so making it e.g. just update
"len" without passing in the array pointer at all (leaving that part to the caller)
would seem desirable. Or possibly not even pass "array_len" via indirection,
instead making the function return a non-negative increment value for the
caller to apply to both (keeping negative value to indicate errors). But if you
think it's better the way it is, I could also live with it.

>> >+    if ( socket == cpu_to_socket(smp_processor_id()) )
>> >+        do_write_psr_msrs(&data);
>> >+    else
>> >+    {
>> >+        unsigned int cpu = get_socket_cpu(socket);
>> >+
>> >+        if ( cpu >= nr_cpu_ids )
>> >+            return -ENOTSOCK;
>> >+        on_selected_cpus(cpumask_of(cpu), do_write_psr_msrs, &data, 1);
>> 
>> How frequent an operation can this be? Considering that the actual MSR write(s)
>> in the handler is (are) conditional I wonder whether it wouldn't be worthwhile
>> trying to avoid the IPI altogether, by pre-checking whether any write actually
>> needs doing.
>> 
>Yes, I think I can check if the value to set is same as 'feat->cos_reg_val[cos]'
>before calling IPI.

Well, as said - whether it's worth the extra effort depends on whether there is
a (reasonable) scenario where this function may be executed frequently.

>There is one more thing. During implementing MBA, I find there is an issue here.
>The current codes in 'struct cos_write_info' and 'write_psr_msrs' only consider
>one feature's value setting. In fact, we should consider to set all values in
>'val' array to the MSRs with new cos id for all features.
>
>So, the 'cos_write_info' should be something like below to input feature array
>and props array to handle all features. Of course, we do not need skip value
>array anymore.
>
>struct cos_write_info
>{
    >unsigned int cos;
    >struct feat_node **features;
    >uint32_t *val;
    >unsigned int array_len;
    >const struct feat_props **props;
>};

As you can likely understand, I can't really judge on this without seeing what
you need this for. So I'd suggest to keep things the way they are in this series
and discuss changes to it in the context of that other series of yours.

Jan


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  reply	other threads:[~2017-07-13  5:20 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-06  1:52 [PATCH v13 00/23] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-07-06  1:52 ` [PATCH v13 01/23] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-07-07 16:37   ` Meng Xu
2017-07-10  5:25     ` Yi Sun
2017-07-10 13:09       ` Meng Xu
2017-07-06  1:52 ` [PATCH v13 02/23] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-07-06  1:52 ` [PATCH v13 03/23] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-07-06  1:52 ` [PATCH v13 04/23] x86: refactor psr: L3 CAT: implement main data structures, CPU init and free flows Yi Sun
2017-07-06  1:52 ` [PATCH v13 05/23] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-07-06  1:52 ` [PATCH v13 06/23] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-07-06  1:53 ` [PATCH v13 07/23] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-07-06  1:53 ` [PATCH v13 08/23] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-07-12 19:14   ` Jan Beulich
2017-07-06  1:53 ` [PATCH v13 09/23] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-07-12 19:26   ` Jan Beulich
2017-07-06  1:53 ` [PATCH v13 10/23] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-07-06  1:53 ` [PATCH v13 11/23] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-07-06  1:53 ` [PATCH v13 12/23] x86: refactor psr: L3 CAT: set value: implement write msr flow Yi Sun
2017-07-12 19:37   ` Jan Beulich
2017-07-13  2:59     ` Yi Sun
2017-07-13  5:20       ` Jan Beulich [this message]
2017-07-13  7:32         ` Yi Sun
2017-07-13 19:21           ` Jan Beulich
2017-07-14  1:38             ` Yi Sun
2017-07-06  1:53 ` [PATCH v13 13/23] x86: refactor psr: CDP: implement CPU init flow Yi Sun
2017-07-12 19:52   ` Jan Beulich
2017-07-13  3:02     ` Yi Sun
2017-07-13  5:24       ` Jan Beulich
2017-07-13  5:28         ` Jan Beulich
2017-07-06  1:53 ` [PATCH v13 14/23] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-07-06  1:53 ` [PATCH v13 15/23] x86: refactor psr: CDP: implement set value callback function Yi Sun
2017-07-12 20:01   ` Jan Beulich
2017-07-06  1:53 ` [PATCH v13 16/23] x86: L2 CAT: implement CPU init flow Yi Sun
2017-07-12 20:09   ` Jan Beulich
2017-07-13  3:03     ` Yi Sun
2017-07-06  1:53 ` [PATCH v13 17/23] x86: L2 CAT: implement get hw info flow Yi Sun
2017-07-06  1:53 ` [PATCH v13 18/23] x86: L2 CAT: implement get value flow Yi Sun
2017-07-06  1:53 ` [PATCH v13 19/23] x86: L2 CAT: implement set " Yi Sun
2017-07-06  1:53 ` [PATCH v13 20/23] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-07-06  1:53 ` [PATCH v13 21/23] tools: L2 CAT: support show cbm " Yi Sun
2017-07-06  1:53 ` [PATCH v13 22/23] tools: L2 CAT: support set " Yi Sun
2017-07-06  1:53 ` [PATCH v13 23/23] docs: add L2 CAT description in docs Yi Sun

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